No presente trabalho foi realizado o estudo das propriedades ópticas e elétricas de dispositivos eletroluminescentes poliméricos, conhecidos como diodos emissores de luz poliméricos (PLEDs), e o desenvolvimento de camadas transportadoras de carga (HTL), que visam promover um aumento da eficiência elétrica dos dispositivos. Para o estudo das propriedades ópticas e elétricas dos PLEDs, foram fabricados dispositivos com estruturas do tipo Ânodo/HTL/Polímero Eletroluminescente/Cátodo. Foram apresentadas todas as etapas de fabricação dos dispositivos, assim como seus processos de caracterização. Para o ânodo, foi utilizado um óxido transparente condutor, óxido de índio-estanho - ITO, com tratamento superficial em plasma de oxigênio. Foram estudados três materiais diferentes para as HTLs. Filmes de PAni:PVS ou PAni:Ni-TS-Pc foram depositados pela técnica de automontagem (Layer-by-Layer) e os filmes de PEDOT:PSS foram depositados pelo método de spin-coating. O polímero eletroluminescente utilizado neste trabalho foi o MEH-PPV, também depositado pelo método de spin-coating. Para o cátodo foi utilizado o alumínio, evaporado termicamente. O encapsulamento dos dispositivos foi realizado em atmosfera inerte de argônio para diminuir os efeitos de degradação através do oxigênio e da luz. O emprego de camadas transportadoras de buracos (HTLs) resultou numa sensível diminuição no valor da tensão de operação dos dispositivos, quando empregados filmes de PAni:PVS e PAni:Ni-TS-Pc. Os valores das tensões de operação baixaram de 12 V para cerca de 3 V em relação aos dispositivos fabricados sem a utilização de HTLs. Através da microscopia de força atômica, foi possível determinar a espessura das bicamadas e a rugosidade superficial dos filmes de PAni:PVS para correlacionar estes resultados com a resposta elétrica dos dispositivos. Espessuras de 4nm (para 1 bicamada) resultaram em tensões de operação de 3 V. Foi possível verificar também, por espectroscopia no UV-VIS, que este tipo de filme absorve luz em freqüência diferente daquela emitida pelo MEH-PPV. Medidas elétricas em regime de corrente contínua, curvas de Corrente vs. Tensão e, em regime de corrente alternada, espectroscopia de impedância, foram realizadas em dispositivos para determinar o valor da tensão de operação e estudar os efeitos de interface nas diferentes camadas que compõe um dispositivo. Através das curvas obtidas pela espectroscopia de impedância, foi possível determinar os valores dos componentes dos circuitos equivalentes (capacitores e resistores). Com isso, é possível simular o comportamento destes dispositivos através de circuitos elétricos antes mesmo de serem fabricados. Pelos resultados obtidos, todas as HTLs estudadas contribuíram para uma sensível diminuição no valor da tensão de operação dos dispositivos, apontando-os como excelentes materiais a serem utilizados com o objetivo de alcançar uma maior eficiência e um melhor desempenho destes dispositivos. / In the present work, the study of the optical and electrical properties of polymeric electroluminescent devices known as Polymer Light-Emitting Diodes (PLEDs) and the development of Hole Transport Layers (HTLs) to promote an increase of the electrical efficiency of the devices was performed. PLEDs were constructed with structures like Anode/HTL/Electroluminescent Polymer/Cathode in order to study the optical and electrical properties of these devices. All the stages of the devices production were presented, as well as its characterization processes. For the anode a conductive transparent oxide (Indium Tin Oxide - ITO) with a superficial oxygen plasma treatment was used. Three different materials for the HTLs were used. Films of PAni:PVS or PAni:Ni-TS-Pc were deposited by the self-assembly technique (Layer-by-Layer) and the films of PEDOT:PSS were deposited by the spin-coating method. The electroluminescent polymer used in this work was MEH-PPV, also deposited by the spin-coating method. Aluminum was deposited by thermal evaporation for the cathode. The devices encapsulation was performed in Argon inert atmosphere to reduce the degradation effects through oxygen and light. The use of Hole Transport Layers (HTLs) resulted in a sensitive decrease in the devices operating voltage value when films of PAni:PVS and PAni:Ni-TS-Pc were used. The operating voltage values have decreased from 12 V to 3 V in relation to the devices assembled without the usage of HTLs. By the use of Atomic Force Microscopy measurements the thickness of the bilayers and the surface roughness of the PAni:PVS films was obtained to correlate these results with the devices electric characteristics. Thicknesses of 3 to 4 nm (for one bilayer) resulted in operating voltage of 3 V. It was possible to verify also, by UVVIS Spectroscopy, that this type of PAni:PVS films absorbs light in a different frequency than that emitted by MEH-PPV. Electric measurements in the direct current, Current vs. Voltage curves and, in alternating current, Impedance Spectroscopy, were performed in devices to determine the operating voltage value and to study the interface effects in the different layers used in the devices. Analyzing the curves obtained by the impedance spectroscopy, it was possible to determine the values of the equivalent circuit components (capacitors and resistors) and, with that, to simulate the behavior of these devices through electric circuits even before they were manufactured. By the experimental results, all the HTLs studied have contributed to a sensitive decrease in the devices operating voltage, indicating them as excellent materials to be used to reach a higher efficiency and a better performance of these devices.

The scaling down of Complementary Metal Oxide Semiconductor (CMOS) transistors requires replacement of conventional silicon dioxide layer with higher dielectric constant (K) material for gate dielectric. In order to reduce the gate leakage current, and also to maximize gate capacitance, ‘high K’ gate oxide materials such as Al2O3, ZrO2, HfO2, Ta2O5, TiO2, Er2O3, La2O3, Pr2O3, Gd2O3, Y2O3, CeO2 etc. and some of their silicates such as ZrxSi1–xOy, HfxSi1–xOy, AlxZr1–xO2 etc. are under investigation. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternate gate dielectric are (a) permittivity, band gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the materials/process used in CMOS devices and (f) reliability. In this study titanium dioxide (TiO2) is chosen as an alternate to silicon dioxide (SiO2). This thesis work is aimed at the study of the influence of process parameters like deposition rate, substrate temperature and annealing temperature on the electrical properties like maximum capacitance, dielectric constant, fixed charge, interface trapped charge and leakage current. For making this analysis we have used p–type single crystal silicon (<100>) as substrates and employed direct current (DC) reactive magnetron sputtering method with Titanium metal as target and Oxygen as reactive gas. TiO2 thin films have been deposited with an expected thickness of 50 nm with different deposition rates starting from 0.8 nm/minute to 2 nm/minute with different substrate temperatures (ambient temperature to 500ºC). Some of the samples are annealed at 750ºC in oxygen atmosphere for 30 minutes. SENTECH make Spectroscopic Ellipsometer is used for analyzing the optical properties such as thickness, refractive index etc. The thicknesses of all the samples that are extracted from the Ellipsometry are varying from 35 ± 2 nm to 50 ± 5 nm. Agilent make 4284A model L−C−R meter along with KarlSUSS wafer probe station is used for the C − V measurements and Keithley make 6487 model Pico ammeter/Voltage source is used for the I−V measurements. MOS capacitors have been fabricated with Aluminium as top electrode to perform the bi directional Capacitance−Voltage and also Current−Voltage analysis. The X–ray diffraction studies on the samples deposited at 500ºC showed that the films are amorphous. Dielectric constant (K) and effective substrate doping concentration (Na), flat band voltage (VFB), hysteresis, magnitude of fixed charges (Qf) as well as interface states density (Dit') and Equivalent Oxide Thickness (EOT) are obtained from the bi directional C−V analysis. A maximum dielectric constant of 18 is achieved with annealed samples. The best value of fixed charge density we have achieved is 1.2 x1011 per cm2 corresponding to the deposition rate of 2.0 nm/minute and with 500ºC substrate temperature. The ranges of Qf values that we have obtained are varying from 1.2x 1011 − 1.0 x1012 per cm2. It was also found that, the samples deposited at higher substrate temperatures show lower Qf values than the samples deposited at lower temperatures. The same trend is observed in case of interface states density also. The range of Dit' values we have obtained are in the range of 1.0 x 1012 cm–2eV–1 to 9x1012 cm–2eV–1. The best value of Dit' we have obtained is 1.0x1012 cm–2 eV–1 for the sample deposited at 0.8 nm/minute deposition rate and with substrate temperature of 400ºC. From the flat band voltage values of different set of samples, it was found that the flat band voltage is decreasing and in turn trying to approach the analytical value for the films deposited at higher deposition rates. The minimum EOT that we have achieved is 11 nm that corresponds to the film, which is annealed at 750ºC in oxygen atmosphere. From the I−V analysis it was found that the leakage current density is increasing with increase in substrate temperature and the same trend is observed with annealed films also. The minimum leakage current density achieved is 1.72x10–6 A/cm2 at a gate bias of 1V (corresponding field of 0.3 MV/cm). From the time dependent dielectric breakdown analysis it was found that the leakage current is exhibiting a constant value during the entire voltage stress time of 23 minutes. From the I–V characteristics it was found that the leakage current is following the Schottky emission characteristics at lower electric fields (< 1MV/cm) and is following the Fowler–Nordheim tunneling mechanism at higher electric fields. Since our aim is to study the electrical properties of titanium dioxide thin films for the application as high K gate dielectric in microelectronic applications more emphasis is given on the electrical properties. The maximum dielectric constant we have achieved is in the comparable range of the values for this parameter. The leakage current density values obtained are higher than the required for the microelectronic devices, where as the interface state density values and fixed charge density values are in the same range of values that are reported with this particular oxide and more care has to be taken to minimize these parameters. The EOT values we have achieved are also falling into the range of values that it actually takes as it was reported in the literature.

No presente trabalho foi realizado o estudo das propriedades ópticas e elétricas de dispositivos eletroluminescentes poliméricos, conhecidos como diodos emissores de luz poliméricos (PLEDs), e o desenvolvimento de camadas transportadoras de carga (HTL), que visam promover um aumento da eficiência elétrica dos dispositivos. Para o estudo das propriedades ópticas e elétricas dos PLEDs, foram fabricados dispositivos com estruturas do tipo Ânodo/HTL/Polímero Eletroluminescente/Cátodo. Foram apresentadas todas as etapas de fabricação dos dispositivos, assim como seus processos de caracterização. Para o ânodo, foi utilizado um óxido transparente condutor, óxido de índio-estanho - ITO, com tratamento superficial em plasma de oxigênio. Foram estudados três materiais diferentes para as HTLs. Filmes de PAni:PVS ou PAni:Ni-TS-Pc foram depositados pela técnica de automontagem (Layer-by-Layer) e os filmes de PEDOT:PSS foram depositados pelo método de spin-coating. O polímero eletroluminescente utilizado neste trabalho foi o MEH-PPV, também depositado pelo método de spin-coating. Para o cátodo foi utilizado o alumínio, evaporado termicamente. O encapsulamento dos dispositivos foi realizado em atmosfera inerte de argônio para diminuir os efeitos de degradação através do oxigênio e da luz. O emprego de camadas transportadoras de buracos (HTLs) resultou numa sensível diminuição no valor da tensão de operação dos dispositivos, quando empregados filmes de PAni:PVS e PAni:Ni-TS-Pc. Os valores das tensões de operação baixaram de 12 V para cerca de 3 V em relação aos dispositivos fabricados sem a utilização de HTLs. Através da microscopia de força atômica, foi possível determinar a espessura das bicamadas e a rugosidade superficial dos filmes de PAni:PVS para correlacionar estes resultados com a resposta elétrica dos dispositivos. Espessuras de 4nm (para 1 bicamada) resultaram em tensões de operação de 3 V. Foi possível verificar também, por espectroscopia no UV-VIS, que este tipo de filme absorve luz em freqüência diferente daquela emitida pelo MEH-PPV. Medidas elétricas em regime de corrente contínua, curvas de Corrente vs. Tensão e, em regime de corrente alternada, espectroscopia de impedância, foram realizadas em dispositivos para determinar o valor da tensão de operação e estudar os efeitos de interface nas diferentes camadas que compõe um dispositivo. Através das curvas obtidas pela espectroscopia de impedância, foi possível determinar os valores dos componentes dos circuitos equivalentes (capacitores e resistores). Com isso, é possível simular o comportamento destes dispositivos através de circuitos elétricos antes mesmo de serem fabricados. Pelos resultados obtidos, todas as HTLs estudadas contribuíram para uma sensível diminuição no valor da tensão de operação dos dispositivos, apontando-os como excelentes materiais a serem utilizados com o objetivo de alcançar uma maior eficiência e um melhor desempenho destes dispositivos. / In the present work, the study of the optical and electrical properties of polymeric electroluminescent devices known as Polymer Light-Emitting Diodes (PLEDs) and the development of Hole Transport Layers (HTLs) to promote an increase of the electrical efficiency of the devices was performed. PLEDs were constructed with structures like Anode/HTL/Electroluminescent Polymer/Cathode in order to study the optical and electrical properties of these devices. All the stages of the devices production were presented, as well as its characterization processes. For the anode a conductive transparent oxide (Indium Tin Oxide - ITO) with a superficial oxygen plasma treatment was used. Three different materials for the HTLs were used. Films of PAni:PVS or PAni:Ni-TS-Pc were deposited by the self-assembly technique (Layer-by-Layer) and the films of PEDOT:PSS were deposited by the spin-coating method. The electroluminescent polymer used in this work was MEH-PPV, also deposited by the spin-coating method. Aluminum was deposited by thermal evaporation for the cathode. The devices encapsulation was performed in Argon inert atmosphere to reduce the degradation effects through oxygen and light. The use of Hole Transport Layers (HTLs) resulted in a sensitive decrease in the devices operating voltage value when films of PAni:PVS and PAni:Ni-TS-Pc were used. The operating voltage values have decreased from 12 V to 3 V in relation to the devices assembled without the usage of HTLs. By the use of Atomic Force Microscopy measurements the thickness of the bilayers and the surface roughness of the PAni:PVS films was obtained to correlate these results with the devices electric characteristics. Thicknesses of 3 to 4 nm (for one bilayer) resulted in operating voltage of 3 V. It was possible to verify also, by UVVIS Spectroscopy, that this type of PAni:PVS films absorbs light in a different frequency than that emitted by MEH-PPV. Electric measurements in the direct current, Current vs. Voltage curves and, in alternating current, Impedance Spectroscopy, were performed in devices to determine the operating voltage value and to study the interface effects in the different layers used in the devices. Analyzing the curves obtained by the impedance spectroscopy, it was possible to determine the values of the equivalent circuit components (capacitors and resistors) and, with that, to simulate the behavior of these devices through electric circuits even before they were manufactured. By the experimental results, all the HTLs studied have contributed to a sensitive decrease in the devices operating voltage, indicating them as excellent materials to be used to reach a higher efficiency and a better performance of these devices.

Here, silicon oxide was formed in a U-shaped trench of a power metal-oxide semiconductor field-effect transistor device by various processes. One SiO₂ formation process was performed in multiple steps to create a low-defect Si-SiO₂ interface, where first a thin initial oxide was grown by thermal oxidation followed by the deposition of a much thicker oxide layer by chemical vapor deposition (CVD). In a second novel approach, silicon nitride CVD was combined with radical oxidation to form silicon oxide in a stepwise sequence. The resulting stack of silicon oxide films was then annealed at temperatures between 1000 and 1100 °C. All processes were executed in an industrial environment using 200 mm-diameter (100)-oriented silicon wafers. The goal was to optimize the trade-off between wafer uniformity and conformality of the trenches. The thickness of the resulting silicon oxide films was determined by ellipsometry of the wafer surface and by scanning electron microscopy of the trench cross sections. The insulation properties such as gate leakage and electrical breakdown were characterized by current–voltage profiling. The electrical breakdown was found to be highest for films treated with rapid thermal processing. The films fabricated via the introduced sequential process exhibited a breakdown behavior comparable to films deposited by the common low-pressure CVD technique, while the leakage current at electric fields higher than 5 MV/cm was significantly lower.

The present research work mainly focuses on the fabrication and characterization of single and multilayer thin films based on Bismuth Vanadate (BVO) and Bismuth Titanate (BTO). The multi-target laser ablation technique was used to fabricate single layer thin films of BVO, BVN and BTO; and multilayers composed of BVO and BTO in different structures. The fabricated thin films exhibited dense microstructure and a sharp interface with the substrate. The lattice strain, surface roughness and grain size could be varied as functions of composition and individual layer thickness in different structure fabricated. The optical properties were studied by spectroscopic ellipsometry and optical transmission spectra. The various models that were used for ellipsometric data analysis gave an excellent fitting to the experimental data. The optical constants were determined through multilayer analyses of the films. The band gap of these films was studied by spectroscopic ellipsometry and optical transmission. The optical studies carried out on BVO-BTO bilayer indicated the presence of an interfacial layer in between the BVO and BTO layer, whose refractive index was different from that of the individual layers and is attributed to different nature of the interfacial layer. The ferroelectric nature of BVO films was confirmed by P-E hysteresis loop studies under different applied fields and at various probing frequencies. The same was corroborated via the C-V measurements of these BVO films which exhibited butterfly shaped C-V characteristics. Fatigue studies in these films indicated that the switchable polarization is essentially constant through 105 cycles, after which it starts increasing probably due to the ionic conduction in BVO thin films. The dielectric response of undoped and Nb doped BVO as well as BVBT ML thin films were studied over a wide range of temperatures. The BVO films exhibited remarkable dielectric dispersion at low frequencies especially in the high temperature regime. Further, the frequency and temperature dependence of the dielectric, impedance, modulus and conductivity spectra of these films were investigated in detail. The ac conductivity was found to obey well the double power law in case of ML, indicating the different contributions to the conductivity, the low frequency conductivity being due to the short range translational hopping and the high frequency conductivity is due to the localized or reorientational hopping motion. DC leakage conduction in BVO, BVN and BVBT ML thin films was studied over a wide range of temperatures and applied electric fields. The experimental data were analyzed in light of different models to investigate the dc conduction mechanism in these films which were broadly classified into electrode limited and bulk limited conduction processes. In the case of BVO thin films the dc leakage current exhibited an ohmic nature at low electric fields followed by an onset of the space charge limited conduction (>1). Further in case of BVN films, three distinct regions were observed in I-V characteristics signifying different types of conduction processes in these films. In case of BVBT ML thin films, bulk limited PF mechanism was found to determine the conduction behavior at moderate electric fields. At higher electric fields, a trap filled region was observed which was followed by SCL conduction at higher fields. Therefore the present observation indicates the presence of more than one bulk limited conduction process in BVBT ML thin films. BVO thin films exhibiting good structure and dense morphology were successfully prepared on p-type Si by chemical solution decomposition technique. The C-V characteristics were evaluated for Au/BVO/Si MFS structure which showed a typical high frequency feature of a conventional MFIS structure.

Modulation doped heterostructures have revolutionized the operation of field effect devices by increasing the speed of operation. One of the factors that affects the speed of operation of these devices is the mobility of the carriers, which is intrinsic to the material used. Mobility of electrons in silicon based devices has improved drastically over the years, reaching as high as 50.000cm2/Vs at 4.2K and 2600cm2/Vs at room temperature. However, the mobility of holes in p-type silicon devices still remains comparatively lesser than the electron mobility because of large effective masses and complicated valence band structure involved. Germanium is known to have the largest hole mobility of all the known semiconductors and is considered most suitable to fabricate high speed p-type devices. Moreover, it is also possible to integrate germanium and its alloy (Si1_zGex ) into the existing silicon technology. With the use of sophisticated growth techniques it has been possible to grow epitaxial layers of silicon and germanium on Si1_zGex alloy layers grown on silicon substrates. In tills thesis we investigate in detail the electrical properties of p-type germanium and n-type silicon thin films grown by these techniques. It is important to do a comparative study of transport in these two systems not only to understand the physics involved but also to study their compatibility in complementary field effect devices (cMODFET). The studies reported in this thesis lay emphasis both on the low and high field transport properties of these systems. We report experimental data for the maximum room temperature mobility of holes achieved m germanium thin films grown on Si1_zGex layers that is comparable to the mobility of electrons in silicon films. We also report experiments performed to study the high field degradation of carrier mobility due to "carrier heating" in these systems. We also report studies on the effect of lattice heating on mobility of carriers as a function of applied electric field. To understand the physics behind the observed phenomenon, we model our data based on the existing theories for low and high field transport. We report complete numerical calculations based on these theories to explain the observed qualitative difference in the transport properties of p-type germanium and ii-type silicon systems. The consistency between the experimental data and theoretical modeling reported in this work is very satisfactory.