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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

Characterization and design of embedded passive circuits for applications up to millimeter-wave frequency

Hwang, Seunghyun Eddy 28 June 2011 (has links)
The goal of the research in this dissertation is to develop techniques for 1) system-on-package integration of passive circuits using ultra-thin advanced polymers called RXP (Rogers experimental polymer), 2) extraction of frequency-dependent material properties up to millimeter-wave frequency, 3) development and synthesis of high-rejection filter topologies, 4) design and characterization of high performance miniaturized embedded passive circuits for microwave and millimeter-wave applications, and 5) development of via and through-silicon via (TSV) enhanced filter design method for integration in high-loss substrate. The RXP material is developed to reduce the layer-count for multi-layer configuration and adoption of advanced fabrication technologies. Frequency-dependent material properties of RXP, ceramic, and other materials have been extracted up to millimeter-wave frequency using parallel-plate resonator method. An automated extraction algorithm has been proposed to handle a large number of frequency samples efficiently. The accuracy of the extraction result has been improved by including the surface roughness effect for conductor operating at high frequency. Using extracted RXP material properties, 2.4/5 GHz WLAN bandpass filters have been designed and characterized. High-rejection bandpass filter topologies for narrow 2.4 GHz and wide 5 GHz have been proposed. The proposed topologies have been synthesized to provide design equations as well as graphical design methodologies using Z-parameters. A new capacitor design called 3D stitched capacitor has been proposed to achieve more symmetric layout by providing balanced shunt parasitics. The proposed topologies and design methodologies have been verified through the measurement of high-rejection RXP bandpass filters. Good correlation between the simulation and measurement was observed demonstrating an effective design methodology and embedding bandpass filters with good performance. Dual-band bandpass filters for WLAN applications have been implemented and measured. Instead of connecting two bandpass filter circuits, a new single bandpass filter topology has been developed with a compact size as well as high isolation between passbands. High-rejection duplexer has been designed in RXP substrate for chip-last embedded IC technology, and a novel matching circuit has been applied for the miniaturization as well. The 60 GHz V-band has special interest for wireless applications because of its high attenuation characteristics because of atmospheric oxygen. Millimeter-wave passive circuits such as bandpass filter, dual-band filter, and duplexer have been designed, and self-resonant frequency of passive components has been carefully avoided using the proposed method. For low-cost system integration, silicon interposer with through-silicon-via (TSV) technology has been studied. The filter design method for high-loss substrate has been proposed. The coupling characteristic of TSV has been investigated for obtaining good insertion loss in lossy substrates such as silicon, and TSV characteristics has been used to design bandpass and highpass filters. To demonstration of concept, bandpass filters with good insertion loss have been realized on high-loss FR4 substrate.
12

Strontium titanate thin films for ULSI memory and gate dielectric applications /

Lee, Jian-hung, January 2000 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 101-108). Available also in a digital version from Dissertation Abstracts.
13

Amorphous oxide semiconductors in circuit applications /

McFarlane, Brian Ross. January 1900 (has links)
Thesis (M.S.)--Oregon State University, 2009. / Printout. Includes bibliographical references (leaves 75-79). Also available on the World Wide Web.
14

Amorphous oxide semiconductors in circuit applications

McFarlane, Brian Ross 24 September 2008 (has links)
The focus of this thesis is the investigation of thin-film transistors (TFTs) based on amorphous oxide semiconductors (AOSs) in two circuit applications. To date, circuits implemented with AOS-based TFTs have been primarily enhancement-enhancement inverters, ring oscillators based on these inverters operating at peak frequencies up to ~400 kHz, and two-transistor one-capacitor pixel driving circuits for use with organic light-emitting diodes (OLEDS). The first application investigated herein is AC/DC rectification using two circuit configurations based on staggered bottom-gate TFTs employing indium gallium oxide (IGO) as the active channel layer; a traditional full bridge rectifier with diode-tied transistors and a cross-tied full-wave rectifier are demonstrated, which is analogous to what has been reported previously using p-type organic TFTs. Both circuit configurations are found to operate successfully up to at least 20 MHz; this is believed to be the highest reported operating frequency to date for circuits based on amorphous oxide semiconductors. Output voltages at one megahertz are 9 V and ~10.5 V, respectively, when driven with a differential 7.07 Vrms sine wave. This performance is superior to that of previously reported organic-based rectifiers. The second AOS-based TFT circuit application investigated is an enhancement-depletion (E-D) inverter based on heterogeneous channel materials. Simulation results using models based on a depletion-mode indium zinc oxide (IZO) TFT and an enhancement-mode IGO TFT result in a gain of ~15. Gains of other oxide-based inverters have been limited to less than 2; the large gain of the E-D inverter makes it well suited for digital logic applications. Deposition parameters for the IGO and IZO active layers are optimized to match the models used in simulation by fabricating TFTs on thermally oxidized silicon and patterned via shadow masks. Integrated IGO-based TFTs exhibit a similar turn-on voltage and decreased mobility compared to the shadow masked TFTs. However, the integrated IZO-based TFTs fabricated to date are found to be conductive and exhibit no gate modulation. Due to the conductive nature of the load, the fabricated E-D inverter shows no significant output voltage variation. This discrepancy in performance between the integrated and shadow-masked IZO devices is attributed to processing complications. / Graduation date: 2009

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