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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
11

BANDWIDTH EFFICIENT CONCATENATED CODES FOR EARTH OBSERVATION TELEMETRY

Calzolari, Gian Paolo, Cancellieri, Giovanni, Chiaraluce, Franco, Garello, Roberto 10 1900 (has links)
International Telemetering Conference Proceedings / October 22-25, 2001 / Riviera Hotel and Convention Center, Las Vegas, Nevada / Telemetry for Earth-Observation missions is characterized by very high data rates and stringent requirements. Channel codes both power and bandwidth efficient must be used to improve downlink performance and to achieve the very low values of error rates needed at the received side. In this paper, we review and analyzed three codes of possible interest for these applications: turbo codes, serial turbo codes and product codes. These schemes are evaluated and compared both by simulation and analytical techniques. A particular attention is devoted to complexity, a key issue for practical implementation at high data rates.
12

Optimisation of Iterative Multi-user Receivers using Analytical Tools

Shepherd, David Peter, RSISE [sic] January 2008 (has links)
The objective of this thesis is to develop tools for the analysis and optimization of an iterative receiver. These tools can be applied to most soft-in soft-out (SISO) receiver components. For illustration purposes we consider a multi-user DS-CDMA system with forward error correction that employs iterative multi-user detection based on soft interference cancellation and single user decoding. Optimized power levels combined with adaptive scheduling allows for efficient utilization of receiver resources for heavily loaded systems.¶ Metric transfer analysis has been shown to be an accurate method of predicting the convergence behavior of iterative receivers. EXtrinsic Information (EXIT), fidelity (FT) and variance (VT) transfer analysis are well-known methods, however the relationship between the different approaches has not been explored in detail. We compare the metrics numerically and analytically and derive functions to closely approximate the relationship between them. The result allows for easy translation between EXIT, FT and VT methods. Furthermore, we extend the $J$ function, which describes mutual information as a function of variance, to fidelity and symbol error variance, the Rayleigh fading channel model and a channel estimate. These $J$ functions allow the \textit{a priori} inputs to the channel estimator, interference canceller and decoder to be accurately modeled. We also derive the effective EXIT charts which can be used for the convergence analysis and performance predictions of unequal power CDMA systems.¶ The optimization of the coded DS-CDMA system is done in two parts; firstly the received power levels are optimized to minimize the power used in the terminal transmitters, then the decoder activation schedule is optimized such that the multi-user receiver complexity is minimized. The uplink received power levels are optimized for the system load using a constrained nonlinear optimization approach. EXIT charts are used to optimize the power allocation in a multi-user turbo-coded DS-CDMA system. We show through simulation that the optimized power levels allow for successful decoding of heavily loaded systems with a large reduction in the convergence SNR.¶ We utilize EXIT chart analysis and a Viterbi search algorithm to derive the optimal decoding schedule for a multi component receiver/decoder. We show through simulations that decoding delay and complexity can be significantly reduced while maintaining BER performance through optimization of the decoding schedule.
13

Hardware Accelerator for Duo-binary CTC decoding : Algorithm Selection, HW/SW Partitioning and FPGA Implementation

Bjärmark, Joakim, Strandberg, Marco January 2006 (has links)
<p>Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be lowered by using higher transmission power or by using an effective error correcting code. Power consumption and limits for electromagnetic radiation are two of the main problems with handheld devices today and an efficient error correcting code will lower the transmission power and therefore also the power consumption of the device. </p><p>Duo-binary CTC is an improvement of the innovative turbo codes presented in 1996 by Berrou and Glavieux and is in use in many of today's standards for radio communication i.e. IEEE 802.16 (WiMAX) and DVB-RSC. This report describes the development of a duo-binary CTC decoder and the different problems that were encountered during the process. These problems include different design issues and algorithm choices during the design.</p><p>An implementation in VHDL has been written for Alteras Stratix II S90 FPGA and a reference-model has been made in Matlab. The model has been used to simulate bit error rates for different implementation alternatives and as bit-true reference for the hardware verification.</p><p>The final result is a duo-binary CTC decoder compatible with Alteras Stratix II designs and a reference model that can be used when simulating the decoder alone or the whole signal processing chain. Some of the features of the hardware are that block sizes, puncture rates and number of iterations are dynamically configured between each block Before synthesis it is possible to choose how many decoders that will work in parallel and how many bits the soft input will be represented in. The circuit has been run in 100 MHz in the lab and that gives a throughput around 50Mbit with four decoders working in parallel. This report describes the implementation, including its development, background and future possibilities.</p>
14

A Low-Power Implementation of Turbo Decoders

Tang, Weihua January 2007 (has links)
<p>In the 3G standards, wireless communication system can support 2 Mb/s. With this data rate, multimedia communication is realized on handset. However, it is expected that new applications will require even higher data rates in future. In order to fulfil the growing requirement of high data rate, 100 Mb/s is considered as the aim of 4G standards. Such high data rate will result in very large power consumption, which is unacceptable considering the current battery capability. Therefore, reducing the power consumption of turbo decoders becomes a major issue to be solved. This report explores new techniques for implementing low power, small area and high throughput turbo decoders.</p>
15

Application of Turbo-Codes in Digital Communications

Haj Shir Mohammadi, Atousa January 2001 (has links)
This thesis aims at providing results and insight towards the application of turbo-codes in digital communication systems, mainly in three parts. The first part considers systems of combined turbo-code and modulation. This section follows the pragmatic approach of the first proposed such system. It is shown that by optimizing the labeling method and/or modifying the puncturing pattern, improvements of more than 0. 5 dB insignal to noise ratio (SNR) are achieved at no extra cost of energy, complexity, or delay. Conventional turbo-codes with binary signaling divide the bit energy equally among the transmitted turbo-encoder output bits. The second part of this thesis proposes a turbo-code scheme with unequal power allocation to the encoder output bits. It is shown, both theoretically and by simulation, that by optimizing the power allocated to the systematic and parity check bits, improvements of around 0. 5 dB can be achieved over the conventional turbo-coding scheme. The third part of this thesis tackles the question of ``the sensitivity of the turbo-code performance towards the choice of the interleaver'', which was brought up since the early studies of these codes. This is the first theoretical approach taken towards this subject. The variance of the bound is evaluated. It is proven that the ratio of the standard deviation over the mean of the bound is asymptotically constant (for large interleaverlength, N), decreases with N, and increases with SNR. The distribution of the bound is also computationally developed. It is shown that as SNR increases, a very low percentage of the interleavers deviate quite significantly from the average bound but the majority of the random interleavers result in performances very close to the average. The contributions of input words of different weights in the variance of performance bound are also evaluated. Results show that these contributions vary significantly with SNR and N. These observations are important when developing interleaver design algorithms.
16

Hardware Accelerator for Duo-binary CTC decoding : Algorithm Selection, HW/SW Partitioning and FPGA Implementation

Bjärmark, Joakim, Strandberg, Marco January 2006 (has links)
Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be lowered by using higher transmission power or by using an effective error correcting code. Power consumption and limits for electromagnetic radiation are two of the main problems with handheld devices today and an efficient error correcting code will lower the transmission power and therefore also the power consumption of the device. Duo-binary CTC is an improvement of the innovative turbo codes presented in 1996 by Berrou and Glavieux and is in use in many of today's standards for radio communication i.e. IEEE 802.16 (WiMAX) and DVB-RSC. This report describes the development of a duo-binary CTC decoder and the different problems that were encountered during the process. These problems include different design issues and algorithm choices during the design. An implementation in VHDL has been written for Alteras Stratix II S90 FPGA and a reference-model has been made in Matlab. The model has been used to simulate bit error rates for different implementation alternatives and as bit-true reference for the hardware verification. The final result is a duo-binary CTC decoder compatible with Alteras Stratix II designs and a reference model that can be used when simulating the decoder alone or the whole signal processing chain. Some of the features of the hardware are that block sizes, puncture rates and number of iterations are dynamically configured between each block Before synthesis it is possible to choose how many decoders that will work in parallel and how many bits the soft input will be represented in. The circuit has been run in 100 MHz in the lab and that gives a throughput around 50Mbit with four decoders working in parallel. This report describes the implementation, including its development, background and future possibilities.
17

A Low-Power Implementation of Turbo Decoders

Tang, Weihua January 2007 (has links)
In the 3G standards, wireless communication system can support 2 Mb/s. With this data rate, multimedia communication is realized on handset. However, it is expected that new applications will require even higher data rates in future. In order to fulfil the growing requirement of high data rate, 100 Mb/s is considered as the aim of 4G standards. Such high data rate will result in very large power consumption, which is unacceptable considering the current battery capability. Therefore, reducing the power consumption of turbo decoders becomes a major issue to be solved. This report explores new techniques for implementing low power, small area and high throughput turbo decoders.
18

Application of Turbo-Codes in Digital Communications

Haj Shir Mohammadi, Atousa January 2001 (has links)
This thesis aims at providing results and insight towards the application of turbo-codes in digital communication systems, mainly in three parts. The first part considers systems of combined turbo-code and modulation. This section follows the pragmatic approach of the first proposed such system. It is shown that by optimizing the labeling method and/or modifying the puncturing pattern, improvements of more than 0. 5 dB insignal to noise ratio (SNR) are achieved at no extra cost of energy, complexity, or delay. Conventional turbo-codes with binary signaling divide the bit energy equally among the transmitted turbo-encoder output bits. The second part of this thesis proposes a turbo-code scheme with unequal power allocation to the encoder output bits. It is shown, both theoretically and by simulation, that by optimizing the power allocated to the systematic and parity check bits, improvements of around 0. 5 dB can be achieved over the conventional turbo-coding scheme. The third part of this thesis tackles the question of ``the sensitivity of the turbo-code performance towards the choice of the interleaver'', which was brought up since the early studies of these codes. This is the first theoretical approach taken towards this subject. The variance of the bound is evaluated. It is proven that the ratio of the standard deviation over the mean of the bound is asymptotically constant (for large interleaverlength, N), decreases with N, and increases with SNR. The distribution of the bound is also computationally developed. It is shown that as SNR increases, a very low percentage of the interleavers deviate quite significantly from the average bound but the majority of the random interleavers result in performances very close to the average. The contributions of input words of different weights in the variance of performance bound are also evaluated. Results show that these contributions vary significantly with SNR and N. These observations are important when developing interleaver design algorithms.
19

LDPC code-based bandwidth efficient coding schemes for wireless communications

Sankar, Hari 02 June 2009 (has links)
This dissertation deals with the design of bandwidth-efficient coding schemes with Low-Density Parity-Check (LDPC) for reliable wireless communications. Code design for wireless channels roughly falls into three categories: (1) when channel state information (CSI) is known only to the receiver (2) more practical case of partial CSI at the receiver when the channel has to be estimated (3) when CSI is known to the receiver as well as the transmitter. We consider coding schemes for all the above categories. For the first scenario, we describe a bandwidth efficient scheme which uses highorder constellations such as QAM over both AWGN as well as fading channels. We propose a simple design with LDPC codes which combines the good properties of Multi-level Coding (MLC) and bit-interleaved coded-modulation (BICM) schemes. Through simulations, we show that the proposed scheme performs better than MLC for short-medium lengths on AWGN and block-fading channels. For the first case, we also characterize the rate-diversity tradeoff of MIMO-OFDM and SISO-OFDM systems. We design optimal coding schemes which achieve this tradeoff when transmission is from a constrained constellation. Through simulations, we show that with a sub-optimal iterative decoder, the performance of this coding scheme is very close to the optimal limit for MIMO (flat quasi-static fading), MIMO-OFDM and SISO OFDM systems. For the second case, we design non-systematic Irregular Repeat Accumulate (IRA) codes, which are a special class of LDPC codes, for Inter-Symbol Interference (ISI) fading channels when CSI is estimated at the receiver. We use Orthogonal Frequency Division Multiplexing (OFDM) to convert the ISI fading channel into parallel flat fading subchannels. We use a simple receiver structure that performs iterative channel estimation and decoding and use non-systematic IRA codes that are optimized for this receiver. This combination is shown to perform very close to a receiver with perfect CSI and is also shown to be robust to change in the number of channel taps and Doppler. For the third case, we look at bandwidth efficient schemes for fading channels that perform close to capacity when the channel state information is known at the transmitter as well as the receiver. Schemes that achieve capacity with a Gaussian codebook for the above system are already known but not for constrained constellations. We derive the near-optimum scheme to achieve capacity with constrained constellations and then propose coding schemes which perform close to capacity. Through linear transformations, a MIMO system can be converted into non-interfering parallel subchannels and we further extend the proposed coding schemes to the MIMO case too.
20

Concatenated codes for the multiple-input multiple-output quasi-static fading channel

Gulati, Vivek 17 February 2005 (has links)
The use of multiple antennas at the transmitter and/or the receiver promises greatly increased capacity. This can be useful to meet the ever growing demand of wireless connectivity, provided we can find techniques to efficiently exploit the advantages of the Multiple-Input Multiple-Output (MIMO) system. This work explores the MIMO system in a flat quasi-static fading scenario. Such a channel occurs, for example, in packet data systems, where the channel fade is constant for the duration of a codeword and changes independently from one transmission to another. We first show why it is hard to compute the true constrained modulation outage capacity. As an alternative, we present achievable lower bounds to this capacity based on existing space-time codes. The bounds we compute are the fundamental limits to the performance of these space-time codes under maximum-likelihood decoding, optimal outer codes and asymptotically long lengths. These bounds also indicate that MIMO systems have different behavior under Gaussian signaling (unconstrained input) and under the finite alphabet setting. Our results naturally suggest the use of concatenated codes to approach near-capacity performance. However, we show that a system utilizing an iterative decoder has a fundamental limit – it cannot be universal and therefore it cannot perform arbitrarily close to its outage limit. Next, we propose two different transceiver structures that have good performance. The first structure is based on a novel BCJR-decision feedback decoder which results in performance within a dB of the outage limit. The second structure is based on recursive realizations of space-time trellis codes and uses iterative decoding at the receiver. This recursive structure has impressive performance even when the channel has time diversity. Thus, it forms the basis of a very flexible and robust MIMO transceiver structure.

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