<p>Denna rapport behandlar konstruktion och tillverkning av ett videokort till Versa Module Eurocard (VME) bussen. Kortet skall användas vid laborationer i kurser där mikrodatorkort VM42 från PEP Modular Computer används. Grafikkortet klarar en upplösning på minst 640x480 punkter med 24-bitars färg. Hela konstruktionen är uppbyggd kring Lattice^® MACH4A3-384/160. Designen av MACH kretsen är uppbyggd i Very High speed integrated hardware Description Language (VHDL) med hjälp av programmen ActiveHDL, Synplify Pro^®, ispDesignExpert samt LatticePRO. </p> / <p>This report is about the construction and fabrication of a video card for the Versa Module Euro card (VME) bus. The card will be used as a platform in laborations in courses including the VM42 microcontroller from PEP Modular Computer. The card is able to display a resolution of at least 640x480 pixels with 24bit color. The heart in the construction is the Lattice^® MACH4A3-384/160 Complex Programmable Logic Device (CPLD). All programming is done in Very High speed integrated hardware Description Language (VHDL) with the help of ActiveHDL, Synplify Pro^®, ispDesignExpert and LatticePRO software tools.</p>

<p>Digital Radio Frequency Memory (DRFM) is a technique widely used by the defense industry in, for example, electronic countermeasure equipment for generating false radar targets. The purpose of the DRFM technique is to use high-speed sampling to digitally store and recreate radio frequency and microwave signals. At Saab Bofors Dynamics AB the technique is used, among others, in the Electronic Warfare Simulator (ELSI). The DRFM technique is implemented in a full-custom ASIC circuit that has been mounted on circuit boards in ELSI. Today, the progress in the programmable hardware field has made it possible to implement the DRFM design in a Field Programmable Gate Array (FPGA). The FPGA technology has many advantages over a full custom ASIC design.</p><p>Hence, the purpose of this master's thesis has been to develop a new DRFM design that can be implemented in an FPGA, using a hardware description language called VHDL. The method for this master's thesis has been to first establish a time plan and a requirement specification. After that, a design specification has been worked out based on the requirement specification. The two specifications have served as a basis for the development of the DRFM circuit. One of the requirements on the design was that the circuit should be able to communicate through an external Ethernet interface. A part of the work has, thus, been to review available external Ethernet modules on the market. The result is a DRFM design that has been tested through simulations. The tests shows that the design works as described in the design specification.</p>

Digital Radio Frequency Memory (DRFM) is a technique widely used by the defense industry in, for example, electronic countermeasure equipment for generating false radar targets. The purpose of the DRFM technique is to use high-speed sampling to digitally store and recreate radio frequency and microwave signals. At Saab Bofors Dynamics AB the technique is used, among others, in the Electronic Warfare Simulator (ELSI). The DRFM technique is implemented in a full-custom ASIC circuit that has been mounted on circuit boards in ELSI. Today, the progress in the programmable hardware field has made it possible to implement the DRFM design in a Field Programmable Gate Array (FPGA). The FPGA technology has many advantages over a full custom ASIC design. Hence, the purpose of this master's thesis has been to develop a new DRFM design that can be implemented in an FPGA, using a hardware description language called VHDL. The method for this master's thesis has been to first establish a time plan and a requirement specification. After that, a design specification has been worked out based on the requirement specification. The two specifications have served as a basis for the development of the DRFM circuit. One of the requirements on the design was that the circuit should be able to communicate through an external Ethernet interface. A part of the work has, thus, been to review available external Ethernet modules on the market. The result is a DRFM design that has been tested through simulations. The tests shows that the design works as described in the design specification.

Denna rapport behandlar konstruktion och tillverkning av ett videokort till Versa Module Eurocard (VME) bussen. Kortet skall användas vid laborationer i kurser där mikrodatorkort VM42 från PEP Modular Computer används. Grafikkortet klarar en upplösning på minst 640x480 punkter med 24-bitars färg. Hela konstruktionen är uppbyggd kring Lattice® MACH4A3-384/160. Designen av MACH kretsen är uppbyggd i Very High speed integrated hardware Description Language (VHDL) med hjälp av programmen ActiveHDL, Synplify Pro®, ispDesignExpert samt LatticePRO. / This report is about the construction and fabrication of a video card for the Versa Module Euro card (VME) bus. The card will be used as a platform in laborations in courses including the VM42 microcontroller from PEP Modular Computer. The card is able to display a resolution of at least 640x480 pixels with 24bit color. The heart in the construction is the Lattice® MACH4A3-384/160 Complex Programmable Logic Device (CPLD). All programming is done in Very High speed integrated hardware Description Language (VHDL) with the help of ActiveHDL, Synplify Pro®, ispDesignExpert and LatticePRO software tools.

International Telemetering Conference Proceedings / October 17-20, 1994 / Town & Country Hotel and Conference Center, San Diego, California / This paper describes a system in which multiple embedded processors are used for real-time processing of telemetry streams from satellites and radars. Embedded EPC-5 modules are plugged into VME slots in a Loral System 550. Telemetry streams are acquired and decommutated by the System 550, and selected parameters are packetized and appended to a mailbox which resides in VME memory. A Windows-based program continuously fetches packets from the mailbox, processes the data, writes to log files, displays processing results on screen, and sends messages via a modem connected to a serial port.