Not available / text

Thesis (M.S.)--Oregon State University, 2009. / Printout. Includes bibliographical references (leaves 27-28). Also available on the World Wide Web.

Thesis (M.S.)--Oregon State University, 2006. / Printout. Includes bibliographical references (leaves 47-48). Also available on the World Wide Web.

Thesis (Ph. D.)--University of Texas at Austin, 2005. / Vita. Includes bibliographical references.

International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The U.S. Army’s Hardened Subminiature Telemetry and Sensor Systems (HSTSS) program has engaged the M/A-COM Corporation to work in the development of a highly accurate, crystal controlled telemetry transmitter chip set to be used in Army and other U.S. military munitions. A critical factor in this work is the operating environment of up to 100,000-g launch accelerations. To support the Army in this project, M/A-COM is developing integrated Voltage Controlled Oscillators (VCO) for L and S band, a silicon synthesizer/phase locked loop (PLL) IC, and a family of power amplifiers. Lastly, the transmitter module will be miniaturized and hardened using M/A-COM’s latest chip-onboard mixed technology manufacturing capabilities. This new chip set will provide the telemetry engineer with unprecedented design flexibility. This paper will review the overall transmitter system design and provide an overview for each functional integrated circuit.

Στη παρούσα διπλωματική εργασία μελετήθηκε, σχεδιάστηκε, προσομοιώθηκε και κατασκευάστηκε ένα σύστημα ενός ταλαντωτή το οποίο μειώνει τον θόρυβο φάσης (phase noise) σε εικονικά οποιονδήποτε ήδη υπάρχον ταλαντωτή ελεγχόμενου από τάση (VCO). Για να το πετύχει αυτό η προτεινόμενη τεχνική δανείζεται από την ιδέα του βρόχου κλειδωμένης φάσης (Phase Locked Loop) και με λίγα επιπλέον ηλεκτρονικά στοιχεία καθιστά δυνατή την μείωση του phase noise επηρεάζοντας σε μικρό βαθμό τα χαρακτηριστικά του VCO αλλά και δίνοντας την δυνατότητα παραμετροποίησης των χαρακτηριστικών ποιοτικών στοιχείων του τελικού ταλαντωτή που προκύπτει. Το σύστημα του ταλαντωτή κατασκευάστηκε σε πλακέτα(PCB) με διακριτά στοιχεία τα οποία παρέχονταν από το Εργαστήριο Ηλεκτρονικών Εφαρμογών. Το σύστημα αυτό μπορεί να ανταποκριθεί στις ραγδαία αυξανόμενες απαιτήσεις απόδοσης των ταλαντωτών στις σημερινές εφαρμογές, όσο αφορά στον χαμηλό θόρυβο φάσης, την χαμηλή κατανάλωση, την μικρή πολυπλοκότητα στο σχεδιασμό, την μικρή επιφάνεια και την ευκολία στην ολοκλήρωση. / The present diploma thesis pertains the study, design, simulation and implementation of an oscillator system that reduces phase noise in virtually any given already existing voltage controlled oscillator (VCO). To achieve that the proposed technique borrows from the idea of the Phase Locked Loop and with just a few extra electronic components it enables the reduction of phase noise ,by affecting the core characteristic qualities of the employed VCO only by a small fraction, as well as the optimization of the specifications of the resulting oscillator. This oscillator system was manufactured on a printed circuit board and implemented with discrete components which were supplied by the Applied Electronics Lab. This system can measure up to the increasing performance demands for oscillators by todays applications in terms of low phase noise, low power consumption, small design complexity, small area and ease of integration.

The Phase Locked Loops (PLLs) are widely used in contemporary electronic systems for frequency synthesis, clock recovery, frequency multiplication and other purposes. Because of continuous increase in operating frequency of clocking systems the requirements on the clock spectral purity and low jitter became very demanding and are one of major designers' concerns.Frequency synthesizers used in microprocessors are integrated on the same substrate as the rest of the circuit and thus suffer from a substantial switching noise injected into global supply and ground busses. Usually when the reference signal comes from a crystal oscillator, VCO becomes a main source of phase noise. A designer of VCO needs to determine the best circuit structure by considering different prototypical perturbations scenarios and predicting the worst case and jitter response when the perturbation signals are switched on and off. Therefore the time efficient estimation of the jitter effects resulting from many shapes, frequencies and phases of perturbation is critical.The presented dissertation demonstrates simulation methodology for rapid estimation of jitter in oscillators, particularly in VCOs, caused by perturbation sources such as power supply and substrate couplings. The methodology is also extended to these types of PLLs in which the VCO instability is a main contributor to the output timing jitter.Simulation of oscillatory circuits is strongly effected by the round-off errors. Special technique was developed to eliminate these effects.The technique is applicable for predicting timing non-idealities for arbitrary perturbation shapes, frequencies and phases. Different jitter metrics can be easily extracted for all important perturbation scenarios.The methodology utilizes the new concept of the transient multi-cycle Voltage Impulse Sensitivity Function (VISF), which has been developed in the dissertation. It contains information about sensitivity of oscillator to noise injection and also allows for efficient prediction of the transient effects caused by switching on and off the perturbation sources. The methodology offers efficiency and great simplicity of use, which frees designers from complicated, time consuming analysis of data generated by a simulator. The very involved postprocessing of simulation data can be fully automated.

Thesis (M.App.Sc.) - Carleton University, 2007. / Includes bibliographical references (p. 111-113). Also available in electronic format on the Internet.

Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006. / Swaminathan, Madhavan, Committee Chair ; Cressler, John D., Committee Co-Chair ; Kenney, Stevenson J., Committee Member ; Peterson, Andrew, Committee Member ; Durgin, Gregory, Committee Member ; Sitaraman, Suresh, Committee Member.

Thesis (MScEng (Electrical and Electronic Engineering))--Stellenbosch University, 2008. / The topic for this project entailed the development of a ‘Low Phase Noise – Microwave – Voltage Controlled Oscillator’ for use in radar applications. First of all, a low phase noise oscillator was designed. In order to minimise the phase noise of the oscillator, a high-Q, transmission line – cavity resonator was developed. By derivation it was confirmed that an optimal point for minimum phase noise does exist. The latter was done by evaluating the equation for the output power spectral density of the oscillator phase noise (as defined by Leeson’s Phase Noise Model) at its minimum point. Subsequently, the amount of power that needed to be dissipated inside the resonator could be compared to that dissipated in the source and the load. This identified the amount of coupling to the resonator allowed, assuring minimum phase noise. Since a specific amount of coupling to the resonator was sought after, it had to be practically feasible. Therefore several coupling techniques were investigated to ensure the most user-friendly way of tuning the amount of coupling to the resonator, and hence easily reaching the optimum point of minimum phase noise. After successful completion of the low phase noise oscillator design, it was modified for voltage controlled oscillator (VCO) use by means of variable tuning diodes. These varactor diodes were situated inside the cavity of the resonator. Again the most suitable position to place the diodes had to be determined. The latter was done through considerably detailed transmission line theory; where the loaded Q, the tuning bandwidth (amount of change in frequency reached) and the amount of power dissipated inside the resonator were measured against each other. By means of the necessary phase noise measurements, it was confirmed that in order to keep the phase noise to a minimum, the tuning bandwidth had to be kept small and the amount of power dissipated inside the resonator maximised; so as to keep the overall loaded Q-value of the circuit as high as possible.