• Refine Query
  • Source
  • Publication year
  • to
  • Language
  • 54
  • 14
  • 4
  • 4
  • 3
  • 2
  • 1
  • Tagged with
  • 89
  • 54
  • 36
  • 15
  • 11
  • 10
  • 10
  • 9
  • 8
  • 7
  • 7
  • 7
  • 6
  • 5
  • 5
  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Optimisation du couple revêtement anti-adhérent / matériau de creuset pour la cristallisation du silicium photovoltaïque - Application au moulage direct des wafers de Si / Optimisation of the releasing coating / crucible material couple for photovoltaic silicon crystallisation - Application to direct Si wafers moulding

Huguet, Charles 14 November 2012 (has links)
Compte tenu de l'utilisation envisagée du graphite comme matériau de creuset à la place de la silice frittée pour la cristallisation dirigée des lingots de silicium multcristallin de qualité photovoltaïque, un objectif majeur de la thèse était de développer un revêtement spécifique au matériau de moule sélectionné. Une première tâche de ce travail a consisté à définir très précisément les conditions de fonctionnement du couple revêtement anti-adhérent / matériau de creuset et les modifications à apporter au procédé afin d'utiliser le revêtement standard à base de poudre de Si3N4 sur graphite, La deuxième tâche de la thèse a consisté à mettre en place le procédé de moulage à partir d'une étude préliminaire basée sur une configuration simplifiée de moulage par écrasement où un morceau de silicium s'étale à l'intérieur du moule au cours de sa fusion. Le but recherché est de mettre en évidence les conséquences de la configuration « moulage » (caractérisée par un rapport élevé surface de contact / volume de Si a priori très défavorable) et des conditions thermiques (gradient et vitesse de solidification) sur l'adhérence (collage), la pollution par le revêtement et la structure cristalline du silicium. / Considering the use of graphite as a crucible material instead of sintered silica for the directional crystallisation process of multicrystalline solar grade silicon, one of the main goals of this PhD program was to develop a dedicated releasing coating to be used with the identified mould material. A first task of this work consisted in a precise definition of the operating conditions for the releasing coating / crucible material couple and consequently modifying the process in order to be able to use the standard silicon nitride powder-based releasing coating on graphite. The second task was to design the moulding process based on a preliminary study of a simplified configuration of squeezing moulding experiments where the silicon piece spreads into the inner space of the mould when melting. The aim of these experiments was to enlighten the consequences of the “moulding” configuration (characterised by a high contact surface / Si volume ratio, a priori very detrimental) and of the thermal conditions (gradient and solidification speed) on adhesion (sticking), pollution coming from the coating, and on the crystalline structure of moulded silicon.
52

Structure determination by low energy electron diffraction of GaN films on 6H-SiC(0001) substrate by molecular beam epitaxy

Ma, King-man, Simon. January 2005 (has links)
Thesis (Ph. D.)--University of Hong Kong, 2006. / Title proper from title frame. Also available in printed format.
53

Real-time malfunction diagnosis and prognosis of reactive ion etching using neural networks

Hong, Sang Jeen 01 December 2003 (has links)
No description available.
54

Fluorocarbon Post-Etch Residue Removal Using Radical Anion Chemistry

Timmons, Christopher L. 14 December 2004 (has links)
During fabrication of integrated circuits, fluorocarbon plasma etching is used to pattern dielectric layers. As a byproduct of the process, a fluorocarbon residue is deposited on exposed surfaces and must be removed for subsequent processing. Conventional fluorocarbon cleaning processes typically include at least one plasma or liquid treatment that is oxidative in nature. Oxidative chemistries, however, cause material degradation to next generation low-dielectric constant (low-k) materials that are currently being implemented into fabrication processes. This work addresses the need for alternative fluorocarbon-residue removal chemistries that are compatible with next generation low-k materials. Radical anion chemistries are known for their ability to defluorinate fluorocarbon materials by a reductive mechanism. Naphthalene radical anion solutions, generated using sodium metal, are used to establish cleaning effectiveness with planar model residue films. The penetration rate of the defluorination reaction into model fluorocarbon film residues is measured and modeled. Because sodium is incompatible with integrated circuit processing, naphthalene radical anions are alternatively generated using electrochemical techniques. Using electrochemically-generated radical anions, residue removal from industrially patterned etch structures is used to evaluate the process cleaning efficiency. Optimization of the radical anion concentration and exposure time is important for effective residue removal. The efficiency of removal also depends on the feature spacing and the electrochemical solvent chosen. The synergistic combination of radical anion defluorination and wetting or swelling of the residue by the solvent is necessary for complete removal. In order to understand the interaction between the solvent and the residue, the surface and interfacial energy are determined using an Owens/Wendt analysis. These studies reveal chemical similarities between specific solvents and the model residue films. This approach can also be used to predict residue or film swelling by interaction with chemically similar solvents.
55

Growth of 6H-SiC homoepitaxy on substrates off-cut between the [01-10] planes

Vandersand, James Dennis. January 2002 (has links)
Thesis (M.S.)--Mississippi State University. Department of Electrical and Computer Engineering. / Title from title screen. Includes bibliographical references.
56

Silicon wafer surface temperature measurement using light-pipe radiation thermometers in rapid thermal processing systems

Qu, Yan 28 August 2008 (has links)
Not available / text
57

Electrical parameter control for semiconductor manufacturing

Schoene, Clare Butler, 1979- 29 August 2008 (has links)
The semiconductor industry is highly competitive environment where modest improvements in the manufacturing process can translate to significant cost savings. An area where improvements can be realized is reducing the number of wafers that fail to meet their electrical specifications. Wafers that fail to meet electrical specifications are scrapped, which negatively impacts yield and increases manufacturing costs. Most of the existing semiconductor process control research has focused on controlling individual steps during the manufacturing process via run-to-run control, but almost no work has looked at directly controlling device electrical characteristics. Since meeting electrical specifications is so critical to reducing scrap a fab-wide electrical parameter control scheme is proposed to directly control electrical parameter values. The goal of the controller is reducing the variation in the electrical parameters. The control algorithm uses a model to predict electrical parameter values after each processing step. Based on this prediction the decision to make a control move is made. If a control move is necessary, optimal adjustments for the subsequent processing steps are determined. The process model is continually updated so that it reflects the current process. A simple implementation using a least squares model is first proposed. Simulations and an industrial case study demonstrate the potential improvements that can be achieved with the algorithm and the limitations of the simple implementation are discussed. A partial least squares modeling and control algorithm combined with missing data algorithms are proposed as enhancements to the electrical parameter control algorithm to address many of the issues faced when implementing such a control strategy in real manufacturing environments. The enhancements take the input variable correlations into account when making control moves and utilize the correlation structure to make better model predictions. Simulations are performed to determine the effectiveness of the enhancements. A cost function formulation and a Bayesian based alternative are also presented and evaluated. The cost function implementation uses a different method to determine the optimal set points for the subsequent processing steps than the other implementations use. Simulations are used to compare the cost function formulation with the other methods presented. The Bayesian implementation addresses the stochastic nature of the manufacturing process by dealing with the probabilities of events occurring. A simulation of the Bayesian algorithm is preformed and the algorithms limitations are discussed.
58

Synthesis and processing of KNN powders and thick films for MEMS devices

Lusiola, Tony January 2012 (has links)
Pb-free piezoelectric materials have grown in importance through increased environmental concern related to the presence of Pb and the subsequent legislation that has arisen including directives such as Waste Electrical and Electronic Equipment (WEEE) and the Restriction of Hazardous Substances Directive (RoHS). While much progress has been made on producing Pb-free bulk materials, the need to integrate these next generation Pb-free piezoelectric materials with substrates to form functional micro devices has received less attention and raises a number of challenges. With respect to the high temperature mixed oxide synthesis method, a simple, cost effective and robust low temperature molten hydroxide synthesis (MHS) method derived from the molten salt synthesis (MSS) method, has been developed to produce K0.5Na0.5NbO3 (KNN) small grain powders and is a method that lends itself easily to industrial scale up. A powder/sol gel composite ink film forming technique has been used to produce KNN thick films on silicon substrates. Characterisation of the produced films has shown the films to exhibit piezoelectric coefficients for un-doped material in the region of 30pC/N. The work will report on the Na ion favouring mechanism of the MSS and the related mechanism of the MHS. The work will also report on the dielectric and piezoelectric characteristics of initial KNN thick films produced and an investigation into use of dopants and process modification to improve the KNN thick film’s characteristics.
59

Effect of dislocation density on residual stress in polycrystalline silicon wafers

Garcia, Victoria 06 March 2008 (has links)
The goal of this research was to examine the relationship between dislocation density and in-plane residual stress in edge-defined film-fed growth (EFG) silicon wafers. Previous research has shown models for linking dislocation density and residual stress based on temperature gradient parameters during crystal growth. Residual stress and dislocation density have a positive relationship for wafers with very low dislocation density such as Cz wafers. There has been limited success in experimental verifications of residual stress for EFG wafers, without any reference to dislocation density. No model of stress relaxation has been verified experimentally in post production wafers. A model that assumes stress relaxation and links residual stress and dislocation density without growth parameters will be introduced here. Dislocation density and predominant grain orientation of EFG wafers have been measured by the means of chemical etching/optical microscope and x-ray diffraction, respectively. The results have been compared to the residual stress obtained by a near infrared transmission polariscope. A model was established to explain the results linking dislocation density and residual stress in a randomly selected EFG wafer.
60

Copper tin intermetallic compounds in flip chip interconnections

Lynch, Brian John. January 1995 (has links) (PDF)
Thesis (M.S.)--San Jose State University, 1995. / Adviser: Guna S. Selvaduray. Includes bibliographical references.

Page generated in 0.0405 seconds