Global ETD Search

1	An Incremental Approach to Discovering Regional Network Access Patterns Tzeng, Yung-Shuen 18 July 2001 (has links) This thesis proposes an incremental algorithm to discover regional network access patterns from traffic data of a regional network. Because the size of network traffic database is very large, we need to develop a fast algorithm of association rules in order to efficiently generate user access patterns. Attributed relational graph is used to represent user access patterns on the network. The change of relational graph indicates the access pattern of a regional network is changed. In order to keep the network access pattern up to date without spending great computation costs, we propose an incremental procedure to generalize network access patterns from time to time. The results can be used for supporting network administrators to easily keep track of network usage patterns and better manage regional networks access patterns attributed relational graph association rules incremental large access graph large access graph network traffic data mining
2	Identifying Network Dynamics with Large Access Graph and Case-Based Reasoning Lin, Yi-Yao 11 July 2002 (has links) This study adopts large access graph algorithm and case-base reasoning approach to generalize user access patterns and diagnose network events respectively for facilitating the network management. Large access graph (LAG) algorithm discovers the frequently inter-connections among hosts to provide an overview of network access relation. The case-based reasoning (CBR) system diagnoses the instant network events with the past experience. NetFlow log data collected from the router of the dormitory network of National Sun Yat-Sen University is used for demonstrating these two methods. The evaluation results measured by recall, precision, and accuracy show that these two mechanisms are useful to support the network administer to keep track of network access relations and diagnose the network events. large access graph network management case-based reasoning NetFlow case similarity
3	An Optimization Framework for Embedded Processors with Auto-Modify Addressing Modes Lau, ChokSheak 08 December 2004 (has links) Modern embedded processors with dedicated address generation unit support memory accesses using indirect addressing mode with auto-increment and auto-decrement. The auto-increment/decrement mode, if properly utilized, can save address arithmetic instructions, reduce static and dynamic footprint of the program and speed up the execution as well. We propose an optimization framework for embedded processors based on the auto-increment and decrement addressing modes for address registers. Existing work on this class of optimizations focuses on using an access graph and finding the maximum weight path cover to find an optimized stack variables layout. We take this further by using coalescing, addressing mode selection and offset registers to find further opportunities for reducing the number of load-address instructions required. We also propose an algorithm for building the layout with considerations for memory accesses across basic blocks, because existing work mainly considers intra-basic-block information. We then use the available offset registers to try to further reduce the number of address arithmetic instructions after layout assignment. 56300 Motorola DSP56300 Graph coloring Embedded systems Embedded processors Compiler optimization Offset assignment Address generation SOA GOA Coalesce Stack size GCC Address register Offset register Modify register Digital signal processing DSP Interference graph Access graph

1

Page generated in 0.0345 seconds