The use of desiccant materials is crucial in many applications, such as dehumidification rotors, in OLED screen and as desiccant materials in dish washers, for example. Upsalite® is a novel, anhydrous, micro-mesoporous, and large surface area structure consisting of amorphous magnesium carbonate which has been shown to exhibit a good water sorption capacity. Depending on the heat treatment of Upsalite® after synthesis, the material exhibits different sorption capacity and hydrolytic stability. Calcined Upsalite® has a higher sorption capacity compared to as-synthesized, but crystallizes into nesquehonite when stored in a relative humidity of 100 % for several days. The need to stabilize the material arises and the use of two different aminosilanes as surface stabilizers has been evaluated. Two different deposition techniques from gas phase have been used, atomic layer deposition and vapor phase grafting, which are evaluated and compared.   The results of the functionalization show an increase in decomposition temperature by ~25 °C of the functionalized materials compared to non-functionalized. The initial water sorption capacity of the functionalized material increases by up to 80 %, when stored in a relative humidity of 100 % for 24 h and shows a stabilizing effect after five cycles of repeated exposure to high humidity. The long term stability seems to have decreased due to pore collapse, when the functionalized material is cycled 5 times for one week in a repeated relative humidity of 100 %. The stability of the material when exposed to two liquids of different pH was also evaluated and the functionalized material exhibits a slower increase of the pH in the buffer solution, implying a retardation of Upsalite® dissolution. The conclusion is that a functionalization of the material with aminosilane increases the initial sorption capacity and has a stabilizing effect.

In order to continue with metal-oxide-semiconductors (CMOS) transistor scaling and to reduce the power density, the channel should be replaced with a material having a higher electron mobility, such as a III-V semiconductor. However, the integration of III-V's is a challenge because these materials oxidize rapidly when exposed to air and the native oxide produced is characterized by a high density of defects. Deposition of high-k materials on III-V semiconductors using Atomic Layer Deposition (ALD) reduces the thickness of these oxides, improving the semiconductor/oxide interface quality and the transistor electrical characteristics. In this work, ALD is used to deposit two dielectrics, Al₂O₃ and TiO₂, on two III-V materials, GaAs and InGaAs, and in-situ X-ray photoelectron spectroscopy (XPS) and in-situ thermal programmed desorption (TPD) are used for interface characterization. Hydrofluoric acid (HF) etching of GaAs(100) and brief reoxidation in air produces a 9.0 ± 1.6 Å-thick oxide overlayer containing 86% As oxides. The oxides are removed by 1 s pulses of trimethylaluminum (TMA) or TiCl₄. TMA removes the oxide overlayer while depositing a 7.5 ± 1.6 Å thick aluminum oxide. The reaction follows a ligand exchange mechanism producing nonvolatile Al-O species that remain on the surface. TiCl₄ exposure removes the oxide overlayer in the temperature range 89°C to 300°C, depositing approximately 0.04 monolayer of titanium oxide for deposition temperatures from 89°C to 135°C, but no titanium oxide is present from 170°C to 230°C. TiCl₄ forms a volatile oxychloride product and removes O from the surface while leaving Cl atoms adsorbed to an elemental As layer, chemically passivating the surface. The native oxide of In(0.53)Ga(0.47)As(100) is removed using liquid HF and gas phase HF before deposition of Al₂O₃ using TMA and H₂O at 170°C. An aluminium oxide film with a thickness of 7.2 ± 1.2 Å and 7.3 ± 1.2 Å is deposited during the first pulse of TMA on liquid and gas phase HF treated samples, respectively. After three complete ALD cycles the thickness of the aluminum oxide film is 10.0 ± 1.2 Å on liquid HF treated and 6.6 ± 1.2 Å on gas phase HF treated surfaces. Samples treated with gas phase HF inhibit growth. Inhibition is caused by residual F atoms that passivate the surface and by surface poisoning due to the thicker carbon film deposited during the first pulse of TMA. On InGaAs covered by native oxide, the first TMA pulse deposits 9 Å of aluminum oxide, and reaches saturation at 13 Å after 15 pulses of TMA. The film grows by scavenging oxygen from the substrate oxides. Substrate oxides are reduced by the first pulse of TMA even at 0°C. At 0°C, on a 9 Å thick Ga-rich oxide surface, 1 pulse of TMA mainly physisorbs and a limited amount of aluminum oxide is deposited. At 0°C, 110°C, and 170°C, more aluminum oxide is deposited on surfaces initially containing As oxide, and larger binding energy (BE) shifts of the O 1s peak are observed compared to surfaces that contain Ga oxides only, showing that As oxides improve the nucleation of Al₂O₃.

Fabrication and characterization of a new kind of pressure sensor using self-assembly Zinc Oxide (ZnO) nanowires on top of the gate of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is presented. Self-assembly ZnO nanowires were fabricated with a diameter of 80 nm and 800 nm height (80:8 aspect ratio) on top of the gate of the MOSFET. The sensor showed a 110% response in the drain current due to pressure, even with the expected piezoresistive response of the silicon device removed from the measurement. The pressure sensor was fabricated through low temperature bottom up ultrahigh aspect ratio ZnO nanowire growth using anodic alumina oxide (AAO) templates. The pressure sensor has two main components: MOSFET and ZnO nanowires. Silicon Dioxide growth, photolithography, dopant diffusion, and aluminum metallization were used to fabricate a basic MOSFET. In the other hand, a combination of aluminum anodization, alumina barrier layer removal, ZnO atomic layer deposition (ALD), and wet etching for nanowire release were optimized to fabricate the sensor on a silicon wafer. The ZnO nanowire fabrication sequence presented is at low temperature making it compatible with CMOS technology.

Afin de subvenir aux besoins énergétiques des nouvelles technologies électroniques nomades et miniatures, le développement de microdispositifs de stockage électrochimique d’énergie suffisamment performants telles que les microbatteries (MB) Li-ion est nécessaire. Pour ce faire, l’élaboration de MB Li-ion en topologie tridimensionnelle est une voie attractive qui permet le déploiement de surface spécifique tout en conservant l’empreinte surfacique initiale (de l’ordre du mm2), exacerbant ainsi la densité d’énergie délivrée par la MB. Cette solution est rendue possible grâce au développement de technique de dépôt couches minces telle que l’ALD qui est capable de réaliser des dépôts conformes. Dans le cadre de cette thèse, un électrolyte solide (Li3PO4) a été développé et optimisé de façon conforme, par ALD, sur un substrat de silicium structuré au préalable par des techniques de micro-fabrication. Une électrode positive de type spinelle (LiMn1.5Ni0.5O4) a également été élaborée par pulvérisation cathodique RF. Les performances ont été optimisées en fonction des paramètres de dépôt sur un substrat Si/Al2O3/Pt. Une capacité volumique de 63 µAh.cm-2.µm-1 a ainsi été mesurée pour un dépôt de 420 nm à 0,01 mbar recuit sous air à 700°C. Enfin, un prototype de cellule électrochimique en vue d’un suivi in situ/operando par DRX d’une électrode en couche mince, a été proposé. / In order to address the demand on energetic needs to sustain nomad and miniaturized electronic devices, micro-devices performance for energy storage such as Li-ion microbatteries (MB) have to be improved. An attractive way to meet the required performance consists in using 3D topology increasing the specific surface while keeping the initial surface footprint (in the mm2 range) which is significantly enhancing the delivered energy density of the MB. The development of thin film technologies such as ALD enabling conformal deposition makes it possible. In the framework of this thesis, a solid electrolyte (Li3PO4) has been developed and optimized by ALD, on a 3D micro-architectured silicon substrate obtained by microfabrication techniques. A positive electrode (LiMn1.5Ni0.5O4) has also been developed and optimized as a function of the deposition parameter by RF sputtering deposition on a Si/Al2O3/Pt substrate. A volumetric capacity of 63 µAh.cm-2.µm-1 has been measured for a film of 420 nm thick obtained at 0.01 mbar and then annealed at 700°C under air atmosphere. Finally, a prototype has been proposed to realize an electrochemical cell for the purpose of in situ/operando follow-up by XRD of a thin film electrode deposited on silicon substrate.

On-chip vibrating MEMS resonators with high frequency-Q product on par with that of the off-chip quartz crystals have attracted lots of attention from both academia and industry for applications on sensing, signal processing, and wireless communication. Up to now, several approaches for monolithic integration of MEMS and transistors have been demonstrated. Vibrating micromechanical disk resonators which utilize electroplated nickel as the structural material along with either a solid-gap high-k dielectric capacitive transducer or a piezoelectric transducer have great potential to offer unprecedented performance and capability of seamless integration with integrated circuits. Despite the frequency drift problems encountered in early attempts to use nickel as a structural material in MEMS gyroscopes, this low temperature nickel electroplating technology is amenable to post-transistor planar integration. The nickel microstructure is formed through the photoresist molding and electroplating process which enables the microstructure to have extremely high aspect ratio while retaining the overall process temperature under 60ºC. This temperature is low enough to allow the RF MEMS devices to be fabricated directly on top of foundry IC chips, thus enabling post-transistor monolithic integration with minimum parasitics. In addition, the electroplating setup for nickel deposition can be much cheaper as compared to the other deposition facilities (e.g., PVD, CVD, etc). However, as the dimensions of the resonators are shrunk to µm range, several issues have come forth such as higher motional resistance and lower power handling ability. In order to reduce the motional resistance, high permittivity material is employed to form a solid capacitive gap instead of an air gap. As compared to the air gap, ease of the process, better stability and elimination of the particles are the additional benefits of using the solid gap. Therefore, an ultra-thin high-k dielectric layer with atomically controlled thickness down to sub-nm range can be deposited under 100ºC on the vertical sidewall of the device structure by using ALD processing technology. This enhances the efficiency of the capacitive transducer enormously, thus reducing the characteristic motional resistance of the device. This research project explored the idea of applying low temperature process of electroplated nickel and high-k solid-gap as well as partially-filled air-gap capacitive transducers. To further reduce the motional impedance, electromechanically-coupled resonator arrays have been implemented. Furthermore, the linearity of solid-gap versus partially-filled air-gap resonators has been studied through a modeling approach for RF applications. In the meanwhile, this work also investigated electroplated nickel as a structural material for piezoelectrically-transduced resonators to demonstrate piezoelectric-on-nickel resonators with low temperature process. The thin film piezoelectric resonators can achieve high resonance frequency when increasing the piezoelectric film thickness and scaling down the device size. However, the sputtered piezoelectric films have very low deposition rate which limits the thickness to a couple of microns or less. Moreover, the yield of piezoelectric resonators is restricted after the releasing process since the stress of the thin films usually causes the structural layer to buckle or fracture. Thus, the development of piezoelectric-on-substrate resonators is an alternative solution to resolve the aforementioned issues. The previous work has been done by using single crystal silicon or nano-crystalline diamond (NCD) as resonator structural materials due to their high acoustic velocity and low loss. However, the deposition temperature for thin film silicon and diamond is too high to be allowable thermal budget of ICs. Therefore, electroplated nickel is also a reasonable substitute for silicon and diamond substrates while realizing high frequency and moderate Q. Furthermore, it is observed that a localized annealing process through Joule heating can be adopted to significantly improve the effective mechanical quality factor for the ZnO-on-nickel resonators. This work successfully demonstrated the ZnO-on-nickel piezoelectrically-actuated MEMS resonators and resonator arrays with frequencies ranging from a few megahertz to 1.5 GHz by using IC compatible low temperature process.

Due to the recent rapid growth in personal mobile communication devices (smartphones, PDA's, tablets, etc.), the wireless market is always looking for new ways to further miniaturize the RF front-ends while reducing the cost and power consumption. For many years, wireless transceivers and subsystems have been relying on high quality factor (Q) passives (e.g., quartz crystal, ceramics) to implement oscillators, filters, and other key RF front-end circuitry elements. However, these off-chip discrete components occupy large chip area and require power-demanding interfacing circuits. As a result, a great deal of research effort has been devoted to the development of micromechanical resonators that are much more amenable to direct integration with integrated circuit (IC). Over the past few years, vibrating RF MEMS (Micro-Electrical-Mechanical-System) resonator technology has emerged as a viable solution, most notably, the film bulk acoustic resonator (FBAR) and surface acoustic wave (SAW) resonator, which have already been successfully implemented into commercial products. Undoubtedly, micromechanical resonators such as FBAR's can perform as well as if not better than its bulky conventional counterparts and facilitate the miniaturization and power reduction of conventional RF systems. However, in some cases when multi-frequency functionality on a single-chip is needed, FBAR simply won't deliver. To address this dilemma, contour-mode MEMS resonators have been developed and regarded as the most viable on-chip high-Q alternative. Unlike FBAR, contour-mode resonators use lateral dimensions to define its resonating frequencies, thus allowing for single-chip multi-frequency functionality. However, there is still room for improvement with respect to lowering the motional resistance of these devices to allow matching to 50 Ω electronics, while retaining low power consumption, small size, and simpler manufacturing process. This dissertation presents the design, fabrication, characterization and experimental analysis of two types of micro-mechanical resonators. Piezoelectrically- and electrostatically-transduced micromechanical resonators will both be shown. Both types of resonator will be fabricated in the same micro-fabrication run, which makes the comparison between the two much more impartial. The impacts of substrate's resistivity over the device performances will also be studied. Among the most significant results, this dissertation also presents several ideas that are enabled by the use of silicon-on-insulator (SOI) wafer. A novel single-mask fabrication process that can produce capacitive resonator with nano-meter gap is demonstrated. The concept of dual-transduced micro-mechanical resonator is introduced by combining both piezoelectric and capacitive based resonators. Finally, frequency tuning of MEMS resonator are explored and detailed in this work as well.

Epitaxial m-plane (11 ¡Â00) ZnO thin films grown on m-sapphire substrates by atomic layer deposition have been studied. Atomic imaging and electron diffraction conducted in a transmission electron microscope (TEM) and crystallography by X-ray diffractometry all show consistent epitaxial relations with ZnO m-plane // sapphire m-plane, while ZnO [112 ¡Â0] // Al2O3 [0001], and ZnO [0001] // Al2O3 [112 ¡Â0]. The widths (full width at half maximum, or FWHM) of the rocking curves depend on the crystallographic axis of rotation. Dislocations near the interface between the ZnO epi-layers and sapphire substrates can be found from the cross-sectional TEM images when the direction of the incident electron beam, namely, the zone axis, is parallel to ZnO [112 ¡Â0], the a-axis of ZnO. There are stacking faults found in ZnO films away from their interfaces with the substrates. Polarization-dependent photoluminescence by differently polarized incident laser beam have also been investigated. Careful analysis of the spectra via multi-peak fittings revealed optical transitions at 3.32eV for T = 15K, which, however, shifted to 3.28eV at T = 300K. This shift in energy is accounted for by the quadratic temperature dependence of the Fermi level as determined by the positions of the lines of emission corresponding to the band edge transition. The 300K spectrum showed a more distinct peak at 2.48eV when the polarization of the emitted light was along the a-axis of ZnO, as compared to that along the c-axis of ZnO. The origin of this difference remains unaccounted for at the time of writing this thesis. The rest of the peaks have been interpreted in terms of optical transitions involving band gap impurity states, possible exciton formations, and their interactions with phonons.

This thesis investigates the effects of varying the crystallographic orientations of epitaxial ZnO thin films to produce functional ZnO P-N diodes. First, with the atomic layer deposition (ALD), a p-type m-oriented ZnO epitaxial layer is deposited onto an also m-oriented Al2O3 substrate. Then an n-type ZnO layer, mostly textured along the c-axis, is grown atop to form a P-N diode by RF sputtering method. The Hall Effect of the m-ZnO thin film is measured separately at various temperatures and magnetic fields in Quantum Design¡¦s Physical Property Measurement System (PPMS) to determine the nature of the charge carriers. The m-oriented ZnO films are found to be p-type semiconductors, with carrier concentration approximately ~ 1021 1/cm3, which falls in the category of highly-doped degenerate semiconductor. In order to further prove that these films are indeed p-type, naturally n-type c-textured ZnO films are put on the m-films at room temperature by magnetron sputtering to see if the current-voltage (I-V) curves do follow the P-N junction characteristics. In optimizing the c-ZnO film quality and reducing the effects of the junction defects, the gas-mixture ratio between argon and oxygen was varied to compare for the changes in the performance of the resulted materials and devices. X-ray diffraction was used to characterize the crystallographic orientations and the general qualities of the samples by 2£c-£s scan, rocking scan, £p-scan and pole figure measurement. Understanding of the P-N diode is acquired through the analysis of the leakage current and the quantum tunneling phenomena as manifested in the I-V characteristics.

This thesis will talk about the difference between c-plane and m-plane GaN. We use C-V measurement and try to find the difference from C-V result. We use atomic layer deposit (ALD) to deposit Al2O3 no n-Si (111), p-Si (111), c-GaN, m-GaN, c-InN and m-InN for making MOS structure. And use 100 kHz to measure high frequency C-V and charge-voltage method to measure quasi-static capacitance and leakage current. The process and how the instrument work will present in article. In Si (111) case, the flat-band voltage is far away from ideal value. This tells us charge in oxide. Result of quasi-static method shows interface state density is between 1011 cm-2¡DeV-1 to 1012 cm-2¡DeV-1. From Ref. 13, SiO2-Si system with 1011 cm-2 interface trap charge density for Si (111). We compare C-V carrier concentration with Hall carrier concentration and find some difference. We put C-V result of experiment and simulated with COX and Hall carrier concentration we measured. In GaN case, here is deep depletion in C-V result. And quasi-static result also shows deep depletion of GaN. This phenomenon means generate time of hole of n-type GaN is very long. And we use light to excite electron and hole and measure C-V for average surface density of state. The density of stay of Al2O3/m-GaN and Al2O3/c-GaN system is similar. Only appearance difference between Al2O3/m-GaN and Al2O3/c-GaN is position of flat-ban voltage. flat-ban voltage of c-GaN is more negative than m-GaN. For InN, we see ¡§the middle is lower than edge¡¨ curve. Recently, few group present complete C-V curve of InN. We can not sure whether we can use typical way to analyze this data.

La protection contre la corrosion par des films ultramince (≤50 nm) d'alumine déposées par ALD sur le cuivre et l'aluminium à 250°C a été étudiée dans une solution aqueuse 0,5 M de NaCl en combinant méthodes d'analyse électrochimique et de surface. L'étude de l'alumine ALD sur un substrat Cu comprend l'effet de l'épaisseur du revêtement, l'effet de l'oxyde interfacial, l'effet de la préparation de la surface et la durabilité du revêtement. Pour le substrat Al, le travail a porté sur l'examen de l'effet de l'épaisseur du revêtement. Les revêtements ont montré d'excellentes propriétés de corrosion sur des substrats Cu électropoli, tandis qu'ils ont échoué à protéger le substrat recuit, de fait d'une mauvaise adhérence à une surface lissée. L'amélioration de la résistance à la corrosion d'alumine ALD sur le substrat Cu est obtenue en l'absence de vieillissement de l'oxyde natif interfacial, et sa modification par un prétraitement. En dépit de remarquables propriétés d'étanchéité sur un substrat Cu électropoli, la protection contre la corrosion de l'alumine ALD n'est pas durable. Le revêtement du substrat Al avec l'alumine ALD conduit à l'augmentation significative de la résistance à la corrosion. Le potentiel de piqûration est augmenté en présence des revêtements l'épaisseur de 20 et 50 nm, ce qui n'a pas été obtenus avec 10 nm en raison de sa faible épaisseur. Cette étude est une étude préliminaire pour l'application de revêtements d'alumine ALD pour la protection contre la corrosion des alliages Al-Cu en combinaison avec d'autres compositions ALD. / Corrosion protection by ultrathin (≤ 50 nm) alumina films deposited by atomic layer deposition (ALD) on copper and aluminium at 250°C was studied in 0.5 M NaCl aqueous solution by combining electrochemical and surface analytical methods. The study of ALD Al2O3 on Cu substrate included investigation of the effect of the coating thickness, the effect of an interfacial oxide, the effect of surface preparation and the durability of the coating. For ALD Al2O3 on Al substrate, the work focused on the examination of the effect of the deposited coating thickness. ALD alumina coatings showed excellent corrosion properties on electropolished copper substrates, while they failed to protect the annealed substrate, as a result of poor adhesion to a smoothened surface. Modification of interfacial native copper oxide by its pre-treatment led to better corrosion protection of ALD alumina on copper substrate. Despite its remarkable sealing properties on electropolished Cu substrate, corrosion protection of ALD alumina was not durable. Coating of Al substrate with ALD Al2O3 led to significant increase of polarization resistance. Better performance was obtained for 10 and 20 nm coatings on Al than on Cu. Apart from significant decrease of current, the pitting potential was increased in presence of 20 and 50 nm coatings, which was not achieved with 10 nm due to its low thickness. This study was a preliminary study for application of ALD alumina coatings for corrosion protection of Al-Cu alloys in combination with other ALD compositions.