A conventional RF power amplifier will convert the low powered radio frequency signals into high powered signals. Along with the expected ability to increase the communication distance, data transfer rates, RF power amplifiers also have many applications which include military radar system, whether forecasting, etc. The main objective of any power amplifier research is to increase the efficiency while maintaining linearity and broadening the frequency of operation. The main motivation for the renewed interest in PA technology comes from the technical challenges and the economics of modern digital communication systems. Modern communications require high linear power amplifiers and in order to reduce the complete system cost, it is necessary to have a single broadband power amplifier, which can amplify multiple carriers. The improvement in the efficiency of the power amplifier increases the battery life and also reduces the cooling requirements for the same output power. In this thesis, I aim to design and build a wideband class J power amplifier suitable for modern communications. For wideband operation of the GaN technology PA, a bandwidth extension design method is studied and implemented. The simulation results are proved to have a good argument with the theoretical calculations.

<p> Over the past few decades, wireless communication systems have experienced rapid advances that demand continuous improvements in wireless transceiver architecture, efficiency and power capabilities. Since the most power consuming block in a transceiver is the power amplifier, it is considered one of the most challenging blocks to design, and thus, it has attracted considerable research interests. However, very little work has addressed low-power designs since most previous research work focused on higher power applications. Short-range transceivers are increasingly gaining interest with the emerging low-power wireless applications that have very strict requirements on the size, weight and power consumption of the system. </p> <p> This thesis deals with designing fully-integrated RF power amplifiers with low output power levels as a first step to improving the efficiency of RF transceivers in a 0.18 J.Lm standard CMOS technology. Two switch-mode power amplifiers, one operating at a frequency of 650 MHz and the other at a frequency of 2.4 GHz, are presented in this work using a class-E output stage with a class-F driver stage. The work presented here represents the first use of class-E power amplifiers for low-power applications. The measurement results of the 650 MHz design show a maximum drain efficiency of 15 % and a maximum gain of 11.5 dB. When operated from a 0.65 V supply, the power amplifier delivers an output power of 750 J.LW with a maximum power-added efficiency (PAE) of 10 %. As for the 2.4 GHz design, three layouts were fabricated. The first two designs have a filtered and a non-filtered output to show the effects of using on-chip filtering in low-power designs. Special attention was given to optimize the layout and minimize the parasitic effects. Measurement results show a maximum drain efficiency of 38 % and a maximum gain of 17 dB. When operating from a 1.2 V supply, the power amplifier delivers an output power of9 mW with a PAE of33 %. The supply voltage can go down to 0.6 V with an output power of2 mW and a PAE of25 %. The improvements in the layout show an increase in drain efficiency from 8 % to 35 %. The third design uses a 2 ~m thick top-metal layer of low-resistivity, with the same circuit component values as the first two designs. Measurement results show a maximum drain efficiency of 53 % and a maximum gain of 22 dB. When operating from a 1.2 V supply, the power amplifier delivers an output power of 14.5 mW with a PAE of 51 %. The supply voltage can go down to 0.6 V with an output power of 3.5 mW and a PAE of 43 %. </p> <p> Also, a novel mode-locking power amplifier design is presented in two fullyintegrated, differential superharmonic injection-locked power amplifiers (ILP A) operating at a frequency of 2.4 GHz and at a frequency of 400 MHz. Measurement results of the 2.4 GHz design and the 400 MHz design show that the fabricated power amplifiers have a maximum gain of 31 dB from only one stage that occupies a chip area of only 0.6 mm2 and 0.9 mm2 respectively, with all components fully integrated. </p> <p> Finally, two fully-integrated, single block baseband direct-modulation transmitters operating at a frequency of 2.4 GHz and at a frequency of 400 MHz are also presented in this work. Measurement results of the 2.4 GHz transmitter show a drain efficiency of 27 %. When operating from a 1.5 V supply, the transmitter delivers an output power of 8 dBm with a low phase noise of -122 dBc/Hz at a 1 MHz offset. </p> / Thesis / Master of Applied Science (MASc)

The interest in higher data rate systems is rising very quickly in the area of wireless communications. High data rates mean high Peak to Average Ratio, PAR. This imposes big challenge on the linearity requirement of Power Amplifiers, PAs. The simplest technique that has been used is backing off the PA. However, this leads to very inefficient performance. A lot of more complex techniques were suggested in the literatures to trick the tradeoff between linearity and efficiency. So we discuss the advantages and disadvantages of those techniques. In addition we suggest a new technique called Power Amplifier Linearization using a Mirror Predistorter. This technique is based on the use of a mirror PA that generates a copy of the main PA nonlinearity, and then feeds it in the proper phase and magnitude into the input in order to cancel the intermodulation terms at the output. Simulation and on the bench lab results validate the suggested technique. Also a hybrid PA module was designed and tested based on the suggested technique, and showed an improvement of 23 dB in the Third Order Intermodulation to Carrier ratio, IMD3 of the PA at 7.5 dB back off. / Master of Science

Linearity and efficiency are both critical parameters for radio frequency transmitter applications. In theory, a Doherty amplifier is a linear amplifier that is significantly more efficient than comparable conventional linear amplifiers. It comprises two amplifiers, connected at their outputs by a quarter-wave transformer. The main amplifier is always on, while the peaking amplifier is off during low power levels. Load modulation of the main amplifier occurs when the peaking amplifier is on due to the quarter-wave transformer, ensuring the main amplifier never enters saturation. This results in an efficiency characteristic that increases with respect to input power at twice the normal rate at low power levels, and plateaus to a high value at high power levels. However, in much of the research that has been done to-date, less-than-ideal results have been achieved (although efficiency was better than a conventional amplifier). It was decided to investigate the cause of the discrepancy between theoretical and practical results, and devise a method to counteract the problem. It was discovered that the main cause of the discrepancy was non-ideal transistor gate-voltage to drain-current characteristics. The implementation of a gate bias control scheme based upon measured transistor transfer characteristics, and the desired main and peaking amplifier output currents, resulted in a robust method to ensure near-ideal results. A prototype amplifier was constructed to test the control scheme, and theoretical, simulated and measured results were well matched. The amplifier had a region of high efficiency in the high power levels (over 34% for the last 6 dB of input power), and the gain was nearly constant with respect to input power (between 4 and 5 dB over the dynamic range). Furthermore, it was decided to investigate the role harmonics play within the Doherty amplifier. A classical implementation shunts unwanted harmonics to ground within the main and peaking amplifiers. However, odd harmonics generated by the peaking amplifier can be used to operate the main amplifier like a class F amplifier. This means its supply voltage can be lowered, without the amplifier entering saturation, and the efficiency of the Doherty amplifier can be increased without a detrimental effect on the its linearity. A prototype amplifier was constructed to test this theory, and gave good results, with better efficiency than that of a conventional amplifier, and a constant gain with respect to input power (between 6.4 dB and 6.5 dB over the dynamic range).

The aim of this thesis is to design an amplifier for electrostatic and dynamic headphones with D/A converter integrated into one device. This device is controlled by a microcontroller The thesis deals mainly with the design, realisation and testing of all functional blocks of the device.

Modern wireless communication systems use spectrally efficient modulation schemes to reach high data rate transmission. These schemes are generally involved with signals with high peak-to-average power ratio (PAPR). Moreover, the development of next generation wireless communication systems requires the power amplifiers to operate over a wide frequency band or multiple frequency bands to support different applications. These wide-band and multi-band solutions will lead to reductions in both the size and cost of the whole system. This dissertation presents several advanced power amplifier solutions to provide wide-band and multi-band operations with efficiency improvement at power back-offs.

Low voltage, low power amplifiers are proposed. One of the operational amplifiers is an Operational Transconductance Amplifier (OTA) with wide input and output swing and constant gm. The second and third amplifiers are high-performance Current Operational amplifiers (COAs). All amplifiers have power supply as low as one threshold voltage plus two overdrive voltage. In this thesis, the supply voltage is 1V. Simulation results show that the OTA has the maximum linear range over 0.7V. The transconductance can be 147£gA/V, the power consumption is 0.133mW. There are two designs of the COA. Simulation results show COA(1) with a current gain of 143. The input impedance is 110£[, the output impedance is 240K£[ and the power consumption is 0.15mW. In the simulation results of the COA(2), the current gain is 110. The DC power dissipation is 0.07mW. The input and output impedance are 95£[ and 500K£[, respectively. All the proposed amplifiers are implemented on a TSMC 0.35£gm 2p4m CMOS process technology and analyzed using HSPICE.

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This work is focused on design of L band power amplifier. First, the design of the amplifier is substantiated by necessary theoretical basics of RF power amplifiers. Then, after comparsion of availible RF power amplifiers concepts, the doherty power amplifier is chosen as a suitable type. Design of the amplifier is focused on the linearity and efficiency. AWR design program is used for simulation of the amplifier. Amplifier is then realized and parameters are measured. Measured results are then discussed and evaluated. This work proposes design of the linear doherty amplifier for modern communications systems.

International Telemetering Conference Proceedings / October 18-21, 2004 / Town & Country Resort, San Diego, California / Digital modulation schemes that are power and bandwidth efficient are highly desirable. After non-linear amplification has been done, signal modulation schemes having constant or quasi-constant envelopes are not as susceptible to spectral regrowth as those with non-constant envelopes. Since such distortion generates interference in the adjacent channels, the power operation of the amplifier in non-constant envelope modulations is typically backed off, resulting in systems with reduced power efficiency. On the other hand, constant envelope modulation may have different bandwidth spectra. This paper examines the statistical characteristics of N-GMSK and N-FQPSK [1] signals to assess the bandwidth efficiency in the presence of amplifier nonlinearities.