Abstract In this research, we intend to develop a sinusoidal VCO with low harmonic distortion. A new sinusoidal VCO is developed with only two OTAs. The number of OTAs is fewer than that previously presented in other papers. The oscillator will be easy to debug and the complexity of the oscillator can be reduced. An AGC control mechanism is applied to the VCO to control the oscillation amplitude and to reduce the harmonic distortion. The oscillation is designed with the frequency around 100MHz and the oscillation amplitude is around 100mV. The simulation results and the problem encountered are discussed.

A novel CMOS operational transconductance amplifier (OTA) is proposed and demonstrated in this thesis. Due to its feedforward-regulated cascode topology, it breaks the previous OTA frequency limit of several hundred MHz and operates at frequencies up to 10 GHz with a large transconductance. This is confirmed by an in-depth high-frequency analysis, simulations, and experimental demonstrations using purpose-built circuits. Experimental results also show that the proposed OTA has high linearity and low intermodulation distortion, which is of particular interest in microwave circuits. The OTA’s noise behavior and the effects of process variations, device mismatch, and power supply noise on the transconductance are also studied. To the best of our knowledge, the noise analysis here is the first of its kind on regulated cascode circuits, which can be applied to other regulated cascodes with minor changes. Three microwave applications of this OTA are explored in this thesis: 1) an active bandpass filter with a wide tuning range, 2) a 2.4-GHz ISM-band variable phase shifter, and 3) a microwave active quasi-circulator, which are all in CMOS MMIC form. These three circuits can be easily integrated with other chip components for System-on-Chip (SoC) realizations. The use of the OTA makes these three applications super compact: the active filter is at least 5 times smaller than previous circuits with a similar topology, and the phase shifter and quasi-circulator are at least 3 times smaller than previous works in that frequency range. Furthermore, the tunability of the developed OTA on its transconductance gives its applications extra freedom in tuning their frequencies and gains/losses electronically. In the first application, the active bandpass filter has a novel narrowband-filtering topology and has a wide tuning-range of 28% around 1.8 GHz, which makes it very suited for reconfigurable multi-band wireless systems. In the second and third applications, the active variable phase shifter has a comparable variable phase shift range of 120º in the 2.4-GHz ISM band and the active quasi-circulator has transmissions close to 0 dB and directivities over 24 dB from 1.5 GHz to 2.7 GHz. / Thesis (Ph.D, Electrical & Computer Engineering) -- Queen's University, 2008-09-18 09:49:00.07

Radio frequency (RF) filters are one of the key building blocks in modern microelectronic digital communication systems that use a narrow frequency band with strong interferers nearby. The objective of this thesis is to explore the better DR performance of RF filters using the Q-enhanced LC filter. It takes a divide-and-conquer method by designing 1. A new simple pseudo-differential pair (PDP) for input gm stage. It is the fastest, high-linearity, low-distortion, and wide-range constant-gm design reported to date. This has been applied in the final filter tape-out and has proven to be effective experimentally. 2. A new tunable discrete inductor (TDL) to achieve two-level inductance with the same real estate that can be used to expand the filtering frequency range. This has been verified experimentally. 3. A new tunable discrete capacitor (TDC) to achieve high linearity over wide terminal voltage swing range. This has been verified through simulation. 4. A new systematic way to achieve synchronized gain, center frequency, and filtering Q tuning capability for Q-enhanced LC filters. It has been verified through simulation. In order to verify the concept, a 900 MHz filter is designed and fabricated with National Semiconductor Company (NSC)'s standard 0.18 um digital epi-substrate CMOS technology, and packaged with NSC's LLP-28. The measurement results show that with filter Q of 17 at 845 MHz, the 1 dB compression point is measured to be +4 dBm, IIP3 to be +16 dBm with a peak noise floor of -154 dB/Hz, spurious free dynamic range (SFDR) to be 71 dB. With filter Q of 70 over a 20 MHz BW, the 1 dB compression point is measured to be -9.5 dBm, IIP3 to be +7 dBm with a peak noise floor of -141 dB/Hz, SFDR to be 57 over 20 MHz BW. This filter uses between 56 and 60 mA with a power supply of 1.8 V due to the low-Q (Q~1) of inductor. It is the RF filter with the highest DR in the published literature. The DR can be even higher if inductor Q can be improved as DR is proportional to Q^2.

In the first part of this thesis, RF specifications of the CSR Bluetooth module were tested rigorously by means of proper equipment setup and manipulation. The tested parameters in the transmitter include output power, spectrum and modulation characteristics. The tested parameters in the receiver include sensitivity and received signal strength indicator. The second part of this thesis was mainly focused on some mixed-signal integrated-circuit designs that can be generally applied to the Bluetooth RF front-end. The design examples include the phase frequency detector, charge pump, and frequency divider in the applications of phase-locked loop. A transconductance-capacitor low-pass filter with tunable cut-off frequencies was also designed to suppress the spurious signals from RF front-end into baseband.

In this work, the circuit implementation of the front-end for Frequency Domain (FD) Sampling Receiver is presented. Shooting for two different applications, two transconductance amplifiers are designed. A high linear transconductance amplifier with 25 dBm IIP3 is proposed to form the high resolution and high sampling rate FD receiver. The whole system achieves an overall sampling rate of 2 Gs/s and resolution of 10 bits. Another low noise transconductance amplifier exploiting noise cancelling is designed to build up the FD wireless communication receiver, which is an excellent candidate for Software Define Radio (SDR) and Cognitve Radio (CR). The proposed noise cancelling scheme can suppress both thermal noise and flicker noise at the frontend. The system Noise Figure (NF) is improved by 3.28 dB. The two transconductance amplifiers are simulated and fabricated with TI 45nm CMOS technology.

Thesis (doctoral)--Technische Universiteit Delft, 1997. / Includes bibliographical references.

Thesis (doctoral)--Technische Universiteit Delft, 1997. / Includes bibliographical references.

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