The performance of analog integrated circuits is dependent on the technology. Digital circuits are scalable in nature, and the same circuit can be scaled from one technology to another with improved performance. But, in analog integrated circuits, the circuit components must be re-designed to maintain the desired performance across different technologies. Moreover, in the case of digital circuits, minimum feature-size (short channel length) devices can be used for better performance, but analog circuits are still being designed using channel lengths larger than the minimum feature sizes. The research in this thesis is aimed at understanding the impact of technology scaling and short channel length devices on the performance of analog integrated circuits. The operational amplifier (op amp) is chosen as an example circuit for investigation. The performance of the conventional op amps are studied across different technologies for short channel lengths, and techniques to develop technology-independent op amp architectures have been proposed. In this research, three op amp architectures have been developed whose performance is relatively independent of the technology and the channel length. They are made scalable, and the same op amp circuits are scaled from a 0.25 um CMOS onto a 0.18 um CMOS technology with the same components. They are designed to achieve large small-signal gain, constant unity gain-bandwidth frequency and constant phase margin. They are also designed with short channel length transistors. Current feedback, gm-boosted, CMOS source followers are also developed, and they are used in the buffered versions of these op amps.

Future wireless communication devices must support multiple standards and features on a single-chip. The trend towards software-defined radio requires flexible and efficient RF building blocks which justifies the adoption of broadband receiver front-ends in modern and future communication systems. The broadband receiver front-end significantly reduces cost, area, pins, and power, and can process several signal channels simultaneously. This research is mainly focused on the analysis and realization of the broadband receiver architecture and its various building blocks (LNA, Active Balun-LNA, Mixer, and trans-impedance amplifier) for multi-standard applications. In the design of the mobile DTV tuner, a direct-conversion receiver architecture is adopted achieving low power, low cost, and high dynamic-range for DVB-H standard. The tuner integrates a single-ended RF variable gain amplifier (RFVGA), a current-mode passive mixer, and a combination of continuous and discrete-time baseband filter with built-in anti-aliasing. The proposed RFVGA achieves high dynamic-range and gain-insensitive input impedance matching performance. The current-mode passive mixer achieves high gain, low noise, and high linearity with low power supplies. A wideband common-gate LNA is presented that overcomes the fundamental trade-off between power and noise match without compromising its stability. The proposed architecture can achieve the minimum noise figure over the previously reported feedback amplifiers in common-gate configuration. The proposed architecture achieves broadband impedance matching, low noise, large gain, enhanced linearity, and wide bandwidth concurrently by employing an efficient and reliable dual negative-feedback. For the wideband Inductorless Balun-LNA, active single-to-differential architecture has been proposed without using any passive inductor on-chip which occupies a lot of silicon area. The proposed Balun-LNA features lower power, wider bandwidth, and better gain and phase balance than previously reported architectures of the same kind. A surface acoustic wave (SAW)-less direct conversion receiver targeted for multistandard applications is proposed and fabricated with TSMC 0.13?m complementary metal-oxide-semiconductor (CMOS) technology. The target is to design a wideband SAW-less direct coversion receiver with a single low noise transconductor and current-mode passive mixer with trans-impedance amplifier utilizing feed-forward compensation. The innovations in the circuit and architecture improves the receiver dynamic range enabling highly linear direct-conversion CMOS front-end for a multi-standard receiver.

This thesis deals with RC oscillators applicable in higher frequency ranges with the use of modern active elements. For individual function blocks (conveyor, current feedback amplifier, operational transconductance amplifier, voltage feedback amplifier) suitable models are suggested for the circuit simulator PSpice covering their characteristics on various levels, from an ideal one up to the full description of parasitic effects. On the basis of the study of recommended literature and company documentation various oscillator connections of the ranks 2 and 3 are suggested. By analysis through computer (PSpice, SNAP) the fulfilment of oscillation conditions, onset of oscillations were verified and by means of suitable simulations the effects of the impact on the parasitic characteristics of active elements was examined. Finally there are two oscillator connections stated and verified by simulations with the possibility of electronic retuning.

The aim of this thesis is to design a universal analog oscillator using transconductance amplifiers. For studying behaviour of chaotic dynamical systems can be used systems Class C. Suitable way for the purpose modeling dynamic phenomena arising in these systems is an electronic circuit that exhibits the same behavior as modeled system. After familiarization with the basic principles of synthesis of integrators systems, and studying the involvement of frequently used functional blocks were designed the concept of universal chaotic oscillator using transconductance amplifiers. The functionality of this circuit has been verified by PSpice simulation program. A typical feature of chaotic oscillator is extremely sensitivity to initial conditions. Each small change on the initial parameters can lead to major change in the shape of the attractor. The result of this thesis is a functional sample of a universal chaotic oscillator, which was verified by the dynamic behavior of the given differential equations.

This work deals with the analog multipliers, mainly of the voltage multipliers. Also the modifications of current output will appear here. The first part is devoted to a choice several multipliers and a description of their functions, the possible involvement and introduction of the most important catalog values. The next section deals with the simple application that contains at least one of the multipliers. Next was the implementation of selected applications and measure their actual performance parameters. Results are then compared with computer simulations. As final step is done of tolerance and sensitivity analysis of simulated configurations of circuits.

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With the explosive development of wireless communication systems the specifications of the supporting hardware platforms have become more and more demanding. According to the long term goals of the industry, future communications systems should integrate a wide variety of standards. This leads to the idea of software defined radio, implemented on fully reconfigurable hardware.Among other reconfigurable hardware blocks, suitable for the software radio concept, an outstanding importance belongs to the reconfigurable filters that are responsible for the selectivity of the system. The problematic of filtering is strictly connected to the architecture chosen for a multi-mode receiver realization. According to the chosen architecture, the filters can exhibit low pass or band pass frequency responses.The idea of reconfigurable frequency parameters has been introduced since the beginning of modern filtering applications due to the required precision of the frequency response. However, the reconfiguration of the parameters was usually done in a limited range around ideal values. The purpose of the presented research is to transform the classical filter structures with simple self-correction into fully reconfigurable filters over a wide range of frequencies. The ideal variation of the frequency parameters is continuous and consequently difficult to implement in real circuits. Therefore, it is usually sufficient to use a discrete programming template with reasonably small steps.There are several methods to implement variable frequency parameters. The most often used programming templates employ resistor and capacitor arrays, switched according to a given code. The low pass filter implementation proposed in this work uses a special switching template, optimized for a quasi-linear frequency variation over logarithmic axes. The template also includes the possibility to compensate errors caused by component tolerances and temperature. Another important topic concerns the implementation of programmable band pass filters, suitable for IF sampling receivers. The discussion is centered on the feasibility and the flexibility of different band pass filter architectures. Due to the high frequency requirements, the emphasis lays on filters that employ transconductance amplifiers and capacitors. / Die rasch fortschreitende Entwicklung drahtloser Kommunikationssysteme führt zu immer anspruchsvolleren Spezifikationen der diese Systeme unterstützenden Hardwareplattformen. Zukünftige Kommunikationssysteme sollen übereinstimmend mit den längerfristigen Zielen der Industrie verschiedene Standards integrieren. Dies führt zu der Idee von vollständig rekonfigurierbarer Hardware, welche mittels Software gesteuert wird.Inmitten anderer rekonfigurierbarer Hardwareblöcke, die für das Software Radio Konzept geeignet sind, besitzen die steuerbaren Filter, welche wesentlichen Einfluss auf die Selektivität des Systems haben, eine enorme Bedeutung. Die Filterproblematik ist eng mit der gewählten Architektur der standardübergreifenden Empfängerrealisierung verknüpft. Die Filter können entsprechend der ausgesuchten Architektur Tiefpass- oder Bandpasscharakter annehmen.Die Idee rekonfigurierbarer Frequenzparameter wurde bereits mit Beginn moderner Filteranwendungen auf Grund geforderter Frequenzganggenauigkeit umgesetzt. Jedoch wurde die Parameterrekonfiguration üblicherweise nur in einem begrenzten Bereich um die Idealwerte herum vorgenommen. Das Ziel der vorgestellten Forschungsarbeit ist es, diese klassischen Filterstrukturen mit einfacher Selbstkorrektur in über große Frequenzbereiche voll rekonfigurierbare Filter zu transformieren. Idealerweise werden die Frequenzparameter kontinuierlich variiert weswegen sich die Implementierung in reellen Schaltkreisen als schwierig erweist. Deshalb ist es üblicherweise ausreichend, ein diskretes Steuerschema mit kleinen Schrittweiten zu verwenden.Es gibt verschiedene Methoden, variable Frequenzparameter zu implementieren. Die meisten Schemata verwenden Widerstands- und Kondensatorfelder, die entsprechend eines Kodes geschaltet werden. Die in dieser Arbeit vorgestellte Implementierung eines Tiefpassfilters nutzt ein spezielles Umschaltschema, welches für die quasi-lineare Frequenzvariation bei Darstellung über logarithmischen Axen optimiert wurde. Es beinhaltet weiterhin die Möglichkeit, Fehler zu kompensieren, die durch Bauelementtoleranzen und Temperaturschwankungen hervorgerufen werden.Ein weiteres interessantes Thema betrifft die Implementierung steuerbarer Bandpassfilter, die für Empfänger mit Zwischenfrequenzabtastung geeignet sind. Die Betrachtung beschränkt sich hierbei auf die Durchführbarkeit und Flexibilität verschiedener Bandpassfilterarchitekturen. Auf Grund hoher Frequenzanforderungen liegt der Schwerpunkt auf Filtern, die auf Transkonduktanzverstärkern und Kondensatoren basieren.

The ever increasing diversity in communication systems has created a demand for constant improvements in receiver components. This thesis describes the design and characterisation of front-end receiver components for various challenging applications, including characterisation of low noise foundry processes, LNA design and multi-band antenna design. It also includes a new theoretical analysis of noise coupling in low noise phased array receivers.In LNA design much depends on the choice of the optimum active devices. A comprehensive survey of the performance of low noise transistors is therefore extremely beneficial. To this end a comparison of the DC, small-signal and noise behaviours of 10 state-of-the-art GaAs and InP based pHEMT and mHEMT low noise processes has been carried out. Their suitability in LNA designs has been determined, with emphasis on the SKA project. This work is part of the first known detailed investigation of this kind. Results indicate the superiority of mature GaAs-based pHEMT processes, and highlight problems associated with the studied mHEMT processes. Two of the more promising processes have then been used to design C-band and UHF-band MMIC LNAs. A new theoretical analysis of coupled noise between antenna elements of a low noise phased array receiver has been carried out. Results of the noise wave analysis, based on fundamental principles of noisy networks, suggest that the coupled noise contribution to system noise temperatures should be smaller than had previously been suggested for systems like the SKA. The principles are applicable to any phased array receiver. Finally, a multi-band antenna has been designed and fabricated for a severe operating environment, covering the three extremely crowded frequency bands, the 2.1 GHz UMTS, the 2.4 GHz ISM and the 5.8 GHz ISM bands. Measurements have demonstrated excellent performance, exceeding that of equivalent commercial antennas aimed at similar applications.

The aim of master's thesis was design of electronically reconfigurable filters. Adjustability of pole frequency or quality factor is possible. First part of thesis deals with theoretical analysis of filters, their operation modes, design of frequency filters using Signal-Flow graph method and parasitic analysis. The next part describes active elements used in thesis. In a third part, three reconfigurable filters are described and designed and their simulations and parasitic analysis are made. Last part deals with filter design in EAGLE and experimental measurement.

This diploma thesis deals with design of reconection-less electronically reconfigurable filter structures which have single input and single output using unconventional active elements, which have ability to adjust one of their parameter e.g. gain or transconductance. The first part describes basic parameters of frequency filters, the division of filters by frequency transfer response and used circuit elements, their operational modes, the principle of reconnection-less electronically reconfiguration and the circuit design method MUNV. Second part describes all active elements used in the proposal of filters, their properties and the implementation using existing transistor-level models. The third part contains the design of three reconnection-less electronically reconfigurable filters and the simulations results obtained from simulation programs OrCAD Capture and PSpice. The obtained results were compared with theoretical behaviour. This part also contains results of these analyses: sensitivity, parasitic, Monte Carlo and temperature to determine the behaviour in varied cases.