Abstract The main aim of this work was to design CMOS receiver channels for the integrated receiver chip of a pulsed time-of-flight (TOF) laser rangefinder. The chip includes both the receiver channel and the time-to-digital converter (TDC) in a single die, thus increasing the level of integration of the system, with the corresponding advantages of a cheaper price and lower power consumption, for example. Receiver channels with both linear and leading edge timing discriminator schemes were investigated. In general the receiver channel consists of a preamplifier, a postamplifier and a timing comparator. Since a large systematic timing error may occur due to high variation in the amplitude of the received echo, a leading edge timing discriminator scheme with time domain walk error compensation is proposed here, making use of the TDC already available in the chip to measure the slew rate of the pulse and using that information to evaluate the timing error. This compensation scheme benefits from the fact that compensation can be continued even though the signal is clipped in the amplitude domain, because the slew rate continues to increase even then. The receiver channel with leading edge detection and time domain walk error compensation achieved a compensated timing walk error of ±4.5 mm within a dynamic range of more than 1:10000. The standard deviation in single shot precision was less than 25 mm with an SNR of more than 20. The usability of the receiver channel in pulsed TOF laser rangefinders was verified by making actual time-of-flight measurements on a calibrated measurement track. The linearity of the receiver chip was better than ±5 mm in a measurement range from 3 m to 21 m, with the dynamic range of the receiver channel reaching more than 1:2000. An integrated CMOS laser diode pulser was also demonstrated to prove its functionality for generating ampere-scale peak current pulses through a low ohmic load and a laser diode. The CMOS pulser achieved a peak current pulse with the amplitude of ~1 A, an optical pulse width of ~2.5 ns and a rise time of ~1 ns with a 5 V power supply. / Tiivistelmä Työn ensisijaisena tavoitteena oli suunnitella CMOS-vastaanottimia valopulssin kulkuajan mittaukseen perustuvan lasertutkan integroituun vastaanotinpiiriin. Vastaanotinpiiri sisältää sekä vastaanotinkanavan että aika-digitaalimuuntimen yhdellä integroidulla sirulla. Tällöin systeemin integrointiastetta saadaan kasvatettua, mikä merkitsee esimerkiksi halvempaa hintaa ja pienempää tehon kulutusta. Työssä on tutkittu vastaanotinkanavia, jotka käyttävät joko lineaariseen ilmaisuun tai etureunailmaisuun perustuvaa ajoitusilmaisutekniikkaa. Yleisesti vastaanotinkanava sisältää esivahvistimen, jälkivahvistimen ja ajoituskomparaattorin. Vastaanotetun signaalin tason voimakas vaihtelu saattaa aiheuttaa suuren systemaattisen virheen etureunailmaisuun perustuvassa ajoitusilmaisussa. Tässä työssä on esitetty etureunailmaisua käyttävä ajoitusilmaisin, jossa syntyvää ajoitusvirhettä voidaan korjata mittaamalla pulssin nousunopeutta aika-digitaalimuuntimella, joka on integroitu samalle sirulle. Aikatasossa tapahtuvan virheenkorjauksen etuna on mahdollisuus jatkaa virheenkorjausta amplituditasossa tapahtuvan signaalin leikkautumisen jälkeenkin, koska signaalin nousunopeus kasvaa leikkaantumisesta huolimatta. Etureunailmaisua käyttävällä vastaanotinkanavalla, jossa ajoitusvirhettä korjattiin pulssin nousunopeutta mittaamalla, saavutettiin ±4,5 mm ajoitusvirhe 1:10000 dynaamisella alueella. Kertamittaustarkkuuden keskihajonta oli vähemmän kuin 25 mm, kun signaalikohinasuhde oli enemmän kuin 20. Vastaanotinkanavan käytettävyys osana lasertutkaa todettiin tekemällä tutkamittauksia kalibroidulla mittaradalla. Mittauksissa saavutettu lineaarisuus oli ±5 mm mittausalueen vaihdellessa 3 metristä 21 metriin ja signaalin dynamiikan ollessa enemmän kuin 1:2000. Lisäksi työssä esitellään integroitu CMOS-pulssitin, joka pystyy tuottamaan ampeeri-luokan virtapulsseja laserdiodiin. CMOS-pulssittimella voitiin tuottaa 5 V käyttöjännitteellä ~1 A virtapulsseja optisen pulssin leveyden ja nousuajan ollessa ~2,5 ns ja ~1 ns.

Abstract. Security and privacy in digital communications is the need of the hour. SSL/TLS has become widely adopted to provide the same. Multiple application layer protocols can be layered on top of it. However protection is this form results in all the data being encrypted causing problems for an intrusion detection system which relies on a sniffer that analyses packets on a network. We thus hypothesise that a host based intrusion detection system that analyses packets after decryption would be able to detect attacks against security protocols. To this effect we conduct two experiments where we attack a web server and a mail server, collect data, analyse it and conclude with methods to detect such attacks. These methods are in the form of peudocode.

The development of fuel efficient internal combustion engines (ICE)have resulted in a variety of different solutions. One of those are the variable valve timing and an implemenation of such is the Continuous Variable Cam Phasing (CVCP). This thesis have used a simulation package, psPack, for the simulation of the gas exchange process for an ICE with CVCP. The purpose of the simulations was to investigate what kind of design parameters, e.g. the length of an intake pipe or the duration of combustion, that were significant for the gas exchange process with the alternation of intake pressure, engine speed and valve setting. The parameters that showed a vast impact were those who affected the amount of residual gas and the temperature of the air charge. Furthermore a validation was made between simulation data acquired from psPack and measured data provided in Heywood (1988). The validation showed that for the general behaviour the simulation results from psPack corresponded well to the measured data.

Investments with exit flexibility require decisions regarding both the investment and holding period. Because selling an investment often leads to taxable capital gains, which crucially depend on the duration of an investment, we investigate the impact of capital gains taxation on exit timing under different tax systems. We observed that capital gains taxation delays exit decisions but loses its decision relevance for very long holdings. Often the optimal exit time, which indicates the maximal present value of future cashflows, cannot be determined analytically. However, we identify the breakeven exit time that guarantees present values exceeding those of an immediate sale. While, after-taxes, an immediate sale is often optimal, long holding periods might also be attractive for investors depending on the degree of income and corporate tax integration. A classic corporate tax system often indicates holdings over more than 100 periods. By contrast, a shareholder relief system indicates the earliest breakeven exit time and thus the highest level of exit timing flexibility. Surprisingly, high retention rates are likely to accelerate sales under a classic corporate system. Additionally, the worst exit time, which should be avoided by investors, differs tremendously across tax systems. For an integrated tax system with full imputation, the worst time is reached earlier than under partial or non-integrated systems. These results could help to predict investors' behavior regarding changes in capital gains taxation and thus are of interest for both investors and tax policymakers. Furthermore, the results emphasize the need to control for the underlying tax system in cross-country empirical studies. (authors' abstract) / Series: WU International Taxation Research Paper Series

Tax uncertainty is often claimed to be harmful for investments. Capital taxes, such as property and wealth taxes, are particularly exposed to tax uncertainty. Capital tax un- certainty emerges from expected tax reforms, the unclear outcome of future tax audits, and simplified estimates of capital tax bases in investment models. Uncertain returns on investment as well as stochastic taxation contribute to overall uncertainty and may significantly affect investment decisions. Hitherto, it is unknown how capital tax uncertainty affects investment timing. However, it is well known that both uncertainty and capital tax may be harmful for investment and decelerate investment activities. We are the first to study the investment timing effects of stochastic capital taxes in a real options setting with risky investment opportunities. Our results indicate that even risk neutral investors are sensitive with respect to capital tax risk and may react in a surprising manner to a newly introduced stochastic capital tax. As an apparently paradoxical investment e¤ect, we find that increased capital tax uncertainty can accelerate risky investment if such uncertainty is such ciently low compared to cash flow uncertainty. In contrast, high capital tax risk delays high-risk innovative investment projects. To reduce unintended consequences of uncertain tax policy, tax legislators and tax authorities should avoid high levels of cap- ital tax uncertainty. Broadening the capital tax base or increasing the capital tax rate induces ambiguous timing effects. Furthermore, high-growth investments are likely to be postponed if they experience a capital tax cut. Since investment reactions upon tax reforms are well-known to affect income and wealth distribution, reliable estimations of the impact of taxes on economic decisions are necessary. (authors' abstract) / Series: WU International Taxation Research Paper Series

>Magister Scientiae - MSc / This research undertakes to investigate both long-term and short-term investor overreaction on the JSE Limited (JSE) over the period from 1 January 2002 to 31 December 2009. The period covers the restructuring and reform of the JSE in the early 2000s to the end of global financial market crisis in late 2008/2009, which can be regarded as a complete economic cycle. The performances of the winner and loser portfolios are evaluated by assessing their cumulative abnormal returns (CAR) over a 24-month holding period. The test results show no evidence of mean reversion for winner and loser portfolios formed based on prior returns of 12 months or less. However, test results show evidence of significant mean reversion for the winner and loser portfolios constructed based on their prior 24 months and 36 months returns. In addition, the study reveals that the mean reversion is more significant for longer-formation-period portfolios as well as for longer holding periods. The examination of the cumulative loser-winner spreads obtained from the contrarian portfolios based on the constituents’ prior 24 month and 36 month returns indicates that the contrarian returns increase for portfolios formed between 2004 and 2006, and declines thereafter towards the end of the examination period. The deterioration of contrarian returns coincides with the subprime mortgage crisis in 2007 and the subsequent global financial crisis in 2008. This evidence suggests that the degree of mean reversion on the JSE is positively correlated to the South African business cycle.

There are several timing mechanisms on presently available commercial operating systems. Two operating system platforms that immediately come to mind are the Microsoft Windows environment (the WIN32 platform) and its UNIX-based counterpart, Linux (with its POSIX standard). The timing mechanisms under these operating systems are adequate for use in conventional multimedia applications currently run on these platforms. However, the requirements of such applications are not as stringent within a real-time environment. The goal of this dissertation was to determine if it would be possible to find a workaround for applications where current timing mechanisms in the WIN32 and POSIX environments do not meet the requirements of real-time. Before a proposed workaround is presented, a clarification is given as to what is meant by the notion of a timer. Attention is also given to the fact that its accuracy is quantified in terms of its resolution. It is acknowledged that real-time extensions to both the Windows and Linux operating systems exist. However, it was decided to find a solution without such assistance. Real-time is also defined and sub-classified into hard- and soft real-time, differentiating environments that have precise constraints (hard real-time) on timing as opposed to environments where demands on accuracy and efficiency are less stringent (soft real-time). The timer that was ultimately implemented had to conform to the latter form of real-time. This dissertation therefore aims to provide a solution in a soft real-time environment. The current timing mechanisms are discussed and their performance is quantified. Their deficiency in measuring a reliable periodic interval of 1 ms is highlighted. From this qualification of timers stems the requirements for the soft real-timer timer. The areas in which improvement is sought are stated. The design and implementation of a soft real-time timer that meets these requirements is presented and its performance at various frequencies is quantified. A comparison is given between the timer and the existing timing mechanisms as well as comparison between its implementation under both Windows and Linux. Additionally, the viability of the proposed timer compared to a proven hard real-time timer is presented. Finally it is recognised that a timer would not be useful if it was not effective in a practical environment. Consequently, the timer’s performance under the same load that it would experience in a practical soft real-time environment is investigated as well. The dissertation concludes with a discussion on the compatibility of this timer with expected advances in future Central Processing Unit (CPU) technologies. / Dissertation (MSc (Computer Science))--University of Pretoria, 2007. / Computer Science / MSc / unrestricted

Automotive systems have transitioned from basic transportation utilities to sophisticated systems. The rapid increase in functionality comes along with a steep increase in software complexity. This manifests itself in a surge of the number of functionalities as well as the complexity of existing functions. To cope with this transition, current trends shift away from today’s distributed architectures towards integrated architectures, where previously distributed functionality is consolidated on fewer, more powerful, computers. This can ease the integration process, reduce the hardware complexity, and ultimately save costs. One promising hardware platform for these powerful embedded computers is the many-core processor. A many-core processor hosts a vast number of compute cores, that are partitioned on tiles which are connected by a Network-on-Chip. These natural partitions can provide exclusive execution spaces for different applications, since most resources are not shared among them. Hence, natural building blocks towards temporally and spatially separated execution spaces exist as a result of the hardware architecture. Additionally to the traditional task local deadlines, automotive applications are often subject to timing constraints on the data propagation through a chain of semantically related tasks. Such requirements pose challenges to the system designer as they are only able to verify them after the system synthesis (i.e. very late in the design process). In this thesis, we present methods that transform complex timing constraints on the data propagation delay to precedence constraints between individual jobs. An execution framework for the cluster of the many-core is proposed that allows access to cluster external memory while it avoids contention on shared resources by design. A partitioning and configuration of the Network-on-Chip provides isolation between the different applications and reduces the access time from the clusters to external memory. Moreover, methods that facilitate the verification of data propagation delays in each development step are provided.

The main objective of this thesis was to examine the independent effects of sleep duration and timing on appetite, food reward and energy balance. Study 1 investigated the associations between satiety quotient (SQ) with habitual, self-reported sleep duration, quality and timing. No significant associations were noted between SQ and sleep parameters. Short-duration sleepers had a lower mean SQ vs. those with ≥7h sleep/night (P=0.04). Study 2 evaluated associations between changes in sleep duration, efficiency and timing with changes in next day food reward. Greater sleep duration and earlier wake-times were associated with greater food reward (P=0.001). However, these associations were no longer significant after controlling for elapsed time between awakening and completion of the food reward task. Study 3 examined the effects of 50% sleep restriction (SR) anchored during the first (delayed bedtime) or second (advanced wake-time) half of the night on appetite, SQ, food reward, energy intake (EI) and energy expenditure (EE). Greater appetite ratings and explicit high-fat food reward were noted following SR with an advanced wake-time vs. control and SR with a delayed bedtime (P=0.03-0.01). No difference in SQ was noted between sessions. Energy and carbohydrate intakes were greater on day 2 and over 36h in the delayed bedtime vs. control session (P=0.03). Activity EE and moderate-intensity physical activity (PA) time were greater following delayed bedtime vs. control and advanced wake-time on day 1, whereas vigorous-intensity PA time was greater following advanced wake-time vs. delayed bedtime on day 1 (P=0.01-0.04). Greater sleep quality and slow-wave sleep duration between SR sessions were associated with lower EI and increased vigorous-intensity PA time, respectively (P=0.01-0.04). Collectively, these findings suggest that appetite, SQ and food reward are influenced by sleep parameters, but these changes may not alter EI. These findings also suggest that individuals with greater sleep quality in response to SR had greater vigorous-intensity activity time and lower EI.

Cette thèse aborde trois aspects liés aux introductions en Bourse et aux retraits obligatoires. Le premier est le processus de fixation des prix des deux offres publiques. En effet, au regard des différences entre les deux offres publiques, les experts emploient les mêmes méthodes d'évaluation sans justifier leurs différents choix. À travers un audit sur les prospectus d'IPO et d'OPR-RO, les processus d'évaluation sont d'avantages fondés sur les caractéristiques des entreprises et des conditions du marché. En outre, il existe une relation significative entre les prix d'offre et les différentes valeurs estimées. Par ailleurs, étant donné que IPOs peuvent coïncider 'avec une augmentation exceptionnelle de l'indice du marché et sont accompagnées d'une sous-évaluation initiale. Le choix d'un timing optimal de cette offre dépend de l'évolution des cours des entreprises cotées du même secteur et des valeurs des options d'IPO de de renonciation à l'offre. Enfin, lors d'un retrait obligatoire, le principe d'équité doit être respecté. Or, la procédure de fixation du prix de retrait obligatoire varie selon les cadres réglementaires et le manque de mesures de protection des intérêts des actionnaires minoritaires peut inciter à la dissimulation d'informations privées afin de minimiser le prix d'offre. Le modèle proposé a permis de dresser deux classifications montrant que le seul moyen permettant de les concilier les actionnaires est l'entière divulgation des informations privées. / This thesis reports three aspects related to IPOs and delisting. The first is related to the process of pricing the two bid priees. Indeed, given the differences between the two public offerings, underwriters use the same valuation methods without justifying their choices. Through an audit of the IPO and delisting prospectus, the valuation process is based on the characteristics of firms and market conditions. ln addition, there is a significant relationship between the offer priee and the different estimates. Moreover, given that IPOs may coincide with an exceptional increase in the market index and are accompanied by an initial underpricing. The choice of optimal timing of this offer is modeled as regards the priees of listed companies and values of IPO and withdrawing options. Finally, at a delisting, the principle of fairness must be respected. However, the procedure for setting the bid priee varies with regulation and the lack of measures to protect the interests of minority shareholders may encourage the disclosure of private information in order to minimize the offer priee. The proposed model was used to develop two classifications showing that the only way to reconcile shareholders is the full disclosure of private information.