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The widespread use of embedded mixed-signal cores in system-on-chip (SoC) or System-on-Package (SoP) design has been increasingly important in cost-effective manufacturing test for mixed-signal devices. A typical SoP encapsulates many of its internal functions, and its production test is performed by application of test signals to the SoP under control of external Automatic Test Equipment (ATE). However it is a problem that the external ATE does not have direct access to all the internal embedded functions of the SoP. Thus a classical test approach to SoP suffers from limited controllability and observability of its subsystems. Built-in Self-Test (BIST) and Built-off Self-test (BOST) schemes have been suggested and developed to overcome the limitations of conventional test, such as limited test Input/Output (I/O) accessibility as well as high test cost. However most BIST/BOST approaches have limited test accuracy. The focus of the dissertation is to develop a cost-effective performance-based test methodology based on BIST/BOST, while maintaining the same accuracy as conventional test. This dissertation proposes one BIST approach and two BOST schemes. Our BIST methodology presents a methodology for efficient prediction of circuit specifications with optimized signatures. The proposed Optimized Signature-Based Alternate Test (OSBAT) methodology accurately predicts the specifications of a Device Under Test (DUT) using a strong correlation mapping function. The approach overcomes the limitation that analytical expressions cannot precisely describe the nonlinear relationships between signatures and specifications. Our first BOST approach presents a practical methodology for effective prediction of individual dynamic performance parameters of differential devices with a cascaded Radio-Frequency (RF) transformer in loopback mode. The RF transformer produces differently weighted loopback responses, which are used to characterize the DUT dynamic performance. The approach overcomes the imbalance problem of Design for Test (DfT) circuitry on differential signaling, thereby accurately measuring the dynamic performance of differential mixed-signal circuits. The second BOST scheme is an efficient methodology for accurate prediction of aperture jitter using cost-effective loopback methodology. Aperture jitter is precisely separated from input and clock jitter as well as additive noise present in the DUT, by using an efficient loopback scheme. Hardware measurements were performed for all our approaches, and good results were obtained. This fact verifies that all approaches can be practically used for production test in industry.

Thesis (Ph. D.)--University of Texas at Austin, 2007. / Vita. Includes bibliographical references.

Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 210-211). Available also in a digital version from Dissertation Abstracts.

Since the early days of software testing, automatic test generation has been suggested as a way of allowing tests to be created at a lower cost. However, industrially useful and applicable tools for automatic test generation are still scarce. As a consequence, the evidence regarding the applicability or feasibility of automatic test generation in industrial practice is limited. This is especially problematic if we consider the use of automatic test generation for industrial safety-critical control systems, such as are found in power plants, airplanes, or trains. In this thesis, we improve the current state of automatic test generation by developing a technique based on model-checking that works with IEC 61131-3 industrial control software. We show how automatic test generation for IEC 61131-3 programs, containing both functional and timing information, can be solved as a model checking problem for both code and mutation coverage criteria.  The developed technique has been implemented in the CompleteTest tool. To evaluate the potential application of our technique, we present several studies where the tool is applied to industrial control software. Results show that CompleteTest is viable for use in industrial practice; it is efficient in terms of the time required to generate tests that satisfy both code and mutation coverage and scales well for most of the industrial programs considered. However, our results also show that there are still challenges associated with the use of automatic test generation. In particular, we found that while automatically generated tests, based on code coverage, can exercise the logic of the software as well as tests written manually, and can do so in a fraction of the time, they do not show better fault detection compared to manually created tests. Specifically, it seems that manually created tests are able to detect more faults of certain types (i.e, logical replacement, negation insertion and timer replacement) than automatically generated tests. To tackle this issue, we propose an approach for improving fault detection by using mutation coverage as a test criterion. We implemented this approach in the CompleteTest tool and used it to evaluate automatic test generation based on mutation testing. While the resulting tests were more effective than automatic tests generated based on code coverage, in terms of fault detection, they still were not better than manually created tests. In summary, our results highlight the need for improving the goals used by automatic test generation tools. Specifically, fault detection scores could be increased by considering some new mutation operators as well as higher-order mutations. Our thesis suggests that automatically generated test suites are significantly less costly in terms of testing time than manually created test suites. One conclusion, strongly supported by the results of this thesis, is that automatic test generation is efficient but currently not quite as effective as manual testing. This is a significant progress that needs to be further studied; we need to consider the implications and the extent to which automatic test generation can be used in the development of reliable safety-critical systems.

This research aims at the development of a RF mass production load board for 4 bands cellular phone (850 MHz GSM-USA, 900 MHz GSM, 1.8 GHz DCS and 1.9 GHz PCS). To construct a strong theoretical foundation, the characteristics of key components such as relays, balun, cables, vias, micro strip line on the load board and the RF rules for PCB layout are extensively studied. An experimental load board is also specially designed to study the characteristics of RF printed circuit board. In this experimental load board, different materials (FR4 and Rogers) and transmission lines (microstrip lines and differential lines) are specially made and measured. After studying this experimental load board, we co-work with the RF load board supplier KeyStone to do the simulation as the preparation of production load board. In this simulation, the actual layout (Gerber file) of critical path together with the socket is checked for the resonance frequency. The production load board is manufactured in FR4 and debugged in the off-line debugging station before a correlation process in the ATE (automatic test equipment). Fine tune of 4 bands matching circuit is done by changing the value and/or the position of component on the matching circuit with VNA. After the fine tune, 70 good devices were tested twice on the same u-Flex tester with the developed load board and the one sent from test center in Europe (reference loadboard). The test results are processed by statistics tool ¡§Data Power¡¨ to calculate the mean value, variance, Cpk (biased process capability), R&R (Repeatability and Reproducibility), etc. The statistics results show the performance of the developed RF load board and the one from the test center in Europe is compatible and can be released for mass production. From this research, design flow of RF loadboard, highly relies on simulation to guarantee the performance of RF loadboard instead of basing on experience and/or trial and error, has been built up

Thesis (Ph. D.)--University of Washington, 2001. / Vita. Includes bibliographical references (leaves 68-72).

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Thesis(M.S.)--Auburn University, 2006. / Abstract. Vita. Includes bibliographic references.

Thesis(M.S.)--Auburn University, 2005. / Abstract. Vita. Includes bibliographic references.