<p>The semiconductor industry continues to relentlessly advance silicon technology scaling into the deep-submicron (DSM) era. High integration levels and structured design methods enable complex systems that can be manufactured in high volume. However, due to increasing integration densities and high operating speeds, subtle manifestation of defects leads to functional failures at the board level. Functional fault diagnosis is, therefore, necessary for board-level product qualification. However, ambiguous diagnosis results can lead to long debug times and wrong repair actions, which significantly increase repair cost and adversely impact yield.</p><p>A state-of-the-art diagnosis system involves several key components: (1) design of functional test programs, (2) collection of functional-failure syndromes, (3) building of the diagnosis engine, (4) isolation of root causes, and (5) evaluation of the diagnosis engine. Advances in each of these components can pave the way for a more effective diagnosis system, thus improving diagnosis accuracy and reducing diagnosis time. Machine-learning techniques offer an unprecedented opportunity to develop an automated and adaptive diagnosis system to increase diagnosis accuracy and speed. This dissertation targets all the above components of an advanced diagnosis system by leveraging various machine-learning techniques. </p><p>This thesis first describes a diagnosis system based on support-vector machines (SVMs), multi-kernel SVMs (MK-SVMs) and incremental learning. The MK-SVM method leverages a linear combination of single kernels to achieve accurate root-cause isolation. The MK-SVMs thus generated also can be updated based on incremental learning. Furthermore, a data-fusion technique, namely majority-weighted voting, is used to leverage multiple learning techniques for diagnosis. </p><p>The diagnosis time is considerable for complex boards due to the large number of syndromes that must be used to ensure diagnostic accuracy. Syndrome collection and analysis are major bottlenecks in state-of-the-art diagnosis procedures. Therefore, this thesis describes an adaptive diagnosis method based on decision trees (DT). The number of syndromes required for diagnosis can be significantly reduced compared to the number of syndromes used for system training. Furthermore, an incremental version of DTs is used to facilitate online learning, so as to bridge the knowledge obtained at test-design stage with the knowledge gained during volume production. </p><p>This dissertation also includes an evaluation and enhancement framework based on information theory for guiding diagnosis systems using syndrome and root-cause analysis. Syndrome analysis based on subset selection provides a representative set of syndromes. Root-cause analysis measures the discriminative ability of differentiating a given root cause from others. The metrics obtained from the proposed framework can provide guidelines for test redesign to enhance diagnosis. In addition, traditional diagnosis systems fail to provide appropriate repair suggestions when the diagnostic logs are fragmented and some syndromes are not available. The feature of handling missing syndromes based on imputation methods has therefore been added to the diagnosis system. </p><p>Finally, to tackle the bottleneck of data acquisition during the initial product ramp-up phase, a knowledge-discovery method and a knowledge-transfer method are proposed for enriching the training data set, thus facilitating board-level functional fault diagnosis. In summary, this dissertation targets the realization of an automated diagnosis system with the features of high accuracy, low diagnosis time, self-evaluation, self-learning, and ability of selective learning from other diagnosis systems. Machine learning and information-theoretic techniques have been adopted to enable the above-listed features. The proposed diagnosis system is expected to contribute to quality assurance, accelerated product release, and manufacturing-cost reduction in the semiconductor industry.</p> / Dissertation

This thesis describes the design of a board-level testing platform for monitoring and driving a selected set of interfaces used in space applications. The requirements of these devices are based on the corresponding ECSS, IEEE, and TIA standards described in the theoretical part of this thesis. The designed testing device is controlled by the Xilinx Zynq-7000 system-on-chip and is connected to a control PC via an Ethernet connection. The hardware, designed on a schematic level is responsible for meeting the standards' requirements. The software part consists of a Python module for the control PC providing a set of functions to be used in the testing process and a C application for the embedded ARM processor that forwards the data through the AXI interface to the interface drivers in the programmable logic.

Recent trends to miniaturized systems such as smartphones and wearables, as well as the rise of autonomous vehicles relying on all-electric and smart in-car systems, have brought unprecedented needs for superior performance, functionality, and cost requirements. Transistor scaling alone cannot meet these metrics unless the remaining system components such as substrates and interconnections are scaled down to bridge the gap between transistor and system scaling. In this regard, 3D glass system packages have emerged as a promising alternative due to their ultra-short system interconnection lengths, higher component densities and system reliability enabled by the tailorable coefficient of thermal expansion (CTE), high dimensional stability and surface smoothness, outstanding electrical properties and low-cost panel-level processability of glass. The research objectives are to demonstrate board-level reliability of large, thin, glass packages directly mounted on PCB with conventional BGAs at pitches of 400µm SMT and smaller. Two key innovations are introduced to accomplish the objectives: a.) Reworkable circumferential polymer collars providing strain-relief at critical high stress concentration areas in the solder joints, b.) novel Mn-doped SACMTM solder to provide superior drop test performance without degrading thermomechanical reliability. Modeling, package and board design, fabrication and reliability characterization were carried out to demonstrate reliable board-level interconnections of large, ultra-thin glass packages. Finite-element modeling (FEM) was used to investigate the effectiveness of circumferential polymer collars as a strain-relief solution on fatigue performance. Experimental results with polymer collars indicated a 2X improvement in drop performance and 30% improvement in fatigue life. Failure analysis was performed using characterization techniques such as confocal surface acoustic microscopy (C-SAM), optical microscopy, X-ray imaging, and scanning electron microscopy/energy dispersive spectrometry (SEM/EDS). Model-to-experiment correlation was performed to validate the effectiveness of polymer collars as a strain-relief mechanism. Enhancement in board-level reliability performance with advances in solder materials based on Mn-doped SACMTM is demonstrated in the last part of the thesis.The studies, thus, demonstrate material, design and process innovations for package-to-board interconnection reliability with ultra-thin, large glass packages.

The trend to high I/O density, performance and miniaturization at low cost is driving the industry towards shrinking interposer design rules, requiring a new set of packaging technologies. Low-CTE packages from silicon, glass and low-CTE organic substrates enable high interconnection density, high reliability and integration of system components. However, the large CTE mismatch between the package and the board presents reliability challenges for the board-level interconnections. Novel stress-relief structures that can meet reliability requirements along with electrical performance while meeting the cost constraints are needed to address these challenges. This thesis focuses on a comprehensive methodology starting with modeling, design, fabrication and characterization to validate such stress-relief structures. This study specifically explores SMT-compatible stress-relief microwire arrays in thin polymer carriers as a unique and low-cost solution for reliable board-level interconnections between large low-CTE packages and printed wiring boards. The microwire arrays are pre-fabricated in ultra-thin carriers using low-cost manufacturing processes such as laser vias and copper electroplating, which are then assembled in between the interposer and printed wiring board (PWB) as stress-relief interlayers. The microwire array results in dramatic reduction in solder stresses and strains, even with larger interposer sizes (20 mm × 20 mm), at finer pitch (400 microns), without the need for underfill. The parallel wire arrays result in low resistance and inductance, and therefore do not degrade the electrical performance. The scalability of the structures and the unique processes, from micro to nanowires, provides extendibility to finer pitch and larger package sizes. Finite element method (FEM) was used to study the reliability of the interconnections to provide guidelines for the test vehicle design. The models were built in 2.5D geometries to study the reliability of 400 µm-pitch interconnections with a 100 µm thick, 20 mm × 20 mm silicon package that was SMT-assembled onto an organic printed wiring board. The performance of the microwire array interconnection is compared to that of ball grid array (BGA) interconnections, in warpage, equivalent plastic strain and projected fatigue life. A unique set of materials and processes was used to demonstrate the low-cost fabrication of microwire arrays. Copper microwires with 12 µm diameter and 50 µm height were fabricated on both sides of a 50 µm thick, thermoplastic polymer carrier using dryfilm based photolithography and bottom-up electrolytic plating. The copper microwire interconnections were assembled between silicon interposer and FR-4 PWB through SMT-compatible process. Thermal mechanical reliability of the interconnections was characterized by thermal cycling test from -40°C to 125°C. The initial fatigue failure in the interconnections was identified at 700 cycles in the solder on the silicon package side, which is consistent with the modeling results. This study therefore demonstrated a highly-reliable and SMT-compatible solution for board-level interconnections between large low-CTE packages and printed wiring board.

No description available.

Abstract This thesis studies the methods to test mixed-signal devices and circuits on board and system level with embedded test instrumentation. The study is divided in three continuous sections, development of embedded test methods for discrete components, integration of test instruments on board level and development of test and health monitoring strategy for large scale system. The developed embedded test methods for mixed signal circuitry on board level are based on the standard for mixed signal test bus IEEE 1149.4. The standardized embedded test infrastructure is utilized for testing discrete components with emphasis on testing active components as diodes and transistors. The developed embedded tests are evaluated with PCOLA/SOQ method for manufacturing testing and also the usability of the tests is discussed. A solution for embedded mixed-signal test controller is presented with discussion of test communication and the possibilities of implementing embedded test control. The target in the development of the test control is to enable launch mixed signal tests on device remotely. The test controller is IEEE 1149.4 compatible and can generate and measure analog test signals while controlling boundary-scan enabled devices. The final section of the thesis focuses on an embedded test solution for aerospace bus system (MIL-STD-1553). Current solutions are based on testing the bus system during maintenance on ground. The developed test and monitoring method allows on-line monitoring of the bus to detect and locate possible defects which only occur during use of the aeroplane. / Tiivistelmä Väitöstyössä tutkittiin sekasignaalilaitteiden ja -piirien testausmenetelmiä levy- ja järjestelmätasolla hyödyntäen sulautettuja testilaitteita. Työ jakaantuu kolmeen osaan; sulautettujen testausmenetelmien kehitys diskreeteille komponenteille, testi-instrumenttien integrointi piirilevytasolle sekä testaus- ja kunnonmonitorointimenetelmän kehitys laajemmalle järjestelmälle. Sulautettujen testimenetelmien kehitys sekasignaalipiireille piirilevytasolla perustuu sekasignaalitestiväylän standardiin IEEE 1149.4. Standardoitua sulautettua testi-infrastruktuuria käytettiin diskreettien komponenttien testaukseen painottuen aktiivikomponentteihin, kuten diodeihin ja transistoreihin. Kehitetyt sulautetut testit on arvioitu PCOLA/SOQ menetelmällä, jota hyödynnetään tuotantotestauksen testikattavuuden arvioinnissa. Lisäksi testimenetelmien käytettävyyttä arvioitiin. Sulautettu sekasignaalilaitteiden testikontrollerin tavoite on käynnistää ja suorittaa sekasignaalitestejä laitteessa etäältä. Kehitetty testikontrolleri on IEEE 1149.4 yhteensopiva ja voi generoida ja mitata analogista testisignaalia sekä samanaikaisesti ohjata testiväylää. Lisäksi etätestauksen mahdollistavasta testikommunikaatiomenetelmiä arvioitiin kuten myös erilaisia toteutustasoja sulautetuille testimenetelmille. Laajemman järjestelmän kehityksessä tutkittiin sulautettua testausratkaisua lentokoneen väyläjärjestelmälle, joka perustuu standardiin MIL-STD-1553B. Nykyiset menetelmät perustuvat väyläjärjestelmän testaukseen huollon yhteydessä, mutta osa virheistä ilmenee vain käytön aikana. Kehitetty testaus- ja monitorointimenetelmä mahdollistaa käytönaikaisen jatkuvan virheiden monitoroinnin sekä niiden paikantamisen lennon aikana.

Abstract The target of this dissertation is to propose a new qualification tool (QT) for component package (CP) feasibility qualification in telecommunication infrastructure products. The primary reason for the introduction of the QT is the Electrical and Electronic Equipment (EEE) manufacturers’ continuing development of new products with tighter product requirements, e.g. compact size, environmental friendliness and cost-efficiency. CP’s need to match these requirements and thus they need to be developed further and qualified/re-qualified continuously. This qualification process with the new component package needs to be done in as early phase as possible, enabling EEE manufacturers to implement component packages into use with minimal risk. Qualification of a CP to match with these requirements is usually done with the qualification expert’s possessed know-how. However, this process takes a lot of time as all the possible data must be collected or even created. Thus a new method needs to be introduced for early phase qualification. The QT proposed here contains eight qualification sub-areas for feasibility qualification of the CP and it uses three qualification principles. Including all these sub-areas to the feasibility qualification clearly enables more reliable and trustworthy conclusions. The QT is required as an assisting qualification tool for specialists and as a preliminary qualification tool, e.g. for hardware (HW) designers or component engineers. It could be used also as a requirement communication tool between customers and component package manufacturers. After the QT’s sub-areas and functionality were developed, functionality and approval limits were set-up with 44 different widely used commercial CPs. This historical data is recorded for future use in its own database. The QT is a unique tool as there are no competing open-source tools available in the market that can be tailored to match with the user’s own requirements. / Tiivistelmä Työn tarkoituksena oli esittää uusi kvalifiointityökalu (QT) infrastruktuurituotteiden komponenttikoteloiden käytettävyyden arviointiin. Laitevalmistajien kehittäessä uusia pienempiä, ympäristöystävällisempiä ja kustannustehokkaampia laitteita asettavat he samalla vastaavia vaatimuksia myös komponenttikoteloille. Vastaavasti komponenttien valmistajat joutuvat kehittämään komponentteja ottamalla käyttöön uusia materiaaleja ja kotelorakenteita ja kvalifioimaan niiden ominaisuuksia asiakkaiden vaatimuksien mukaisesti. Laitevalmistajien riski uusien komponenttikoteloiden käyttöönotossa pystytään minimoimaan, kun komponenttikoteloiden kvalifiointi tehdään mahdollisimman aikaisessa vaiheessa. Kvalifioinnit tehdään yleensä kvalifiointiasiantuntijoiden tietotaidon perusteella. Tämä prosessi on kuitenkin perinteisesti hidas, joten nopeammalle arviointimenetelmälle on selkeä tarve. Työssä kehitettyyn kvalifiointityökaluun määritettiin kahdeksan arviointialuetta. Lisäksi sitä voidaan käyttää kolmella eri kvalifiontiperiaatteella. Näiden arviointialueiden huomioiminen kvalifiointiprosessin aikana parantaa selkeästi tuloksen luotettavuutta ja todenmukaisuutta. Työkalu on määritetty siten, että sitä voivat käyttää asiantuntijat avustavana kvalifiointityökaluna sekä suunnittelijat / komponentti-insinöörit alustavana kvalifiointityökaluna. Lisäksi sitä voidaan myös käyttää asiakasvaatimusten määrityksessä ja tiedonvälityksessä asiakkaan ja toimittajan välillä. QT:n kvalifiointialueiden määrittelyn ja toiminnallisuuden rakentamisen jälkeen, hyväksyntäkriteerit tutkittiin ja arvioitiin käyttäen 44 erilaista kaupallista komponenttikoteloa työkalun lopullisen hienosäädön tekemiseksi. Koska kvalifioinnin tiedot tallennetaan QT:n tietokantaan, pystyy laitevalmistajat hyödyntämään aikaisemmat historiatiedot tulevissa kvalifioinneissa. QT on ennen näkemätön työkalu, sillä markkinoilla ei ole vastaavia avoimen lähdekoodin kvalifiointityökaluja tarjolla, jota voidaan räätälöidä asiakkaan omien tarpeiden mukaisesti.

Cette thèse prend pour objet d’étude les administrateurs salariés en France, soit les représentants du personnel élus par les travailleurs, le plus souvent sur liste syndicale, pour siéger au conseil d’administration [CA] ou de surveillance [CS] de leur entreprise avec les mêmes droits et devoirs que les autres administrateurs, y compris le droit de vote sur les décisions stratégiques. A partir d’une méthodologie croisant différentes techniques d’enquête (l’analyse documentaire, deux études monographiques, la passation d’un questionnaire et l’observation participante), nous interrogeons la régulation sociale qui se joue dans les entreprises alors dites « démocratisées ». Parce que le sujet prête encore à confusion, nous commençons par une double mise en contexte : conceptuelle, en opérant un retour sur la définition de la « participation des salariés aux décisions » pour souligner la singularité du CA ou CS comme espace participatif ; historique, en analysant la dynamique de l’institutionnalisation saccadée des administrateurs salariés pour en éclairer sa dimension de jure. Nous nous intéressons ensuite à sa dimension de facto. Nous interrogeons en premier lieu l’effectivité de la règle et constatons d’une part que son application est directement dépendante de son ancrage dans une source de droit contraignant et, d’autre part, que la singularité de ce dispositif se reflète dans le profil des syndicalistes appelés à siéger au CA ou CS qui présentent, dans leur grande majorité, un capital militant particulièrement développé. Et ce parce que l’action de l’administrateur salarié, que nous observons en second lieu, a pour particularité de s’inscrire à la fois au sein du système de gouvernement d’entreprise et des relations professionnelles. Si sa capacité d’action dans le premier est le plus souvent limitée à la sphère de l’influence, le CA ou CS peut néanmoins constituer un espace pertinent de l’action collective à la condition d’un effort d’articulation des différentes scènes de représentation du personnel par l’organisation syndicale. Nous montrons ainsi que la participation des salariés aux décisions stratégiques ne conduit pas mécaniquement à un rééquilibrage des pouvoirs dans l’entreprise, mais qu’elle peut produire une reconfiguration des relations professionnelles pour peu que les différents acteurs en présence s’en saisissent. / This thesis focuses on the study of board-level employee representatives, i.e. employee representatives elected by the workforce under trade union nomination who serve on their company’s board of directors [BoD] or supervisory board [SVB] with the same rights and duties than that of other directors, including the right to vote on strategic decisions. Thanks to a methodology which combines different survey techniques (documentary analysis, two case studies, questionnaire distribution, participant observation), we question the nature of the social regulation which takes place within such so-called “democratised” companies. As this subject continue to lead to misunderstanding, we start setting the scene against a twofold context: a conceptual one, going back to the definition of “workers’ participation in decision-making” in order to underline the idiosyncrasy of the BoD or SVB as a participatory scene; an historical one, analyzing the non-linear dynamics of board-level employee representation’s institutionalisation in order to shed light on its de jure dimension. We then turn to its de facto dimension. First, we question the effectiveness of this rule and we observe that, on the one hand, its application directly depends on its anchorage in a source of binding law and, on the other hand, that the uniqueness of this provision is reflected in the profile of the union members selected to serve on the board whose great majority has a particularly well-developed “activist capital”. This is because, secondly, board-level employee representative’s action specificity lies both in the corporate governance and the industrial relations systems. If his/her capacity of action is limited to the sphere of influence in the former, the BoD of SVB could however be deemed a relevant arena of collective action provided that the trade union engages in an effort aimed at articulating the various scenes of workers’ representation. We demonstrate that workers’ participation in strategic decision-making does not automatically lead to a rebalancing of power within the company, but that it can produce a reshaping of industrial relations as long as the various involved actors seize it.

Cette thèse prend pour objet d’étude les administrateurs salariés en France, soit les représentants du personnel élus par les travailleurs, le plus souvent sur liste syndicale, pour siéger au conseil d’administration [CA] ou de surveillance [CS] de leur entreprise avec les mêmes droits et devoirs que les autres administrateurs, y compris le droit de vote sur les décisions stratégiques. A partir d’une méthodologie croisant différentes techniques d’enquête (l’analyse documentaire, deux études monographiques, la passation d’un questionnaire et l’observation participante), nous interrogeons la régulation sociale qui se joue dans les entreprises alors dites « démocratisées ». Parce que le sujet prête encore à confusion, nous commençons par une double mise en contexte : conceptuelle, en opérant un retour sur la définition de la « participation des salariés aux décisions » pour souligner la singularité du CA ou CS comme espace participatif ; historique, en analysant la dynamique de l’institutionnalisation saccadée des administrateurs salariés pour en éclairer sa dimension de jure. Nous nous intéressons ensuite à sa dimension de facto. Nous interrogeons en premier lieu l’effectivité de la règle et constatons d’une part que son application est directement dépendante de son ancrage dans une source de droit contraignant et, d’autre part, que la singularité de ce dispositif se reflète dans le profil des syndicalistes appelés à siéger au CA ou CS qui présentent, dans leur grande majorité, un capital militant particulièrement développé. Et ce parce que l’action de l’administrateur salarié, que nous observons en second lieu, a pour particularité de s’inscrire à la fois au sein du système de gouvernement d’entreprise et des relations professionnelles. Si sa capacité d’action dans le premier est le plus souvent limitée à la sphère de l’influence, le CA ou CS peut néanmoins constituer un espace pertinent de l’action collective à la condition d’un effort d’articulation des différentes scènes de représentation du personnel par l’organisation syndicale. Nous montrons ainsi que la participation des salariés aux décisions stratégiques ne conduit pas mécaniquement à un rééquilibrage des pouvoirs dans l’entreprise, mais qu’elle peut produire une reconfiguration des relations professionnelles pour peu que les différents acteurs en présence s’en saisissent. / This thesis focuses on the study of board-level employee representatives, i.e. employee representatives elected by the workforce under trade union nomination who serve on their company’s board of directors [BoD] or supervisory board [SVB] with the same rights and duties than that of other directors, including the right to vote on strategic decisions. Thanks to a methodology which combines different survey techniques (documentary analysis, two case studies, questionnaire distribution, participant observation), we question the nature of the social regulation which takes place within such so-called “democratised” companies. As this subject continue to lead to misunderstanding, we start setting the scene against a twofold context: a conceptual one, going back to the definition of “workers’ participation in decision-making” in order to underline the idiosyncrasy of the BoD or SVB as a participatory scene; an historical one, analyzing the non-linear dynamics of board-level employee representation’s institutionalisation in order to shed light on its de jure dimension. We then turn to its de facto dimension. First, we question the effectiveness of this rule and we observe that, on the one hand, its application directly depends on its anchorage in a source of binding law and, on the other hand, that the uniqueness of this provision is reflected in the profile of the union members selected to serve on the board whose great majority has a particularly well-developed “activist capital”. This is because, secondly, board-level employee representative’s action specificity lies both in the corporate governance and the industrial relations systems. If his/her capacity of action is limited to the sphere of influence in the former, the BoD of SVB could however be deemed a relevant arena of collective action provided that the trade union engages in an effort aimed at articulating the various scenes of workers’ representation. We demonstrate that workers’ participation in strategic decision-making does not automatically lead to a rebalancing of power within the company, but that it can produce a reshaping of industrial relations as long as the various involved actors seize it.

This paper demonstrates an approach for passive alignment and assembly of link components for board-level very-short range optical interconnects. This interchip optical link is based on planar polymeric multimode waveguides and glassbased electro-optical transceivers. The main aim of the work is the investigation of assembly processes of link components in order to fulfill the tolerance requirements using passive alignment. The optical characterization in regard to the optical coupling between link components will define the tolerances for the alignment process. This optical analysis is based on measurements of spatial coupling characteristics. The influence of assembly tolerances on the coupling efficiency is investigated. Flip-chip assembly of electro-optical devices on the glass interposer and of the glass interposer on optical overlay is presented to prove the implementation of the concept.