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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Improving sawmill residue chip quality /

Wallace, Robert D., January 1993 (has links)
Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1993. / Vita. Abstract. Includes bibliographical references (leaves 145-148). Also available via the Internet.
32

Porovnání přípravků z vybraných druhů dřeva nahrazujících sudy typu barrique

Poništiak, Rudolf January 2019 (has links)
The diploma thesis was focused on evaluation of selected species of wood species serving as a replacement for barrique barrels. The theoretical part was focused on the production of barrels and chemical composition of wood. It also dealt with the most common types of chippings used to make barrels and their alternatives in similarly wooden chips. For this experiment, 8 species of trees were selected which were subsequently heat treated to the desired levels of 110 ° C, 175 ° C and 200 ° C. Wooden chips were applied to the Riesling wine and changes in wine were followed after a period. Spectophotometry was used to monitor antioxidant capacity, and the content of total polyphenols in wine was determined. Finally, a sensory analysis was performed.
33

Glucose and sucrose levels in potato tubers by cultivars and farms stored under different regimes and their influence on potato chip color /

Pak, Paul Kote-Tak January 1985 (has links)
No description available.
34

Composição nutricional e perfil de ácidos graxos de batatas chips e sanacks extrusados /

Oliveira, Marcel de Campos. January 2009 (has links)
Orientador: Neuza Jorge / Banca: Odair Zenebon / Banca: Ana Lúcia Barretto Penna / Resumo: O mercado de chips e snacks, particularmente àqueles obtidos de matéria-primas ricas em amido como banana, mandioca e mandioquinha-salsa, embora não suprem as necessidades diárias do indivíduo, vem ocupando um espaço cada vez maior, especialmente nos centros urbanos. O objetivo deste trabalho foi avaliar a composição nutricional, o perfil de ácidos graxos e as informações nutricionais dos rótulos das amostras de batatas chips e de snacks extrusados. Foram coletadas 10 amostras de batatas chips e 10 amostras de snacks extrusados, obtidas de três lotes diferentes. A análise nutricional, realizada pelos métodos oficiais, constou das determinações de umidade, proteínas, lipídios, cinzas, carboidratos totais, valor energético e sódio, calculado a partir do cloreto de sódio. O perfil de ácidos graxos obtido por cromatografia gasosa, sendo os picos identificados por tempos de retenção com padrões de ésteres metílicos e os resultados calculados e expressos g/100g da amostra. As informações nutricionais dos rótulos de ambos os produtos foram avaliados de acordo com as Resoluções RDC 359/03 e RDC 360/03. análise estatísticas dos resultados indicou que as interações entre marcas e lotes foram significativas para todas as determinações da composição nutricional, tanto as batatas chips como para os snacks extrusados. Os teores de sódio encontrados oscilaram entre 120 a 688 mg/100g para as batatas chips e 372 a 1.328 100g para os snacks extrusados. Os perfis de ácidos graxos determinados nas batatas chips e nos snacks extrusados provenientes de diferentes marcas foram, em média, 39,28 e 22,36% para ácidos graxos saturados, 39,75 e 10,69% para monoinsaturados, 18,62 e 38,18% para poliinsaturados e, 2,34 e 28,78% para trans, respectivamente. Quanto as informações nutricionais dos rótulos, os erros relacionados aos itens obrigatórios mais encontrados... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: Junk foods like chips and snacks, which are starches' sources of raw material, for example, banana, cassava and mandioquinha-salsa, don't enhance the daily necessity of diary's individuals, but are lots of consume in large urban centre. The aim of this study was evaluate the nutritional composition, the profile of fatty acids and the label information of samples of potato chips and extruded snacks. It was collected 10 samples of potato chips and extruded snacks from 10 samples, obtained from three different batches. The nutritional analysis was determined by official methods consisted of the determination of moisture, proteins, lipids, ash, total carbohydrates and energy. The analysis of sodium was performed using the determination of sodium chloride. The profile of fatty acids was obtained by gas chromatography and the peaks identified by retention time with standards of methyl esters and the results calculated and expressed as g/100g of the sample. The labels information of both of the products was evaluated according to the DRC 359/03 and 360/03 Resolutions. The statistics' analysis of the results indicated that the interactions between brands and batches were significant for all determinations of nutritional composition, as for potato chips as for extruded snacks. The sodium levels ranged from 120 to 688 mg/100g for potato chips and from 372 to 1328 mg/100g for extruded snacks. The profiles of fatty acids presented by the potato chips and extruded snacks from different brands were on average 39.28 and 22.36% for saturated fatty acids, 39.75 and 10.69% for monounsaturated, 18.62 and 38.18% for polyunsaturated, and 2.34 and 28.78% for trans, respectively. As label information, the mistakes (errors) related to the compulsory items were on the conversion to kJ, compulsory declaration and declaration of nutrients per serving, for both products. As for the mistakes (errors)... (Complete abstract click electronic access below) / Mestre
35

Microstructure And Mechanical Properties Of Consolidated Magnesium Chips

Anil Chandra, A R 08 1900 (has links) (PDF)
Development of sustainable manufacturing and conservation of primary materials are the key challenges to environmental degradation and climate change. Recycling of primary materials is one of the approaches suggested for sustainable green manufacturing. In the present study, an attempt has been made to encompass both these concepts, i.e. recycling of waste machined chips of magnesium and development of sustainable manufacturing process. Chips generated during machining operations are of significant importance; they dissipate the heat from the work-piece and control the quality of the finished products. In recent years researchers have shown that by controlled machining it is possible to tailor size, shape and microstructure of chips and this has added new dimensions to the utility of these machined chips. Chips in the form of thin strips, rods, very fine powders with varying aspect ratio have been successfully machined with grain structure having nano size (~80nm) to submicron size. Consolidation of such machined chips and subsequent fabrication of products is of great interest from the point of view of sustainable manufacturing. Consolidation of machined chips by cold compaction followed by hot extrusion was proposed and has been termed as solid state recycling (SSR). This alternative method of manufacturing using machined chips circumvents melting and casting. Although several materials have been tried by this route, magnesium appears to be the most investigated material. Being lightest among the structural materials, magnesium and its alloys have wide ranging applications especially in automotive industry. Further, magnesium melting is cumbersome and environmentally hazardous which necessitates researchers to explore methods of overcoming the melting route. In this pursuit, SSR appears to be a choice for a soft material like magnesium whose products are fabricated by conventional processing techniques which include cold compaction followed by hot extrusion. Most of the work in literature with regard to SSR of magnesium has been centered around development of new alloys and their characterisation at room and elevated temperatures. Effect of oxide contaminants has also been widely studied. However, studies on microstructural evolution during processing (i.e. microstructure prior to and after extrusion) have not been reported. Further, such studies with pure metal is important since it is possible to separate the effect of secondary phases including precipitates which are otherwise present in alloys of Mg. Hence, commercial grade pure magnesium is the material of interest in the present work. Process of consolidation includes room temperature compaction followed by hot extrusion. The aim of the present work includes: Consolidation of machined chips of magnesium into billets by cold compaction at room temperature followed by hot extrusion, Microstructural characterisation of these cold compacted billets prior to and after extrusion, Evaluation of mechanical properties after extrusion at different temperatures. Correlating the mechanical properties with microstructure. In the present study mechanical properties evaluated include: strength properties (hardness, tensile and compressive properties), and damping properties As-cast billet of pure magnesium was turned in a lathe to produce chips at ambient conditions. The chips were cold compacted into billets of 28 mm diameter at a pressure of 350 MPa and held for 30 minutes. The billets of compacted chips (referred here as CC) were later extruded at four different temperatures, viz. 250, 300, 350 and 400°C, with an extrusion ratio of 49:1. Prior to extrusion, the CC was soaked at the desired extrusion temperature for 1 hour. Here, extrusions of compacted chips are designated as CCE (chip compacted and extruded). For comparison, the as-cast billet was extruded under similar conditions and is designated as AE (as-cast and extruded). The extruded rods had a diameter of 4 mm. Microstructural characterisation was done prior to and after extrusion, which forms the first part of the thesis. The extruded rods were characterised for their room temperature strength properties in the second part of the thesis. In the third and last part, damping properties were characterised as a function of time and temperature. Microstructural changes at the end of temperature sweep tests were also examined. Optical microscopy did not reveal the grain structure of CC due to the intense strains associated with chip formation and subsequent cold compaction. However, chip boundaries were found randomly oriented and tri-junctions were found to be porous. The CC showed a relative density of 95.4% and this happens to be the highest amongst the values reported in literature for SSR machined chips. TEM images of CC revealed an average grain size of 0.75µm. Synopsis CCs were soaked at extrusion temperature and quenched to unravel the microstructure that exists prior to extrusion. Grain size and hardness measurements indicate that the material was recrystallised prior to extrusion. Bulk texture estimated from X-ray diffraction, showed weak crystallographic textures. The CC had a typical texture with c-axis aligned along the compaction direction which subsequently got randomised during soaking (pre-heating at extrusion temperature). After extrusion, the 250°C extruded AE had slightly stronger texture than CCE: with clear preference for < 1010 > and < 1120 > plane normals. High working temperatures removed such preference and made the textures randomised for both AE and CCE. In-grain misorientations and the relative presence of the twins, estimated from EBSD scans show a clear pattern for higher in-grain misorientations in CCE compared to AE. The values for AE at higher extrusion temperatures approached that of fully recrystallised magnesium. Higher twin fraction in AE was attributed to its relatively larger grain size compared to CCE. The chip boundaries that were randomly oriented before extrusion appeared aligned along the extrusion direction after extrusion. On the contrary AE had an equiaxed structure. Both longitudinal and transverse section micrographs showed pronounced chip boundaries in the 250°C extruded CCE while it was no so pronounced in the case of 400°C extruded material. Density measurements showed 98.6% relative density for 250°C extruded CCE as compared to 99.9% densification achieved in 400°C extruded CCE. Dislocation density estimated using Variance method from the peaks of the X-ray diffraction data showed higher values for CCE compared to AE. Dislocation density reduced with increase in extrusion temperature. For comparison extruded rods were annealed at 250°C for 2 hours and their dislocation density was estimated. Vickers hardness indentations were done at low load (25g) and higher load (200g). Both showed decreasing values with increase in extrusion temperature. Grain size dependent hardness variation followed the Hall-Petch relationship. CCE showed higher hardness compared to AE. Room temperature tensile test showed higher 0.2% tensile proof stress (TPS) in CCE material and obeyed the grain size dependent Hall-Petch relationship, though the strain to failure was poor. CCE extruded at 250°C showed fibrous fracture surface and was different from the rest of the CCEs with evidence of shearing at chip boundaries before fracture. Synopsis The rest of the CCEs had a typical fracture surface which was similar to AE material. Strain hardening behaviour, measured in terms of hardening exponent (n), hardening capacity (Hc) and hardening rate (θ) was quiet different for CCE compared to AE. Room temperature compression test showed different kind of failure for 250°C extruded CCE with longitudinal splitting (de-bonding at chip boundaries) and shearing at an angle to loading direction. The rest of the CCEs failed in a typical manner similar to AE material. The 0.2% compressive proof stress (CPS) as a function of grain size obeyed the Hall-Petch relationship for AE while the fit was not so good for CCE. Moreover, except 400°C extruded CCE (CPS was higher by ~22%) the rest of the CCEs had lower CPS compared to AE despite having finer grain size. This was contrary to the TPS and hardness findings wherein CCE was consistently higher compared to AE owing to grain refinement. Density measurements showed presence of 1.4%, 0.8% and 0.5% porosity in 250°, 300° and 350°C extruded CCE samples respectively. Prompted by density, hardness and TPS findings, the CPS values were back-calculated using the Hall-Petch relationship of AE. The back-calculated CPS values of CCE were higher than corresponding AE. Strength asymmetry, measured as a ratio of compressive proof stress to tensile proof stress was higher in CCE compared to AE. Damping capacity (tanφ) and dynamic modulus were determined as a function of time (tested upto 30 minutes) and temperature (from RT to 300°C) at a constant frequency (5 Hz). CCE material displayed higher tanφ during time and temperature sweep tests (by 10-15%) with CCE extruded at 250° showing the highest values. Dynamic modulus was comparable for both the materials (with less than 5% difference) though, modulus was higher in materials extruded at higher temperature. Microstructural changes were examined at the end of temperature sweep test, both at the point of loading and away from the point of loading. A significant grain growth was observed in region under the loading point (in a 3-point bending set-up) and was insignificant at regions away from the loading point. Coarsening was low in CCE material on account of suppression at chip boundaries. Microstructure of CCE and AE specimens subjected to similar heating conditions but without loading showed no such coarsening.
36

Multipath Router Architectures to Reduce Latency in Network-on-Chips

Deshpande, Hrishikesh 2012 May 1900 (has links)
The low latency is a prime concern for large Network-on-Chips (NoCs) typically used in chip-multiprocessors (CMPs) and multiprocessor system-on-chips (MPSoCs). A significant component of overall latency is the serialization delay for applications which have long packets such as typical video stream traffic. To address the serialization latency, we propose to exploit the inherent path diversity available in a typical 2-D Mesh with our two novel router architectures, Dual-path router and Dandelion router. We observe that, in a 2-D mesh, for any source-destination pair, there are two minimal paths along the edges of the bounding box. We call it XY Dimension Order Routing (DOR) and YX DOR. There are also two non-minimal paths which are non-coinciding and out of the bounding box created by XY and YX DOR paths. Dual-path Router implements two injection and two ejection ports for parallel packet injection through two minimal paths. Packets are split into two halves and injected simultaneously into the network. Dandelion router implements four injection and ejection ports for parallel packet injection. Packets are split into smaller sub-packets and are injected simultaneously in all possible directions which typically include two minimal paths and two non-minimal paths. When all the sub-packets reach the destination, they are eventually recombined. We find that our technique significantly increases the throughput and reduces the serialization latency and hence overall latency of long packets. We explore the impact of Dual-path and Dandelion on various packet lengths in order to prove the advantage of our routers over the baseline. We further implement different deadlock free disjoint path models for Dandelion and develop a switching mechanism between Dual-path and Dandelion based on the traffic congestion.
37

A STUDY OF LOCAL CONVECTIVE HEAT TRANSFER COEFFICIENTS ON SURFACES OF ELECTRONIC CHIPS BY THE TRANSIENT HEAT TRANSFER METHOD WITH THERMOCHROMIC LIQUID CRYSTAL

Wang, Ying-Jr 29 June 2001 (has links)
Abstract There are three focal points in this experimental study¡G(1)Change Reynolds number(Re) and measure the heat transfer coefficients on upper¡Bback¡Bside and front surfaces of a chip for standard height(20mm)¡F(2)Influences of the surface heat transfer coefficients when change the heights of a chip to 10mm and 30mm , then compare with the results of a chip with standard height¡F(3)Compare the heat transfer effects of a chip on different positions of the testing region. The range of Re is 2000~10000 in this experiment and the chip sets are installed on the testing board with a 3x4 array. According to similarity principles to setup whole experimental models¡Fassume this experimental system is a semi-infinite region and its heat transfer model is one dimension¡Fuse the transient heat transfer method with thermochromic liquid crystal as the surface thermometer , then we assemble micro video cameras in the experimental system to obtain the color changing images on chip surfaces. The software , LCIA (Liquid Crystal Image Analysis) , is used to analysis the changed color and the temporal history of the surface temperatures to determine the local heat transfer coefficients on chip surfaces. The results show¡G(1)The heat transfer coefficients on chip surfaces are increased with Re and effects of vortex¡F(2)Upper surface of the chip has the largest average heat transfer coefficient(h) , front surface and side surface have almost the same at lower Re , but at higher Re , of front surface is larger than side surface¡Fback surface has the lowest ¡F(3)When change the height of the first chip to 10mm , it has the best heat transfer effects at Re=2175 and 3257¡Fthere is almost the same effects at Re=4423 with different heights(10mm , 20mm and 30mm) and from Re=5535 to 9973 , this chip has the best heat transfer effects at 30mm. Then change the heights of the second and third chips , there are the best heat transfer effects at 30mm and the lowest at 10mm¡F(4)When fix heights of the chips at 10mm and 20mm , there are more better heat transfer effects as chips more close to the entrance of the testing channel , but once the heights of chips are 30mm , the positions of chips on the testing region are not very important influences to heat transfer effects.
38

A Pure STT-MRAM Design for High-bandwidth Low-power On-chip Interconnects

Kansal, Rohan 16 December 2013 (has links)
Network-on-Chip (NoC) is a de facto inter-core communication infrastructure for future Chip Multiprocessors (CMPs). NoC should be designed to provide both low latency and high bandwidth considering limited on-chip power and area budgets. The use of a high density and low leakage memory, Spin-Torque Transfer Magnetic RAM (STT-MRAM), in NoC routers has been proposed as it increases network throughput by providing more buffer capacities with the same die footprint. However, the inevitable use of SRAM to hide the long write latencies of STT-MRAM sacrifices buffer area and also wastes significant leakage and dynamic power in migrating flits between the disparate memories. In this thesis, the first NoC router designs that use only STT-MRAM is proposed. This allows for a much larger buffer space with the least power consumptions. To overcome the multi-cycle writes, a multi-banked STT-MRAM buffer is employed, which is a logically divided virtual channel where every incoming flit is seamlessly pipelined to each bank alternately every clock cycle simple latches inside the router links. Our STT-MRAM has aggressively reduced retention time, resulting in a significant reduction in latency and power overheads of write operations. We observe flit losses in our STT-MRAM buffer, and propose cost-efficient dynamic buffer refresh schemes to minimize unnecessary refreshes with minimum hardware overheads. Simulation results show that our STT-MRAM NoC router enhances the throughput by 21.6% and achieves 61% savings in dynamic power and 18% savings in total router power, respectively compared to a conventional SRAM based NoC router of same area.
39

An economic feasibility analysis of woodchip production on the Island of Hawaii for export to Japan

Khamoui, Thao, 1948 January 1981 (has links)
Thesis (Ph. D.)--University of Hawaii at Manoa, 1981. / Bibliography: leaves 181-189. / Microfiche. / xv, 189 leaves, bound ill., maps 28 cm
40

Energiutredning på Chips AB, Åland / Energy Analysis at Chips AB, Åland

Renström, Thom, Sundbäck, Henrik January 2013 (has links)
En energikartläggning har gjorts hos Chips AB för att undersöka hur energin fördelas över de olika produktionslinjerna. Energianvändningen från processer som är gemensamma för alla produktionslinjer har också undersökts. Energianvändningen för dessa har fördelats över pro- duktionslinjerna eftersom produkterna även ska bära upp dessa energikostnader. Där det vi- sade sig att chipslinjen använder överlägset mest energi under ett år, 13 200 MWh, men den linjen körs mest också. Näst störst energianvändning hade moslinjen som bara låg på 6 600 MWh. När energianvändningen beräknades per producerat kilogram visade det sig att det var moslinjen som använder mest energi, 2,75 kWh/kg. Från energianvändningen beräknades kostnad och koldioxidutsläpp, både totalt och per pro- ducerat kilogram. Här visade det sig att moslinjen även har högst koldioxidutsläpp och högst kostnad per producerat kilogram. Chipslinjen har näst högst koldioxidutsläpp per producerat kilogram, men det är de friterade produkterna från PF2-linjen som har näst högst kostnad per producerat kilogram. Det beror på att det är olja som används till fritösen i PF2-linjen. Flera åtgärdsförslag för att minska energianvändningen har tagits fram. Det var två skorstenar som hade mycket överskottsvärme som kan användas, chipsfritösen och PF1-fritösen. De bästa förslagen skulle vara att använda denna överskottsvärme till uppvärmning av lokaler och tappvarmvatten samt uppvärmning av blanchörvatten. Tillsammans skulle detta i bästa fall kunna ge en årsbesparing på ungefär 516 000 € och ändå ha en återbetalningstid under ett år. Andra åtgärdsförslag som också undersöktes var förvärmning av luften till chipspannan, absorptionskyla och elproduktion, men dessa förslag hade mindre besparingspotential och längre återbetalningstid än det första förslagen. / An energy analysis has been made at Chips AB to investigate how the energy is distributed over the various production lines. Energy from processes common to all production lines have also been investigated. Energy use for these have been distributed over the production lines since the products also should carry these energy costs. There, it is shown that the potato chips line is using by far the most energy in a year, 13,200 MWh, but it is the line that runs the most too. The potato mash line had the second largest energy use, at 6,600 MWh. But when the energy usage was calculated per kilogram produced, it turned out that it was the potato mash line that use the most energy, 2.75 kWh/kg. From the total energy use the cost and carbon emissions were calculated, both in total and per produced kilogram. Here it showed that the potato mash line also has the highest emissions of carbon dioxide and the highest energy cost per kilogram produced. It is also the potato chips line that has the second highest emissions of carbon dioxide per kilogram produced, but it is the fried products from the PF2 line that has the second highest energy cost per kilogram pro- duced. This is because the fryer in the PF2 line uses oil to heat up the frying oil. Several proposed measures to reduce energy use have been developed. Three of the chimneys that were measured at Chips AB had a lot of excess heat that can be used, it was the potato chips fryer, the PF1 boiler and the PF1 fryer. The best proposed measures is to use the excess heat for space heating and domestic hot water and to heat the blanching water. Together, these measures could at best be able to provide an annual saving of approximately € 516,000, and still have a payback period of less than a year. Other proposed measures that also were inves- tigated were preheating of the air to the potato chips boiler, absorption cooling and power generation, but these proposals had less savings and longer payback periods than the first pro- posals.

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