231 |
An Improved Algorithm for the Nearly Equitable Edge-Coloring ProblemHIRATA, Tomio, NAKANO, Shin-ichi, ONO, Takao, XIE, Xuzhen 01 May 2004 (has links)
No description available.
|
232 |
Modeling and Evaluating Lead-frame CSPs for Radio-Frequency Integrated Circuit ApplicationsHuang, Hui-Hsiang 30 June 2001 (has links)
^¤åºKn¡G
In this thesis, a two-step de-embedded techniques was applied to measure the important parameters, ft and fmax , of the heterojunction bipolar transistors(HBTs).
The same technique was also used to measure the wide-band S parameters for modeling and evaluating the bump chip carrier(BCC) packages. In the simulation, the Ansoft HFSS simulator was used to calculate the insertion and return losses for some bare and packaged test chips. Comparison between simulated and measured results has been discussed in detail to illustrate the applicability of the HFSS simulator.
|
233 |
Fast Handoff for the Virtual Circuit Service in Mobile NetworksYang, Shun-Hsing 28 June 2002 (has links)
How to reduce handoff drop and increase seamless handoff is a very important issue of Quality-of-Service (QoS) in cellular. Although the Cellular IP which separates local and wide area mobility can significantly improves the performance of existing mobile host protocols (e.g. Mobile IP), especially when mobile hosts migrate frequently, it does not have the ability to support QoS control and needs to emit beacon periodically. Hence, we propose schemes of the admission control, the bandwidth reservation for handoffs, the retransmitting data and the estimated quantity for the useful Request Message to improve the control function of QoS in the Cellular IP. Also we propose another paging way in the Cellular IP, which is, the fast find path algorithm and optimal cross point node. The admission control can limit the quantity of connection in whole networks. The bandwidth reservation particularly used for handoff can reduce the rate of handoff drops. The estimated quantity for the useful "Request Message" ignores the overload with a large number of request messages. The fast find path algorithm and optimal cross point node only apply in the first find eligible routing path. It can reduce the paging time of mobile host and let the mobile host attach fast.
|
234 |
A Research on the feasibility for Cable TV system entering into Leased-Circuit service providersHuang, Chieng-Chuan 30 July 2002 (has links)
ABSTRACT
Traditionally, voice, data, and graphics have to be transmitted via different media/channels, resulting in the separate developments of various industries such as telecommunication, cable TV, etc. in the past years. Nowadays, with the help from advance technology, the boundaries of those industries have gradually become vague which brings in the possible competition among those individual industries. In addition, the new developments also provide increasing chances for consolidation as well as a new trend for cross-boundary co-operations among those traditional industries.
Since the pass of ¡§ Law of Cable TV ¡¨ in July 1993, five big conglomerates groups are gradually formed in Taiwan¡¦s Telecom Sector after a series of competition and integration. Started in 1997, The Ministry of Transportation and Communication completed the liberalization of Taiwan¡¦s telecommunication market after publishing the regulations governing the fixed-network communication business in 1999 and established the fundamental law regulation for cross-business between fixed network and telecommunication sectors.
Despite regulations has provided the legitimate base for a new age for telecom industry, the most crucial and timely thing for the cable TV system operators is how to run the business in the new telecom industry in order to break-through the existing limitations for cable TV business which includes construction of infrastructure, money raising, human resources management, etc. Since the open up of Taiwan¡¦s fixed network market, ¡§Last-mile network construction¡¨ is a common issue faced by new fixed-line network providers when they compete with Chunghwa Telecom Co. Ltd for its fully integrated connection with end users. Nevertheless, ¡§The Last Mile¡¨ issue could be mitigated for cable TV system operators given that on 1) they are closer to users in regional operations; 2) they have partially completed a dual-direction cable service system; and 3) they have the right to construct drainage system for lay out cable line . With these three advantages, the local cable operators could form business alliance with new fixed-line network firms to provide solutions to ¡§the last mile¡¨ issue.
In this thesis, the author We chooses the local cable operators in Kaoshiung City as examples and has interviewed four companies in order to have an understanding of their synergy and difficulties incountered by those cable operators when entering into the new telecom industry and forming business alliance with new fixed-line network firms. By the end, the author provides three suggestions including 1) to speed up their construction for dual-direction cable service system, 2) to consolidate ¡§ independent local cable systems¡¨, and 3) to form strategic alliances with fixed-line network firms.
The alliance between cable operators and fixed-line network firms will not only motivate cable operators to build up dual-direction cable service system but also to enhance their experience and train talented staff in telecom sector through the help from fixed-line network firms. In addition, it will also provide an easy access for fund raising to support their business expansions. As a result, we expect a more and more thorough national network system to bring in good benefits to the whole country.
|
235 |
Wavelet based analysis of circuit breaker operationRen, Zhifang Jennifer 30 September 2004 (has links)
Circuit breaker is an important interrupting device in power system network. It usually has a lifetime about 20 to 40 years. During breaker's service time, maintenance and inspection are imperative duties to achieve its reliable operation. To automate the diagnostic practice for circuit breaker operation and reduce the utility company's workload, Wavelet based analysis software of circuit breaker operation is developed here. Combined with circuit breaker monitoring system, the analysis software processes the original circuit breaker information, speeds up the analysis time and provides stable and consistent evaluation for the circuit breaker operation.
|
236 |
Design and Analysis of a Tubular Linear Generator with Halbach Array Shaped Permanent Magnet MoverYan, Sheng-jhan 11 September 2007 (has links)
The objective of this thesis is to establish an electromagnetic energy conversion mechanism that is suitable for electric power generation from solar thermal energy. Based on the generator design and thorough electromagnetic path design, a tubular linear generator system design will be proposed. The stator armature with three-phase concentrated windings mounted on a slotless structure is targeted to be implemented for this structure of the generator design, and a special designed of two-segmental Halbach permanent magnet array will be installed on the mover to fulfill the desired tubular linear generator construction. From detailed magnetic equivalent circuit (MEC) analysis and three-dimensional finite element analyses, the feasibility and applicability of the proposed machine system concepts will be verified. Finally, the steady-state operational characteristic of this generator have been estimated cinfirm the design objectives.
|
237 |
A Simple On-Chip Automatic Tuning Circuit for Continuous-Time FilterChang, I-fan 18 January 2008 (has links)
In this thesis, a simple on-chip automatic frequency tuning circuit is presented. The tuning circuit is improved from voltage-controlled filter (VCF) frequency tuning circuit. We use a single time constant (STC) circuit to substitute the voltage-controlled filter.
The STC circuit can produce a controllable delay time clock. The tuning circuit uses the constant delay time to tune the frequency of the filter. The design of a STC circuit is easy. Because the circuit is simple, the tuning circuit has less chip area and less power consumption.
The circuit has been fabricated with 0.35£gm CMOS technology. It operates with supply voltages ¡Ó1.5 V. The filter operates at a 3-dB frequency of 10MHz. In simulation, the frequency tuning circuit has a 3-dB frequency tuning error of less than 12% and the power consumption less than 9.05mW over a range of supply voltages (¡Ó10%), operating temperatures (-20¢J to 70¢J) and five models of SPICE model.
|
238 |
Improvement in the Bandwidth performance of VDSL2 SplitterLin, Tzu-Hua 22 January 2008 (has links)
The currently used DSL splitters or filters are designed for ADSL band up to 1104 KHz and ADSL2+ band up to 2208 KHz. To meet faster internet access, DSL technology has evolved from ADSL into VDSL2 with an operating band up to 30 MHz. However, the splitters in VDSL2 band have some design difficulties in longitudinal conversion loss and isolation. The main purpose of this thesis is to find some solutions to overcome these design difficulties for splitters operating in VDSL2 band. The proposed solutions include the use of common-mode choke and compensation circuit. The final testing results of the splitters can validate the proposed solutions.
|
239 |
Effect of Rhei Rhizoma Extract on Short-circuit Current and Ion Permeability Across the Frog Skin EpitheliumLin, Zhe-Wei 21 August 2009 (has links)
Rhei Rhizoma, also named as rhubarb or Da Huang, has been used widely in oriental traditional medicine in treating constipation and edema. However, though much affection has been paid to the make of components on pharmaceutical mechanisms, few studies have been conducted to reveal chemical and physical mechanism of these effects. Studies have shown that diarrhea causes imbalance of chloride and sodium ion movements via epithelium, we wondered if similar mechanism may apply to Rhei Rhizoma, a herbal drug which has been used to treat constipation in oriental medicine for thousands of years. The measurement of short-circuit current (Isc) has been used widely to estimate the ion transportation between mucosal and serosal side of epithelium. In this study, we used Ussing chamber technique to examine the alternation in membrane potential and short-circuit currents.
The result shows, at default, the Isc of frog skin we used was at 59.23¡Ó5.58£gA/cm², and the conductance was at 1.11¡Ó0.50£gA/cm²¡EmV. The lnjection of 1ml RRE to mucosal side of the frog skin leaded to a 90% elevation of the Isc. Followed by the application of Amiloride (sodium channel inhibitor) and Chlorothiazide (chloride channel inhibitor) to mucosal side of the epithelial skin, the observed Isc were then reduced 136% and 33% respectively. If RRE were applied after the adding of Amiloride or Chlorothiazide to the frog skin, then the Isc of the skin elevated only 24% and 70% respectively.
These results show that Rhei Rhizoma Extract (RRE) significantly increases Isc upon application to the mucosal side of the skin epithelium. Amiloride and Chlorothiazide will both inhibit the Isc induced by RRE, indicating activation of chloride channel and Amiloride-sensitive sodium channel of the epithelial tissue by RRE. After the regular Ringer solution used in the preparation was replaced by Na-free and Cl-free Ringer solution, the inhibition of Isc by RRE application could still be observed although the inhibition was trivia. These results indicate that RRE acts dominantly on mucosa side of the epithelium and can be used to enhance sodium transport and to stimulate the secretion of Cl- in the epithelium.
|
240 |
Power and Error Reduction Techniques of Multipliers for Multimedia ApplicationsWang, Jiun-ping 03 February 2010 (has links)
Recently, multimedia applications are used widely in many embedded and portable systems, such as mobile phones, MP3 player and PDA, which require lower power consumption within high performance constraints. Therefore, power-efficient design becomes a more important objective in Very Large Scale Integration (VLSI) designs. Moreover, the multiplication unit always lies on the critical path and ultimately determines the performance and power consumption of arithmetic computing systems. To achieve high-performance and lengthen the battery lifetime, it is crucial to develop a multiplier with high-speed and low power consumption.
In multimedia and digital signal processing (DSP) applications, many low-power approaches have been presented to lessen the power consumption of multipliers by eliminating spurious computations. Moreover, the multiplication operations adopted in these systems usually allow accuracy loss to output data so as to achieve more power savings. Based on these conceptions, this dissertation considers input data characteristics and the arithmetic features of multiplications in various multimedia and DSP applications and presents novel power reduction and truncation techniques to design power-efficient multipliers and high-accuracy fixed-width multipliers.
In the design of array and tree multipliers, we first propose a low power pipelined truncated multiplier which dynamically deactivates non-effective circuitry based on input range. Moreover, the proposed multiplier offers a flexible tradeoff between power reduction and product precision. This reconfigurable characteristic is very useful to systems which have different requirement on output precision. Second, a low-power configurable Booth multiplier that supports several multiplication modes and eliminates the redundant computations of sign bits in multipliers as much as possible is developed. This architecture can efficaciously decrease the power consumption of systems which demand computing performance and flexibility simultaneously. Although these two kinds of low power multipliers can achieve significant power savings, the hardware complexity of error compensation circuits and error performance in terms of the mean error and mean-square error are unsuitable for many multimedia systems composed of a large amount of multiply-accumulate operations. To efficiently improve the accuracy with less hardware complexity, we propose new error compensation circuits for fixed-width tree multipliers and fixed-width modified Booth multipliers.
In the design of floating-point multipliers, we propose a low power variable-latency floating-point multiplier which is compliant with IEEE 754-1985 and suitable for 3-D graphics and multimedia applications. In the architecture, the significand multiplier is first partitioned into the upper and lower parts. Next, an efficient prediction scheme for the carry bit, sticky bit, and the upper part of significand product is developed. While the correct prediction occurs, the computation of lower part of significand multiplier is shut down and therefore the floating-point multiplication can consume less power and be completed early.
In the design of modular multipliers, we propose an efficient modular multiplication algorithm to devise a high performance and low power modular multiplier. The proposed algorithm adopts the quotient pipelining and superfluous-operation elimination technique to discard the data dependency and redundant computational cycles of radix-2 Montgomery¡¦s multiplication algorithm so that the operation speed, power dissipation, and energy consumption of modular multipliers can be significantly improved.
|
Page generated in 0.0449 seconds