ASICs estruturados com leiautes regulares representam uma das soluções para a perda de rendimento de fabricação de circuitos integrados em tecnologias nanométricas causada pela distorção de fotolitografia. Um método de projeto de circuitos integrados ainda mais restritivo resulta em ASICs estruturados configuráveis apenas pelas camadas de vias, que são compostos pela repetição do mesmo modelo de bloco em todas as camadas do leiaute, exceto as camadas de vias. A escolha do modelo de bloco tem grande influência nas características do circuito final, criando a demanda por novas ferramentas de CAD que possam avaliar e comparar tais modelos em seus diversos aspectos. Esta tese descreve um ambiente de CAD baseado em SAT, capaz de avaliar o aspecto de capacidade lógica em padrões de blocos configuráveis por vias. O ambiente proposto é genérico, podendo tratar quaisquer padrões de bloco definido pelo usuário, e se comporta de maneira eficiente quando aplicado aos principais padrões já publicados na literatura. / Structured ASICs with regular layouts comprise a design-based solution for IC manufacturing yield loss in nanometer technologies caused by photolithography distortions. Via-configurable structured ASICs is even a more restrictive digital IC design method, based on the repetition of a block template comprising all layout layers except the vias one. The choice of such a design strategy impacts greatly the final circuit characteristics, arising the need for specific CAD tools to allow template evaluation and comparison in different aspects. This work presents a SAT-based CAD environment for evaluating the logical capacity aspect of via-configurable block templates. The proposed environment is able to support any user-defined template, and behaves efficiently when applied to block templates presented in related literature.

Following a well-documented rise in the popularity of concrete shell application in the 20th century, thin concrete shells have experienced a global decline despite their potential as efficient structures with an economy of material use with aesthetics benefits. This phenomenon is subject to geographically determined socio-economic conditions and competition from other building solutions as a result of technological advancement in alternative construction systems. Importantly, their decline was attributed to limitations inherent to concrete shell formwork and construction methods. Being able to produce efficient shaping did not ensure that this method of construction is most cost efficient as it still remains difficult to construct double curved surfaces. The thesis addresses the limitations associated with past and present concrete shell building by proposing the use of actively-bent gridshells as re-configurable and reusable formwork for concrete shells to be designed and built. The hypothesis uses deployable scissor-jointed actively-bent gridshells as re-configurable and reusable formwork for concrete shell construction. This was developed from a series of Flash research (Benjamin, 2012) as student construction workshops to investigate the design and creation of actively-bent gridshells held between December 2008 and March 2011 in Sheffield. In this study, to understand this new system, scaled models of actively-bent gridshells were used as preliminary design aid. Deployed into three dimensional forms from a flexible flat grid mat, the structures were rigidized by bracing through triangulation restraints. The temporary rigid structure was subsequently enveloped with fabric onto which concrete was applied to create the concrete shell, thus acting as formwork. This formwork was then removed following the curing of the concrete cast to be reused repeatedly, or reconfigured into another concrete shell form. Hence, the thesis draws on the concepts, principles and ideas pertaining to three key architectural technologies: 1. concrete shell, 2. actively-bent gridshells and 3.fabric formwork. The thesis then presents a series of four prototype concrete shells constructed from different materials spanning between 1.3 meters and 2.45 meters in the workshops at the University of Edinburgh built between August 2014 and September 2015. For each experimental construction, the process of gridshell construction, fabric formwork preparation, concrete casting, gridshell formwork decentring and different design elements of openings, edges and anchorage abutments were analysed and discussed under the themes of construction, architectural tectonics and structure. The tectonic of process and material is understood and discussed based on the idea of stereogeneity (Manelius, 2012). Specifically, the relationship between gridshell as formwork and the concreting process was studied, analysed and assimilated in concrete shells built with progressive sophistication and elegance, culminating in a doubly-curved concrete shell that demonstrated both synclastic and anticlastic geometries, with further abutment simplification, edge leaning and physical openings incorporation. The study concludes with a physical concrete shell model formed by applying concrete onto fabric formwork to cover the Weald and Downland Jerwood gridshell. In the 1:20 scaled model, the proposed method is speculatively applied onto fabric stretched between pre-determined curvatures of the as-built gridshell. This formwork was subsequently removed for reuse, re-deployed and reconfigured. Using finite element analysis, the structural behaviour of the gridshell made of glass-fibre reinforced tubes and structural characteristics of the resultant concrete shell was checked. The interaction between the three technologies are discussed architectonically and structurally to inform guidelines for potential life-scale application. The thesis evidences the feasibility of the proposed system. It re-purposes a scaled model of a deployable gridshell as a physical modelling tool to facilitate concrete shell design, for both pure compression shells and "improper" shells, demonstrating its adaptability. It also promotes and reinvigorates concrete shells as possible architectural systems serving to instigate future research to revive concrete shell construction as an intelligent and intuitive way of creating structures with material economy, structural efficiency and visual elegance.

The objective of the research was to design and test an SRAM system which can meet the performance criteria for Memory Based Computing (MBC). This form of computing consists of a Look-Up Table (LUT) which is basically memory array mapped with a function; the computations thereafter consist of essentially read operations. An MBC framework requires very fast and low power read operations. Moreover, the cells need to be read stable as major part of the computation is done by reading the LUTs mapped in the SRAM array. Design and measurement of a prototype MBC test-chip with SRAM system optimized for read-heavy applications is presented in this thesis. For this purpose, a prototype MBC system was designed and taped out. Essential study of the write-ability of the core LUT is also presented. The core memory array for function table mapping was characterized for leakage, write-ability and power saving associated with pulsed read mode.

Ces dernières années, les évolutions de linformatique et des télécommunications ont conduit à une modification drastique du paysage de la communication informatique, et en conséquence de lInternet et de ses services : les applications sont désormais à la fois multimédias, multi utilisateurs et coopératives ; les technologies réseaux offrent à présent de hauts débits de transmission, à échelle locale ou grande distance, et permettent de se connecter à lInternet via différents types de terminaux et de points daccès, filaires ou sans fil. En dépit de ces avancées, les services de communication offerts par lInternet sont encore très insuffisants, en ceci quils noffrent aucune garantie sur les performances offertes, notamment en termes de délai de bout en bout. Cest dans cette problématique que sinscrivent nos travaux, qui adressent le besoin de nouveaux services, protocoles et architectures de communication pour lInternet, dans le but doffrir des garanties de Qualité de Service (QdS). Notre démarche part dune expression formelle des besoins applicatifs et aboutit à des solutions de bout en bout visant à : (1) intégrer les niveaux considérés (Application, Transport et IP) ; (2) minimiser lutilisation des ressources (bande passante, buffer, &) ; et (3) abstraire le niveau applicatif de la complexité du choix et du paramétrage des services sous-jacents. Trois thèmes de recherche sont explorés : (1) les services et protocoles de Transport multimédia pour optimiser la QdS dans un contexte IP de type Best Effort ; (2) les architectures de bout en bout pour garantir la QdS, en coordonnant les nouveaux services de lInternet aux niveaux Transport et IP (IntServ et DiffServ mono puis multi domaines) ; et (3) la signalisation pour la QdS, dans un contexte IP de type DiffServ multi domaines. Notre prospective concerne dune part la signalisation pour la QdS en considérant à présent lhétérogénéité de lInternet multi domaines, et dautre part, les protocoles de Transp ort auto configurables et les architectures dynamiques, pour optimiser la qualité des communications et des coopérations dans les futurs réseaux ambiants (réseaux mobiles et ad hoc, capteurs, &) en tenant compte dune dynamicité du contexte à la fois au niveau utilisateur, mobile et coopérant, et au niveau du réseau, mobile et aux ressources variables. null null

The Internet of Things (IoTs) has triggered rapid advances in sensors, surveillance devices, wearables and body area networks with advanced Human-Computer Interfaces (HCI). Neural Networks optimized algorithmically for high accuracy and high representation power are very deep and require tremendous storage and processing capabilities leading to higher area and power costs. For developing smart front-ends for ‘always on’ sensor nodes we need to optimize for power and area. This requires considering trade-offs with respect to various entities such as resource utilization, processing time, area, power, accuracy etc. Our experimental results show that there is presence of a network configuration with minimum energy given the input constraints of an application in consideration. This presents the need for a hardware-software co-design approach. We present a highly parameterized hardware design on an FPGA allowing re-configurability and the ability to evaluate different design choices in a short amount of time. We also describe the capability of extending our design to offer run time configurability. This allows the design to be altered for different applications based on need and also allows the design to be used as a cascaded classifier beneficial for continuous sensing for low power applications. This thesis aims to evaluate the use of Restricted Boltzmann Machines for building such re-configurable low power front ends. We develop the hardware architecture for such a system and provide experimental results obtained for the case study of Posture detection for body worn cameras used for law enforcement.

The BlackPearl in the Computer Engineering Department is an Automotive Demonstrator, which has a variety of sensors, and users can control these via the server. The server is responsible for the remote interaction, the Smart Queue, and the Raspberry Pi display for human interaction. The Automotive Demonstrator consists of four components, which are installed on the CE-Box: Main QML Application, Main Server, Live Stream, and Smart Queue. All of these servers are running on three single-board computers (Raspberry Pi 3B): Main, BlackPearl, and Camera servers. The Automotive Demonstrator is built with the latest version from both Qt and NodeJS, and the components can access, store and exchange the data in JSON format. The BlackPearl will be controlled via four types of interaction methods: Web server, Voice commands (Sparrow), Pi Display, and Gamepad. The outcome of this thesis is a configurable and adaptive User Interface for Automotive Demonstrator, and this can be easily updated, customized, and accessible for new applications without the need to update or rebuild the program.

ASICs estruturados com leiautes regulares representam uma das soluções para a perda de rendimento de fabricação de circuitos integrados em tecnologias nanométricas causada pela distorção de fotolitografia. Um método de projeto de circuitos integrados ainda mais restritivo resulta em ASICs estruturados configuráveis apenas pelas camadas de vias, que são compostos pela repetição do mesmo modelo de bloco em todas as camadas do leiaute, exceto as camadas de vias. A escolha do modelo de bloco tem grande influência nas características do circuito final, criando a demanda por novas ferramentas de CAD que possam avaliar e comparar tais modelos em seus diversos aspectos. Esta tese descreve um ambiente de CAD baseado em SAT, capaz de avaliar o aspecto de capacidade lógica em padrões de blocos configuráveis por vias. O ambiente proposto é genérico, podendo tratar quaisquer padrões de bloco definido pelo usuário, e se comporta de maneira eficiente quando aplicado aos principais padrões já publicados na literatura. / Structured ASICs with regular layouts comprise a design-based solution for IC manufacturing yield loss in nanometer technologies caused by photolithography distortions. Via-configurable structured ASICs is even a more restrictive digital IC design method, based on the repetition of a block template comprising all layout layers except the vias one. The choice of such a design strategy impacts greatly the final circuit characteristics, arising the need for specific CAD tools to allow template evaluation and comparison in different aspects. This work presents a SAT-based CAD environment for evaluating the logical capacity aspect of via-configurable block templates. The proposed environment is able to support any user-defined template, and behaves efficiently when applied to block templates presented in related literature.

ASICs estruturados com leiautes regulares representam uma das soluções para a perda de rendimento de fabricação de circuitos integrados em tecnologias nanométricas causada pela distorção de fotolitografia. Um método de projeto de circuitos integrados ainda mais restritivo resulta em ASICs estruturados configuráveis apenas pelas camadas de vias, que são compostos pela repetição do mesmo modelo de bloco em todas as camadas do leiaute, exceto as camadas de vias. A escolha do modelo de bloco tem grande influência nas características do circuito final, criando a demanda por novas ferramentas de CAD que possam avaliar e comparar tais modelos em seus diversos aspectos. Esta tese descreve um ambiente de CAD baseado em SAT, capaz de avaliar o aspecto de capacidade lógica em padrões de blocos configuráveis por vias. O ambiente proposto é genérico, podendo tratar quaisquer padrões de bloco definido pelo usuário, e se comporta de maneira eficiente quando aplicado aos principais padrões já publicados na literatura. / Structured ASICs with regular layouts comprise a design-based solution for IC manufacturing yield loss in nanometer technologies caused by photolithography distortions. Via-configurable structured ASICs is even a more restrictive digital IC design method, based on the repetition of a block template comprising all layout layers except the vias one. The choice of such a design strategy impacts greatly the final circuit characteristics, arising the need for specific CAD tools to allow template evaluation and comparison in different aspects. This work presents a SAT-based CAD environment for evaluating the logical capacity aspect of via-configurable block templates. The proposed environment is able to support any user-defined template, and behaves efficiently when applied to block templates presented in related literature.

The topic of the master thesis is focused on the design of information system which is designed on the base of the analysis of existing information systems available in the Czech Republic. This analysis is focused on finding uncovered areas. Evaluation of information systems is based on a multicriterial selection analysis, which can specify a minimally covered area. The aim of the master thesis is to show undiscovered possibilities of information systems maintaining the various types of information. The first part is focused to characteristics of information systems, its kinds and types. This part is focused to architecture and to methods of information systems design, too. The second part is focused on analysis of the existing information systems. The aim is to identify areas that are not sufficiently covered. The third part is focused on design of an information system based on the analysis of uncovered areas in the first part. In the last section is documentation of created an information system.

5G is expected to provide a high-performance and highly efficient network to prominent industry verticals with ubiquitous access to a wide range of services with orders of magnitude of improvement over 4G. Network slicing, which allocates network resources according to users’ specific requirements, is a key feature to fulfil the diversity of requirements in 5G network. However, network slicing also brings more orchestration and difficulty in monitoring and admission control. Although the problem of admission control has been extensively studied, those research take measurements for granted. Fixed high monitoring frequency can waste system resources, while low monitoring frequency (low level of observability) can lead to insufficient information for good admission control decisions. To achieve efficient admission control in 5G, we consider the impact of configurable observability, i.e. control observed information by configuring measurement frequency, is worth investigating. Generally, we believe more measurements provide more information about the monitored system, thus enabling a capable decision-maker to have better decisions. However, more measurements also bring more monitoring overhead. To study the problem of configurable observability, we can dynamically decide what measurements to monitor and their frequencies to achieve efficient admission control. In the problem of admission control with configurable observability, the objective is to minimize monitoring overhead while maintaining enough information to make proper admission control decisions. In this thesis, we propose using the Deep Reinforcement Learning (DRL) method to achieve efficient admission control in a simulated 5G end-to-end network, including core network, radio access network and four dynamic UEs. The proposed method is evaluated by comparing with baseline methods using different performance metrics, and then the results are discussed. With experiments, the proposed method demonstrates the ability to learn from interaction with the simulated environment and have good performance in admission control and used low measurement frequencies. After 11000 steps of learning, the proposed DRL agents generally achieve better performance than the threshold-based baseline agent, which takes admission decisions based on combined threshold conditions on RTT and throughput. Furthermore, the DRL agents that take non-zero measurement costs into consideration uses much lower measurement frequencies than DRL agents that take measurement costs as zero. / 5G förväntas ge ett högpresterande och högeffektivt nätverk till framstående industrivertikaler genom allmän tillgång till ett brett utbud av tjänster, med förbättringar i storleksordningar jämfört med 4G. Network slicing, som allokerar nätverksresurser enligt specifika användarkrav, är en nyckelfunktion för att uppfylla mångfalden av krav i 5G-nätverk. Network slicing kräver däremot också mer orkestrering och medför svårigheter med övervakning och tillträdeskontroll. Även om problemet med tillträdeskontroll har studerats ingående, tar de studierna mätfrekvenser för givet. Detta trots att hög övervakningsfrekvens kan slösa systemresurser, medan låg övervakningsfrekvens (låg nivå av observerbarhet) kan leda till otillräcklig information för att ta bra beslut om antagningskontroll. För att uppnå effektiv tillträdeskontroll i 5G anser vi att effekten av konfigurerbar observerbarhet, det vill säga att kontrollera observerad information genom att konfigurera mätfrekvens, är värt att undersöka. Generellt tror vi att fler mätningar ger mer information om det övervakade systemet, vilket gör det möjligt för en kompetent beslutsfattare att fatta bättre beslut. Men fler mätningar ger också högre övervakningskostnader. För att studera problemet med konfigurerbar observerbarhet kan vi dynamiskt bestämma vilka mätningar som ska övervakas och deras frekvenser för att uppnå effektiv tillträdeskontroll. I problemet med tillträdeskontroll med konfigurerbar observerbarhet är målet att minimera övervakningskostnader samtidigt som tillräckligt med information bibehålls för att fatta korrekta beslut om tillträdeskontroll. I denna avhandling föreslår vi att använda Deep Reinforcement Learning (DRL)-metoden för att uppnå effektiv tillträdeskontroll i ett simulerat 5G-änd-till-änd-nätverk, inklusive kärnnät, radioaccessnätverk och fyra dynamiska användarenheter. Den föreslagna metoden utvärderas genom att jämföra med standardmetoder som använder olika prestationsmått, varpå resultaten diskuteras. I experiment visar den föreslagna metoden förmågan att lära av interaktion med den simulerade miljön och ha god prestanda i tillträdeskontroll och använda låga mätfrekvenser. Efter 11 000 inlärningssteg uppnår de föreslagna DRL-agenterna i allmänhet bättre prestanda än den tröskelbaserade standardagenten, som fattar tillträdesbeslut baserat på kombinerade tröskelvillkor för RTT och throughput. Dessutom använder de DRL-agenter som tar hänsyn till nollskilda mätkostnader, mycket lägre mätfrekvenser än DRL-agenter som tar mätkostnaderna som noll.