International Telemetering Conference Proceedings / October 21, 2002 / Town & Country Hotel and Conference Center, San Diego, California / The Central Control Facility at Eglin Air Force Base has acquired full intellectual rights to a single board telemetry card with device driver and test software. This card has an integrated IRIG 106 PCM decommutator, IRIG time clock and minimal PCM simulator capability using the latest in Field Programmable Gate Array technology. Eglin will offer this capability to the telemetry community as both open source hardware and software and solicit partnerships with both government and private industry for both open source and closed source for-profit products.

International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / Advancing technology continually generates larger quantities of data at increasingly high transfer rates which fuels the need for instrumentation to take up the challenge of efficiently managing the collection of data. This defines the driving force behind the desire for increased channel capacity of PCM data formatters. By incorporating state-of-the-art Digital Signal Processing (DSP) technology coupled with high-performance Field Programmable Gate Arrays (FPGA), Inter-Coastal Electronics has designed the IF-810, a PCM data formatter. The IF-810 allows eight channels of PCM data, one voice channel and an InterRange Instrumentation Group (IRIG)-B channel to be combined and formatted for recording onto the TEAC RX-800 series recorders using a Hi8 8mm video cassette as the recording media. During playback, the IF-810 clocks the PCM data out using a reconstructed version of the input clock. With this unique design, the PCM data and clock outputs are input directly to a decommutator which eliminates the need for costly bit-synchronizers. This paper discusses the integration of the DSP, FPGA and buffering techniques into a low-cost and efficient multi-channel PCM data formatter that accommodates high data rate inputs, all without the need of a bit-synchronizer for decommutation.

International Telemetering Conference Proceedings / October 30-November 02, 1995 / Riviera Hotel, Las Vegas, Nevada / The MARS-II digital recorder is one of the new technologies that will eventually replace the labor intensive and hardware dependent methods associated with traditional analog-based telemetry ground systems. The Standardized MARS-II Analysis and Reduction Tool (SMART) is one of the first software systems developed to take advantage of this new digital recording capability. It processes pulse code modulated (PCM) encoded data and MIL-STD-1553B message traffic, outputting time-tagged PCM frames or 1553 messages to file. The goal of this software is to provide a portable application that utilizes state-ofhe-art, general purpose hardware for rapid telemetry data processing to meet the needs of operational users, telemetry engineers, and data analysts. To satisfy these goals, the software was developed using the C language with VMS and OSF operating systems as the initially targeted platforms. In addition, an X Window System/Motif graphical user interface supporting three tiers of user interaction (operator, telemetry engineer, and telemetry analyst) was layered onto the decommutator functions.

International Telemetering Conference Proceedings / October 27-30, 1997 / Riviera Hotel and Convention Center, Las Vegas, Nevada / A target missile is a unique piece of test hardware. This test tool must be highly reliable, low cost and simple and must perform any task that the developing interceptor missile planners require. The target missile must have ample power and guidance resources to put the target in a specified place in the sky at a desired time. The telemetry and measurement system for the target missile must have the same requirements as its interceptor missile but must be flexible enough to accept new requirements as they are applied to the target and its interceptor. The United States Army has tasked Coleman Aerospace to design and build this type of target missile. This paper describes and analyzes the telemetry and instrumentation system that a Hera target missile carries. This system has been flying for the past two years, has completed seven out of seven successful test flights and has accomplished all test objectives to date. The telemetry and instrumentation system is an integral part of the missile self-test system. All preflight checks and flight simulations are made with the on-board three-link telemetry system through a radio frequency (RF) link directly through the missile antenna system to a ground station antenna. If an RF transmission path is not available due to test range restrictions, a fiber-optic cable links the pulse code modulator (PCM) encoder to the receiving ground stations which include the bitsync, decommutator and recorders. With this capability, alternative testing is not limited by RF test range availability. The ground stations include two mobile stations and a factory station for all testing including preflight testing of the missile system prior to flight test launches. These three ground stations are built in a single configuration with additional equipment in the mobile units for use at remote locations. The design, fabrication, testing and utilization of these ground stations are reviewed. The telemetry system is a modification of the classical PCM system and will operate with its interceptor missile at least into the first decade from the year 2000.

International Telemetering Conference Proceedings / October 25-28, 1999 / Riviera Hotel and Convention Center, Las Vegas, Nevada / L-3 Communications Telemetry & Instrumentation (L-3 T&I) has developed an advanced IBM PC-AT Telemetry, Tracking, and Commanding (TT&C) SATCOM system based on the utilization of Field Programmable Gate Array / Digital Signal Processing (FPGA/DSP) microprocessors. This system includes up-link, down-link, and range processing sections. Physically, the system consists of one IF Transceiver and two or more FPGA/DSP microprocessor boards called Advanced Processing Microprocessors (APMs). The form factor of these PWBs is compliant with full length, full height IBM PC PCI bus cards. This paper describes the features and functionality of an advanced Telemetry, Tracking, and Commanding Processing System (TT&CPS) based on the implementation of FPGA and DSP microprocessors. The high-level functional attributes of the TT&CPS are depicted in Figure 1. There are four main functional blocks: the IF Transceiver, the Down-Link Processing Section, the Up-Link Processing Section, and the Range Processor. The analog/IF circuitry in the IF Transceiver card interfaces between the 68–72 MHz (70 MHz, nominal) IF I/O signals and the Up-Link and Down-Link Processing Section's DSP equipment. The down-link portion of the IF Transceiver card has two user-selected input ports. From the selected input, the signal is processed through selectable bandwidth limiting, gain control, Doppler correction (optional), quadrature down-conversion to zero hertz (baseband), selectable baseband filtering, and precision Analog-to-Digital (A/D) conversion. The up-link portion of the IF Transceiver card takes I/Q digital data from the APM performing the up-link processing functions. This baseband I/Q digital data is Digital-to-Analog (D/A) converted, filtered, quadrature up-converted to 68–72 MHz, up-link Doppler corrected (optional), output level detected and level controlled, and sent to a two-position output selector switch. The down-link portion of the TT&CPS provides main carrier linear PM or BPSK or QPSK demodulation and can also, in composite linear PM demodulation mode, receive and demodulate FSK and/or BPSK subcarriers and ranging signals. The demodulators use symbol timing loops and bit decision circuits (matched filters) to perform the bit synchronization function. Several decoding algorithms, including differential, de-interleaving, Viterbi, and Reed-Solomon, are available for the down-link telemetry. Command format checking and CRC status is also available on FSK-demodulated data. Direct carrier BPSK/QPSK demodulation has decoding and frame synchronization capabilities. Because of the modular construction of the firmware and the use of FPGAs and DSPs, the system can be loaded with only the functions in use, lowering initial setup time while increasing overall system capability. To support a particular function, the card is downloaded with an “image,” which programs the FPGAs and DSPs at initialization. The user can change configurations by simply downloading a new set of instructions to the FPGA/DSP on the fly to keep the ground station running with minimal downtime. The flexibility of the design minimizes spare board costs, while achieving greater programmability at the end-user location.