This report details a physical modeling study to investigate the flow characteristics of circular corrugated structural plate (CSP) culverts with 10% embedment and projecting end inlets using a 0.62 m diameter corrugated metal pipe under a range of flows (0.064 m3/s to 0.254 m3/s) and slopes (0%, 0.5% and 1.0%). An automated sampling system was used to record detailed velocity measurements at cross-sections along the length of the model. The velocity data was then used to develop isovel plots and observations were made regarding the effect of water depth, average velocity, boundary roughness and inlet configuration on the velocity structure. Other key aspects examined include the distribution of shear velocity and equivalent sand roughness, Manning’s roughness, an evaluation of composite roughness calculation methods, secondary currents, area-velocity relationships, the effect of embedment on maximum discharge and a simulation of model results using HECRAS. Recommendations are presented to focus future research.

The International Technology Roadmap for Semiconductors projects that embedded memories will occupy increasing System-on-Chip area. The growing density of integration increases the likelihood of fabrication faults. The proposed memory repair strategy employs forward error correction at the system level and mitigates the impact of memory faults through permutation of high sensitivity regions. The effectiveness of the proposed repair technique is demonstrated on a 19.4-Mbit de-interleaver SRAM memory of an ISDB-T digital baseband OFDM receiver in 65-nm CMOS. The proposed technique introduces a single multiplexer delay overhead and a configurable area overhead of M/i bits, where M is the number of memory rows and i is an integer from 1 to M, inclusive. The proposed strategy achieves a measured 0.15 dB gain improvement at a 2e-4 Quasi-Error-Free (QEF) BER in the presence of memory faults for an AWGN channel.

The International Technology Roadmap for Semiconductors projects that embedded memories will occupy increasing System-on-Chip area. The growing density of integration increases the likelihood of fabrication faults. The proposed memory repair strategy employs forward error correction at the system level and mitigates the impact of memory faults through permutation of high sensitivity regions. The effectiveness of the proposed repair technique is demonstrated on a 19.4-Mbit de-interleaver SRAM memory of an ISDB-T digital baseband OFDM receiver in 65-nm CMOS. The proposed technique introduces a single multiplexer delay overhead and a configurable area overhead of M/i bits, where M is the number of memory rows and i is an integer from 1 to M, inclusive. The proposed strategy achieves a measured 0.15 dB gain improvement at a 2e-4 Quasi-Error-Free (QEF) BER in the presence of memory faults for an AWGN channel.

To make a camera more user friendly or let it operate without an user the camera objective needs to be able to put thecamera lens in focus. This functionality requires a motor of some sort, due to its many benefits the ultrasonic motor is apreferred choice. The motor requires a driving circuit to produce the appropriate signals and this is what this thesis is about.Themain difficulty that needs to be considered is the fact that the ultrasonic motor is highly non-linear.This paper will give a brief walk through of how the ultrasonic motor works,its pros and cons and how to control it. How thedriving circuit is designed and what role the various components fills. The regulator is implemented in C-code and runs on amicro processor while the actual signal generation is done on a CPLD. The report ends with a few suggestions of how toimprove the system should the presented solution not perform at a satisfactory level.

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This dissertation contributes to existing scholarship on contemporary multiculturalism. It does so by exploring how multicultural agendas are operationalised in Northern Ireland – a society divided along sectarian lines. As the political violence of the conflict has receded, Northern Ireland has witnessed unprecedented levels of in-migration. This dissertation seeks to understand how, as Northern Irish society is increasingly being conceived of as culturally diverse, emerging multicultural agendas interact with embedded sectarianism. The empirical research focuses on the political institutions and policies pertaining to Northern Ireland as a whole, and the specific activities and social practices of various ethnically-identified minorities, voluntary organisations and anti-racist movements in selected areas of Belfast. The research involved interviews with civil servants, policy makers, ethnically-identified minorities, voluntary groups and anti-racist activists. This dissertation argues that a government concern for managing cultural diversity can be understood as part of a process of ‘normalising’ Northern Ireland after the conflict. However, a persistent sectarianism complicates, and often impedes, the advancement of multicultural, and particularly anti-racist, agendas. This argument is developed through an exploration of policy and institutional structures, anti-racist campaigns and responses to racialised violence, as well as initiatives that seek to recognise and celebrate cultural diversity. This dissertation shows that the relationship between sectarianism and multiculturalism in post-Agreement Northern Ireland is not unidirectional. Instead, the two processes are deeply imbricated with each other: multicultural initiatives are shaped by sectarianism, and sectarianism persists in emergent multicultural imaginaries. This said, the dissertation suggests that multiculturalism is also capable of disrupting sectarian constructions of space and identity in Northern Ireland. Based on these findings, this dissertation argues that cultural diversity provides an opportunity to denaturalise the social structures and narratives which reproduce sectarianism. It is argued that this process could play an important role in advancing the construction of a socially cohesive and multicultural Northern Ireland.

This thesis describes a project to create a hardware based 3D interior scanner. This was based on a previous project that created a scanner optimised for interior conditions, using structured light triangulation. The original project referred to as the Mark-I scanner, performed its control and processing on a PC and the primary goal of this project was to re-implement this system using hardware, making the scanner more portable and simpler to use. The Mark-I system required a specialised camera which had an unusually high noise associated with it, so a secondary goal was to investigate whether this camera could be replaced with a superior model or this noise corrected. A Mark-II scanner system was created using FPGA processing and control implemented in the VHDL language. This read from a CMOS camera, controlled the system's motor and laser, generated 3D points and communicated with users. A suitable camera was not found and the Mark-I scanners camera was found to have been damaged and become unusable, so a simulation environment was constructed that simulated the operation of the scanner, created 3D images for it to process, and tested its results. Chapter 1 of this thesis outlines the goals of this pro ject and describes the Mark-I system. Chapter 2 describes the theory and properties of the Mark-I system, and chapter 3 describes the work undertaken to replace the scanner's sensor. Chapter 4 describes the system created to interface to CMOS sensors, and chapter 5 outlines the theory involved in calculating 3D points using structured light triangulation. The final hardware scanner, and the simulation system used to test it, are then described in chapter 6.

Reconfigurable and dynamic computer architecture is an exciting area of research that is rapidly expanding to meet the requirements of compute intense real and non-real time applications in key areas such as cryptography, signal/radar processing and other areas. To meet the demands of such applications, a parallel single-chip heterogeneous Hybrid Data/Command Architecture (HDCA) has been proposed. This single-chip multiprocessor architecture system is reconfigurable at three levels: application, node and processor level. It is currently being developed and experimentally verified via a three phase prototyping process. A first phase prototype with very limited functionality has been developed. This initial prototype was used as a base to make further enhancements to improve functionality and performance resulting in a second phase virtual prototype, which is the subject of this thesis. In the work reported here, major contributions are in further enhancing the functionality of the system by adding additional processors, by making the system reconfigurable at the node level, by enhancing the ability of the system to fork to more than two processes and by designing some more complex real/non-real time applications which make use of and can be used to test and evaluate enhanced and new functionality added to the architecture. A working proof of concept of the architecture is achieved by Hardware Description Language (HDL) based development and use of a Virtual Prototype of the architecture. The Virtual Prototype was used to evaluate the architecture functionality and performance in executing several newly developed example applications. Recommendations are made to further improve the system functionality.

This report details a physical modeling study to investigate the flow characteristics of circular corrugated structural plate (CSP) culverts with 10% embedment and projecting end inlets using a 0.62 m diameter corrugated metal pipe under a range of flows (0.064 m3/s to 0.254 m3/s) and slopes (0%, 0.5% and 1.0%). An automated sampling system was used to record detailed velocity measurements at cross-sections along the length of the model. The velocity data was then used to develop isovel plots and observations were made regarding the effect of water depth, average velocity, boundary roughness and inlet configuration on the velocity structure. Other key aspects examined include the distribution of shear velocity and equivalent sand roughness, Manning’s roughness, an evaluation of composite roughness calculation methods, secondary currents, area-velocity relationships, the effect of embedment on maximum discharge and a simulation of model results using HECRAS. Recommendations are presented to focus future research.

Agile methodologies have become a popular and widely accepted method for managing software development. Since the inception of the Agile Manifesto over ten years ago, agile development techniques have superseded waterfall methods in many, if not most, software development organizations. Despite its apparent success, many companies have struggled with the adoption and implementation of agile, and exactly what level of adoption provides optimum agility. Agility is commonly held in the literature to be constructed of elements external to a company or project but may in fact be composed of both external and internal elements. The exact relationship of the adoption of agile development techniques and their relationship to the actual agility of a business remain unclear. A primary contributor to this uncertainty is the somewhat amorphous definition of agile itself. In academic literature, the concept is still relatively young and loosely defined. In practice, organizations have largely opted for a hybrid approach to agile, mixing its concepts and methods with existing Stage Gate or waterfall methodologies. This has made the management of agile even more complex. Crucially, there is no definition or criterion available to determine the appropriate mix of agile and waterfall processes in an embedded software development context nor is there a method to determine the impact of one against the other. These issues beg the question: how do organizations manage agility? This interpretive case study provides an empirical account of how stakeholders manage both market and process agility in an embedded systems context via a hybrid agility implementation and product genesis. As a result, we provide the notion of agile vorticity, as the point at which market and process agility collide to produce business momentum at a specific point of innovation within the agile business vortex.