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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
451

On-Chip Memory Architecture Exploration Of Embedded System On Chip

Kumar, T S Rajesh 09 1900 (has links)
Today’s feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at low cost and lower energy consumption. SoCs are complex designs with multiple embedded processors, memory subsystems, and application specific peripherals. The memory architecture of embedded SoCs strongly influences the area, power and performance of the entire system. Further, the memory subsystem constitutes a major part (typically up to 70%) of the silicon area for the current day SoC. The on-chip memory organization of embedded processors varies widely from one SoC to another, depending on the application and market segment for which the SoC is deployed. There is a wide variety of choices available for the embedded designers, starting from simple on-chip SPRAM based architecture to more complex cache-SPRAM based hybrid architecture. The performance of a memory architecture also depends on how the data variables of the application are placed in the memory. There are multiple data layouts for each memory architecture that are efficient from a power and performance viewpoint. Further, the designer would be interested in multiple optimal design points to address various market segments. Hence a memory architecture exploration for an embedded system involves evaluating a large design space in the order of 100,000 of design points and each design points having several tens of thousands of data layouts. Due to its large impact on system performance parameters, the memory architecture is often hand-crafted by experienced designers exploring a very small subset of this design space. The vast memory design space prohibits any possibility for a manual analysis. In this work, we propose an automated framework for on-chip memory architecture exploration. Our proposed framework integrates memory architecture exploration and data layout to search the design space efficiently. While the memory exploration selects specific memory architectures, the data layout efficiently maps the given application on to the memory architecture under consideration and thus helps in evaluating the memory architecture. The proposed memory exploration framework works at both logical and physical memory architecture level. Our work addresses on-chip memory architecture for DSP processors that is organized as multiple memory banks, with each back can be a single/dual port banks and with non-uniform bank sizes. Further, our work also address memory architecture exploration for on-chip memory architectures that is SPRAM and cache based. Our proposed method is based on multi-objective Genetic Algorithm based and outputs several hundred Pareto-optimal design solutions that are interesting from a area, power and performance viewpoints within a few hours of running on a standard desktop configuration.
452

Enforcing Temporal Constraints in Embedded Control Systems

Sandström, Kristian January 2002 (has links)
No description available.
453

Architecting and Modeling Automotive Embedded Systems

Larses, Ola January 2005 (has links)
<p>Dealing properly with electronics and software will be a strong competitive advantage in the automotive sector in the near future. Electronics are driving current innovations and are at the same time becoming a larger part of the cost of the vehicle. In order to be successful as an automotive manufacturer, innovations must be introduced in the vehicle without compromising the final price tag. Also, the electronics has to compete with, and win over, the dependability of well known and proven mechanical solutions.</p><p>Structure related costs can be reduced by designing a modular system, volume related costs can be reduced by utilizing fewer electronic control units that shares software performing a variety of functions. To achieve a modular system careful consideration must be applied in the architecture design process. Architecting is commonly referred to as an art, performed in a qualitative manner. This thesis provides a quantitative method for architecture design and evaluation targeting modular architectures.</p><p>The architecture design method is based on a simple underlying information model. This model is extended through practical experiences in case studies to include support for configuration and documentation.</p><p>An information model is a key enabler for managing the increasing complexity of automotive embedded systems. The model provides the basis for establishing the analyzable documentation that is required to ensure the dependability of the systems, specifically in terms of need for reliability, maintainability and safety. An information model supports traceability both within the product, across components, and also between different organizational units using different views of the product throughout the lifecycle.</p><p>Further, some general issues of systems engineering and model based development related to the engineering of automotive embedded systems are discussed. Considerations for introducing a model based development process are covered. Also, the maturity of development processes and requirements on tools in an automotive context are evaluated. The ideas and methods presented in this thesis have been developed and tried in an industrial setting through a range of case studies.</p>
454

Determination of Thermal Properties Using Embedded Thermocouples

Lister, Nicholas Anthony 01 January 2010 (has links)
The Purpose of this thesis is to experimentally demonstrate an inversion analysis technique, developed by Dr. Jay Frankel (UTK), that utilizes transient temperature data from probes embedded at known locations in a material. This allows one to determine thermal properties (thermal diffusivity and thermal conductivity) of the material, surface temperature, and the surface heat flux as they change with time. Dr. Frankel’s inversion method can be used to determine surface temperature and heat flux of a one-dimensional semi-infinite slab based on the transient data from one or two embedded probes, if the thermal conductivity and thermal diffusivity of the material are known. Frankel’s theory suggests that the thermal properties of the material can be determined if transient data from two thermocouple (TC) probes at known locations and the heat flux at the surface are known. This thesis investigates finding the thermal properties and surface temperature of materials using a two embedded thermocouple approach. As an initial check to the inversion analysis, the theoretical temperature solution for a one-dimensional semi-infinite slab was used. This validated that the analysis could converge to the constant thermal properties for the theoretical material. An experiment was run again to provide data for the materials copper and aluminum. Using a real material is fundamentally different from using theoretical determined (analytical) data, because the thermal properties for a real material vary with temperature. Since the inversion analysis converged to a constant solution for the theoretical temperatures, it was believed that the real material will converge to a solution. However, it was seen that the thermal diffusivity for the real materials never converged to the expected value. Although, when a constant handbook value for the thermal diffusivity is used to calculate the thermal conductivities from the experimental temperature data collected from the internal probes, the inversion analysis resulted in good agreement with experiment.
455

A formal framework for modelling component extension and layers in distributed embedded systems /

Förster, Stefan. January 2007 (has links)
Techn. Univ., Diss.--Chemnitz.
456

A formal fault model for component-based models of embedded systems /

Fischer, Marco. January 2007 (has links)
Zugl.: @Chemnitz, Techn. Univ., Diss.
457

A Verilog 8051 soft core for FPGA applications

Rangoonwala, Sakina. Kougianos, Elias, January 2009 (has links)
Thesis (M.S.)--University of North Texas, August, 2009. / Title from title page display. Includes bibliographical references.
458

A mobile object container for dynamic component composition

Yung, Chor-ho. January 2001 (has links)
Thesis (M. Phil.)--University of Hong Kong, 2001. / Includes bibliographical references (leaves 111-113).
459

High-performance advanced encryption standard (AES) security co-processor design

Tandon, Prateek, January 2003 (has links) (PDF)
Thesis (Ph. D.)--School of Electrical and Computer Engineering, Georgia Institute of Technology, 2004. Directed by Hsien-Hsin S. Lee. / Includes bibliographical references (leaves 55-58).
460

MPSoC simulation and implementation of KPN applications

Cheung, Chun Shing. January 2009 (has links)
Thesis (Ph. D.)--University of California, Riverside, 2009. / Includes abstract. Title from first page of PDF file (viewed March 8, 2010). Available via ProQuest Digital Dissertations. Includes bibliographical references (p. 123-137). Also issued in print.

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