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A new modified-T equivalent-circuit model for the embedded inductors in LTCC is first introduced in this thesis. The model can predict the parallel, series, and ground resonant frequencies successfully. For the embedded capacitors in LTCC, a £k-equivalent circuit that can include first two resonant frequencies has been used. One example for each model has been established to illustrate the broadband features of the models. Finally, a parameter table is given to evaluate the performance of these embedded LTCC inductors and capacitors.

Multimedia workloads have always held an important role in embedded applications. The thesis presents a Multimedia Enhanced MicroController Unit (ME-MCU) for low-cost embedded applications. The main components of ME-MCU include a PIC16C 8-bit MCU core with a 32-bit multimedia extension, an enhanced memory interface fo signal processing, and an embedded In-Circuit Emulator (ICE). The main goal is not only to improve the media performance, but also to keep the small-area benefit of signle-chip microcontrollers. In addition, base on the architecture of ME-MCU, we proposed a reusable MultiMedia Extension SIP (MME SIP) for providing the CPU designers a simple solution to perform the multimedia extension to an exist ISA. A cost-effective multimedia extension to ARM7 microprocessors has been introduced as a case study of MME SIP. The MME SIP is capable of reducing the execution cycle counts by 69% to 81% for several critical loops, with an average speedup of 3.41, while the gate count overhead is kept under 11%.

£gC/OS-II is a portable, scalable and preemptive real time kernel. In this paper, we describe the work of porting £gC/OS-II to the Xilinx ML310 platform, which is equipped with a Virtex-II Pro FPGA. Moreover, we also present the accomplishment of an OS4RS (Operating System for Reconfigurable System) prototype by integrating £gC/OS-II with the partial reconfiguration capability of the Virtex-II Pro FPGA. For the porting of the £gC/OS-II, we mainly port the code related to context switch, interrupt, and timer. Moreover, for the OS4RS prototype, we partition the FPGA into four regions and allow different circuits (i.e. hardware tasks) to be dynamically reconfigured (i.e. downloaded) into the regions under the control of £gC/OS-II. Finally, we propose an algorithm to predict and pre-configure the hardware tasks so as to reduce the waiting time of task reconfiguration. According to the simulation results, the proposed algorithm can reduce the waiting time effectively.

OpenGL ES 2.0 is the newest 3D graphics technology for hand-held devices established by Khronos. Users need a shading language compiler and a graphics card which is supportive for OpenGL ES 2.0 to develop their application on OpenGL ES 2.0. Without a graphcis processing unit and a corresponding compiler, one can not develop a 3D graphics application based on OpenGL ES 2.0. In order to solve these problems, we proposed an emulator for OpenGL ES 2.0 based on C-language compiler. The proposed emulator applies C-language compiler and CPU to fulfill the specification of OpenGL ES 2.0. With the proposed emulator, application developers can develop a 3D graphics application for OpenGL ES 2.0 without a specific hardware and a corresponding compiler and hardware designers also can compare and debug when designing their own graphics processing unit.

Embedded microcomputer controller application coverage is widespread, for example: Defense industry, aerospace industry, industrial automation, domestic electric appliances, vehicle with electronic, consumption electronic products and so on, embedded microcomputer relative and general computer difference, is essential and each different profession application unifies, must have the specialized ability, is more than outside the general computer's knowledge, researches and develops the personnel often is each application domain expert, also in accordance to uses the domain the difference, this industry fills is competing, the opportunity and the innovation, also belongs to a dispersion industry, even if has the mainstream architecture, but is in no way by the minority company or the product can corner the market. Taiwan electron industry's on middle and lower reaches supplies the chain to be complete, compares in the overseas manufacturer has the relative superiority, the prospects for development favors as before, in the terminal product system construction, the embedded microcomputer controller belongs to the spare part, the system assembles the entrepreneur extremely little to ford into the design and the manufacture, also, because its application stratification plane is broad, product and technical high dispersion, and few diverse and the guest makes the characteristic, suits the small scale highly specialized technology corporate growth. Because this industry has the quantity body to subscribe makes, diverse and so on characteristics few, regards as throughout in the electronic related industry the high value added the tally company market, in recent years the applied technology universalized gradually, the market joined in the numerous competitors competes the influence, the manufacturer faced with the impact and the growth pressure, in the past concentrated only ¡§the technology¡¨ and ¡§the quality¡¨ the maintenance, has been unable to satisfy multiplex the market demand; The management essence lies in the activity and the layout, how does the thorough analysis market understand the customer demand, utilizes the limited enterprise resources and the energy, the strengthened enterprise competitive power, the fixed industry trend of development, unifies the research and development, the manufacture closely and sells this tripartite core competence , draws up the best whole management strategy, is the operator urgently must understanding the answer. Goal of this research, in discussion case AWTech Corporation locates in the industry, its characteristic, present situation, the tendency and have the core competencies; After the analysis understood market, product and customer, induces case AWTech Corporation the resources and ability which has in this industry, the enterprise external environment opportunity and the threat with the enterprise interior superior inferiority, innovates and the unique way, draws up the effective feasible whole management development strategy, achieves the internationalization goal in the competitive market. The research the main conclusion is as follows: 1. The undertaking stage's success cannot guarantee that the future management can also succeed continually, essential consideration factors and so on environmental factor, market demand, product localization, customer behavior pattern, at the right moment revise transport business strategy and the development direction. 2. The strengthened company's core competencies, the centralized resources choose the realistic product and the market are the development direction, makes the most effective use the resources, and will complete the duty carries out accurately, gains the biggest benefit. 3. The internationalization operation viewpoint consideration, draws up the management development strategy, expands steady the enterprise domain.

With the rapid growth of communication, applications in traffic sensor network such as the multimedia service Server Push, are indispensable to business advertising. The applications of server push, for example, the service Push Mail provided by ISP (Internet Service Provider), became much more hot and popular. This paper aims to design a mobile vehicular network to let the people who received the advertisement communicate with the providers of the service. Nevertheless, the handoff problem that arises when traveling brings down the quality of communication. Therefore, seamless handoff becomes a very important issue for us to research. This thesis uses the new SCTP (Stream Control Transmission Protocol) to solve the problem. SCTP not only keeps the advantages of TCP/IP but also provides new support. Allowing the user to own several IP addresses at the same time is one of its important characteristics, which allows you to switch to any other available IP immediately if the transmission is interruptted. With this characteristic, the user barely notices any interruption in the process of handoff. Finally, we propose a new design for SCTP to achieve a response time, and can be used in applications that require a fast response time.

With the improvement in VLSI technology, realization of multiple processor cores on a single chip becomes easier. Therefore, more and more users execute applications on current multi-core architectures. The multi-core system has a brilliant performance in executing multi-threaded applications, but this system could not gain any performance in single-threaded applications. This paper proposes a multi-core architecture for enhancing single-threaded performance in embedded system, and focuses on four points: 1. Construct a simple out-of-order execution core. 2. Design a dynamically scheduled instruction analyzer. 3. Design a mechanism for sharing operands between two cores. 4. Design a mechanism for committing instructions synchronously between two cores. The architecture of each core is single-issue out-of-order instruction pipe. First, instruction analyzer will fetch instructions and generate instruction dependence tags by detecting the dependencies among the fetched instructions, then schedule instructions dynamically and dispatch to the cores. In the core, instructions can know where to get required operands according to the information of instruction tags, this mechanism enables data can be shared between two cores. Instructions are executed by data-driven approach, but in-order complete to maintain the correctness of the program order. Based on ARM instruction set, this paper tries to explore ways to achieve interaction control mechanisms between two cores and to accelerate a single-thread in the dual-core architecture. We write a simulation model of the proposed architecture in C language as our trace-driven simulation framework and the MediaBench suite is selected for the experiments. According simulation result, the architecture can obtain average 40% performance speedup comparing to the five-stage pipelined architecture.

An automated vision system performs critical tasks in video surveillance, while decreasing costs and increasing efficiency. It can provide high quality scene monitoring without the limitations of human distraction and fatigue. Advances in embedded processors, wireless networks, and imager technology have enabled computer vision systems to be deployed pervasively in stationary surveillance monitors, hand-held devices, and vehicular sensors. However, the size, weight, power, and cost requirements of these platforms present a great challenge in developing real-time systems. This dissertation explores the development of background modeling algorithms for surveillance on embedded platforms. Our contributions are as follows: - An efficient pixel-based adaptive background model, called multimodal mean, which produces results comparable to the widely used mixture of Gaussians multimodal approach, at a much reduced computational cost and greater control of occluded object persistence. - A novel and efficient chromatic clustering-based background model for embedded vision platforms that leverages the color uniformity of large, permanent background objects to yield significant speedups in execution time. - A multi-scale temporal model for midground analysis which provides a means to "tune-in" to changes in the scene beyond the standard background/foreground framework, based on user-defined temporal constraints. Multimodal mean reduces instruction complexity with the use of fixed integer arithmetic and periodic long-term adaptation that occurs once every d frames. When combined with fixed thresholding, it performs 6.2 times faster than the mixture of Gaussians method while using 18% less storage. Furthermore, fixed thresholding compares favorably to standard deviation thresholding with a percentage difference in error less than five percent when used on scenes with stable lighting conditions and modest multimodal activity. The chromatic clustering-based approach to optimized background modeling takes advantage of the color distributions in large permanent background objects, such as a road, building, or sidewalk, to speedup execution time. It abstracts their colors to a small color palette and suppresses their adaptation during processing. When run on a representative embedded platform it reduces storage usage by 58% and increases runtime execution by 45%. Multiscale temporal modeling for midground analysis presents a unified approach for scene analysis that can be applied to several application domains. It extends scene analysis from the standard background/foreground framework to one that includes a temporal midground object saliency window that is defined by the user. When applied to stationary object detection, the midground model provides accurate results at low sampling frame rates (~ 1 fps) while using only 18 Mbytes of storage and 15 Mops/sec processing throughput.