Η διπλωματική εργασία επικεντρώνεται στη μελέτη της κωδικοποίησης για κώδικες LDPC. Στα πλαίσιά της, θα μελετηθούν τα προβλήματα και η πολυπλοκότητα κωδικοποίησης συναρτήσει του μήκους της κωδικής λέξης. Έμφαση θα δοθεί σε εφαρμογές με μεγάλο μήκος κωδικής λέξης όπως εκείνες που χρησιμοποιούνται σε νέες τηλεπικοινωνιακές εφαρμογές, όπως δορυφορικό Digital Video Broadcast (DVB) DVB-S2, IEEE 802.3an (10GBASE-T) και IEEE 802.16(WiMAX). Σε τέτοιες εφαρμογές όπου η κωδική λέξη μπορεί να έχει μήκος αρκετά μεγαλύτερο των 1000 bits, η πολυπλοκότητα κωδικοποίησης είναι σημαντική. Αυτό συμβαίνει διότι απαιτούνται μεγάλες σε μέγεθος μνήμες για την αποθήκευση του Πίνακα Έλεγχου Ισοτιμίας (Parity-check Matrix H), πολύ μεγάλη χρονική επεξεργαστική πολυπλοκότητα O(n^2) αλλά και πολλά επεξεργαστικά στοιχεία τάξης Ο(n^2). Ο σκοπός λοιπόν είναι να μελετηθούν οι αλγόριθμοι κωδικοποίησης και να μελετηθεί πώς μπορεί να αξιοποιηθεί η αραιότητα του Πίνακα Έλεγχου Ισοτιμίας έτσι ώστε να επιτευχθεί κατά το δυνατόν γραμμική πολυπλοκότητα O(n) κωδικοποίησης. Στη συνέχεια, αφού αναπτυχθεί η κατάλληλη μέθοδος κωδικοποίησης, θα ακολουθήσει η μελέτη και ο σχεδιασμός μίας βέλτιστης VLSI αρχιτεκτονικής για την υλοποίηση σε υλικό του LDPC κωδικοποιητή, ώστε να ικανοποιεί και άλλα πρακτικά κριτήρια, με έμφαση στη μείωση της καθυστέρησης και της απαιτούμενης επιφάνειας. Θα αναπτυχθεί επίσης μια κατάλληλη αρχιτεκτονική για διάφορους βαθμούς παραλληλίας του κωδικοποιητή. / An LDPC code is a linear block code specified by a very sparse parity check matrix (PCM). LDPC codes are usually represented by a bi-partite graph in which a variable node corresponds to a ’coded bit’ or a PCM column, and a check node corresponds to a parity check equation or a PCM row. There is an edge between each pair of nodes if there is a ’one’ in the corresponding PCM entry. In a general analysis an (n, k) LDPC code has k information bits and n coded bits with code rate r = k/n. An important issue in the implementation of LDPC-code based forward error correction systems is the encoding of LDPC codes. Generally, LDPC codes cannot have the simple encoding structures based on of shift registers as in the case of convolutional, turbo codes, or cyclic block codes. However, general LDPC codes do not fall in this category. Except QC-cyclic LDPC codes, most efficient LDPC codes, especially irregular LDPC codes are hard to encode with the idea of shift registers. A straightforward way is to derive a systematic generator matrix from a PCM, and then to encode LDPC code systematically with the generator matrix. This can work for every LDPC code in theory, but practically it is a very bad idea because it has high complexity, as the generator matrix derived from parity-check matrix is not sparse contrasted to the PCM. Generator matrix can be very dense matrix. The objective is to utilize the sparseness to achieve LDPC encoding in linear time. This Master’s thesis presents a flexible encoder architecture using QC-cyclic LDPC codes and efficient two-step encoding algorithm in order to achieve linear time encoding. The particular approach considers several VLSI design issues of LDPC encoder. In particular efficient approaches are presented for reducing memory requirements, for reducing hardware complexity, and increasing the speed and throughput of LDPC encoding. The proposed structure is also generic and scalable, supporting multiple configurations, in terms of bits per symbol and code rate. A generic scalable processing unit is also presented. It supports LDPC codes that define parity check matrix as a combination of identity matrix, shifted identity matrix and all-zero matrix (QC-cyclic LDPC codes). The particular LDPC encoder architecture is synthesized and experimental results are reported.

Digital encoders are electro-mechanical sensors that measure linear or angular position using special binary patterns. The properties of these patterns influence the traits of the resulting encoders, such as their maximum speed, resolution, tolerance to error, or cost to manufacture. We describe a novel set of patterns that can be used in encoders that are simple and compact, but require some initial movement to register their position. Previous designs for such encoders, called absolute incremental encoders, tend to incorporate separate patterns for the functions of tracking incremental movement and determining the absolute position. The encoders in this work, however, use a single pattern that performs both functions, which maximizes information density and yields better resolution. Compared to existing absolute encoders, these absolute incremental encoders are much simpler with fewer pattern tracks and read heads, potentially allowing for lower-cost assembly of high resolution encoders. Furthermore, as the manufacturing requirements are less stringent, we expect such encoders may be suitable for use in D.I.Y. %27maker%27 projects, such as those undertaken recently by our lab.

No description available.

As intelligent access solutions begin to dominate the world, the statistical learning methods to answer for the behavior of these needs attention, as there is no clear answer to how an algorithm could learn and predict exactly how people move. This project aims at investigating if, with the help of unsupervised learning methods, it is possible to distinguish anomalies from normal events in an access system, and if the most probable choice of cylinder to be unlocked by a user can be calculated.Given to do this is a data set of the previous events in an access system, together with the access configurations - and the algorithms that were used consisted of an auto-encoder and a probabilistic generative model.The auto-encoder managed to, with success, encode the high-dimensional data set into one of significantly lower dimension, and the probabilistic generative model, which was chosen to be a Gaussian mixture model, identified clusters in the data and assigned a measure of unexpectedness to the events.Lastly, the probabilistic generative model was used to compute the conditional probability of which the user, given all the details except which cylinder that was chosen during an event, would choose a certain cylinder. The result of this was a correct guess in 65.7 % of the cases, which can be seen as a satisfactory number for something originating from an unsupervised problem. / Allt eftersom att intelligenta åtkomstlösningar tar över i samhället, så är det nödvändigt att ägna de statistiska inlärnings-metoderna bakom dessa tillräckligt med uppmärksamhet, eftersom det inte finns något självklart svar på hur en algoritm ska kunna lära sig och förutspå människors exakta rörelsemönster.Det här projektet har som mål att, med hjälp av oövervakad inlärning, undersöka huruvida det är möjligt att urskilja anomalier från normala iakttagelser, och om den låscylinder med högst sannolikhet att en användare väljer att försöka låsa upp går att beräknda.Givet för att genomföra detta projekt är en datamängd där händelser från ett åtkomstsystem finns, tillsammans med tillhörande åtkomstkonfig-urationer. Algoritmerna som användes i projektet har bestått av en auto-encoder och en probabilistisk generativ modell.Auto-encodern lyckades, med tillfredsställande resultat, att koda det hög-dimensionella datat till ett annat med betydligt lägre dimension, och den probabilistiska generativa modellen, som valdes till en Gaussisk mixtur-modell, lyckades identifiera kluster i datat och med att tilldela varje observation ett mått på dess otrolighet.Till slut så användes den probabilistiska generativa modellen för att beräkna en villkorad sannolikhet, för vilken användaren, given alla attribut för en händelse utom just vilken låscylinder som denna försökte öppna, skulle välja.Resultatet av dessa var en korrekt gissning i 65,7 % av fallen, vilket kan ses som en tillfredställande siffra för något som härrör från ett oövervakat problem.

<p>Condition monitoring of critical machine tool components and machining processes is a key factor to increase the availability of the machine tool and achieving a more robust machining process. Failures in the machining process and machine tool components may also have negative effects on the final produced part. Instabilities in machining processes also shortens the life time of the cutting edges and machine tool.</p><p>The condition monitoring system may utilise information from several sources to facilitate the detection of instabilities in the machining process. To avoid additional complexity to the machining system the use of internal sensors is considered. The focus in this thesis has been to investigate if information related to the machining process can be extracted directly from the internal sensors of the machine tool.</p><p>The main contibutions of this work is a further understanding of the direct response from both linear and angular position encoders due the variations in the machining process. The analysis of the response from unbalance testing of turn tables and two types of milling processes, i.e. disc-milling and slot-milling, is presented. It is shown that operational frequencies, such as cutter frequency and tooth-passing frequency, can be extracted from both active and inactive machine axes, but the response from an active machine axis involves a more complex analysis. Various methods for the analysis of the responses in time domain, frequency domain and phase space are presented.</p> / QC 20100518

<p>Den här rapporten beskriver arbetet med en automatiserad provrörsförflyttare. Det är ett examensarbete som har gjorts på företaget Q-linea AB. En karuselliknande konstruktion med en stegmotor användes för att flytta prover mellan ett antal positioner. En mikrokontroller som hanterar styrning och sensordata har programmerats i C. LabVIEW och en USB-kamera har använts som hjälp till att göra utvärderingar och tester av systemet. Målet var att konstruera en prototyp som uppfyllde de precisionskrav och tidskrav som ställdes, vilket också uppnåddes. Rapporten beskriver arbetsgången och avslutas med rekommendationer för fortsatt arbete. Rapporten innehåller en teoridel som kan användas till hjälp för att konstruera liknande system, d.v.s. roterande positioneringstillämpningar.</p> / <p>This thesis describes the work of an automated sample tube mover. This is a degree project and has been done at the company Q-linea AB. A carousel similar construction with a stepper motor has been designed for the task to move samples between a numbers of positions. A microcontroller has been programmed to control the movements and handle sensor data. LabVIEW have been used together with an USB-camera in order to do evaluations and tests of the system. The goal was to design a prototype that fulfills the demanded requirements of precision and timing, which also was achieved. The thesis describes the work process and concludes with recommendations for further work.</p>

Den här rapporten beskriver arbetet med en automatiserad provrörsförflyttare. Det är ett examensarbete som har gjorts på företaget Q-linea AB. En karuselliknande konstruktion med en stegmotor användes för att flytta prover mellan ett antal positioner. En mikrokontroller som hanterar styrning och sensordata har programmerats i C. LabVIEW och en USB-kamera har använts som hjälp till att göra utvärderingar och tester av systemet. Målet var att konstruera en prototyp som uppfyllde de precisionskrav och tidskrav som ställdes, vilket också uppnåddes. Rapporten beskriver arbetsgången och avslutas med rekommendationer för fortsatt arbete. Rapporten innehåller en teoridel som kan användas till hjälp för att konstruera liknande system, d.v.s. roterande positioneringstillämpningar. / This thesis describes the work of an automated sample tube mover. This is a degree project and has been done at the company Q-linea AB. A carousel similar construction with a stepper motor has been designed for the task to move samples between a numbers of positions. A microcontroller has been programmed to control the movements and handle sensor data. LabVIEW have been used together with an USB-camera in order to do evaluations and tests of the system. The goal was to design a prototype that fulfills the demanded requirements of precision and timing, which also was achieved. The thesis describes the work process and concludes with recommendations for further work.

Condition monitoring of critical machine tool components and machining processes is a key factor to increase the availability of the machine tool and achieving a more robust machining process. Failures in the machining process and machine tool components may also have negative effects on the final produced part. Instabilities in machining processes also shortens the life time of the cutting edges and machine tool. The condition monitoring system may utilise information from several sources to facilitate the detection of instabilities in the machining process. To avoid additional complexity to the machining system the use of internal sensors is considered. The focus in this thesis has been to investigate if information related to the machining process can be extracted directly from the internal sensors of the machine tool. The main contibutions of this work is a further understanding of the direct response from both linear and angular position encoders due the variations in the machining process. The analysis of the response from unbalance testing of turn tables and two types of milling processes, i.e. disc-milling and slot-milling, is presented. It is shown that operational frequencies, such as cutter frequency and tooth-passing frequency, can be extracted from both active and inactive machine axes, but the response from an active machine axis involves a more complex analysis. Various methods for the analysis of the responses in time domain, frequency domain and phase space are presented. / QC 20100518

Σκοπός της παρούσας διπλωματικής εργασίας είναι η μελέτη και ο σχεδιασμός VLSI επεξεργαστών για τη διόρθωση λαθών. Η κατηγορία των VLSI επεξεργαστών στην οποία εστιάζει η έρευνά μου είναι ο αποκωδικοποιητής Viterbi. Αρχικά, παρουσιάζεται η δομή του ψηφιακού τηλεπικοινωνιακού συστήματος και κάποιες βασικές έννοιες των κωδικών διόρθωσης λαθών. Έπειτα, αναλύονται οι Συνελικτικοί κωδικοποιητές, ανάμεσα στους οποίους περιλαμβάνεται ο Συνελικτικός κωδικοποιητής που χρησιμοποιείται στην εργασία μου και ο οποίος χρησιμοποιείται ευρέως στο πρότυπο Wifi 802.11a. Ακολούθως, γίνεται αναφορά στο κανάλι AWGN και στη διαμόρφωση BPSK. Ακόμα, παρουσιάζονται οι βασικές έννοιες του αλγόριθμου Viterbi, η λειτουργία του, η δομή του καθώς και οι εφαρμογές του. Στη συνέχεια, μελετώνται διάφορες αρχιτεκτονικές του αποκωδικοποιητή Viterbi σε VLSI. Με βάση τον τρόπο υλοποίησης αριθμητικών πράξεων, οι αρχιτεκτονικές που αναπτύσσονται είναι ο Radix-2 και ο Radix-4 Viterbi, ενώ με βάση τον τρόπο αποκωδικοποίησης αναπτύσσονται οι αρχιτεκτονικές του Viterbi για συνεχή αποκωδικοποίηση-εφαρμογές streaming και του Viterbi για αποκωδικοποίηση πακέτων των 20 bits. Επίσης, μελετάται η απόδοση των αρχιτεκτονικών αυτών με κριτήριο τη συχνότητα λαθών που πραγματοποιούνται (Bit Error Rate – BER) και αναλύεται η υλοποίηση των αρχιτεκτονικών αυτών στο αναπτυξιακό σύστημα Xilinx. Τέλος, προκύπτουν τα κατάλληλα συμπεράσματα. / The purpose of this diploma thesis is to study and implement VLSI processors for correcting errors. The category of VLSI processor which will focus in this work is the Viterbi decoder. Initially, the structure of the digital telecommunications system is presented along with some basic concepts of error correcting codes. Then we explain the theory behind convolutional encoders and we describe the convolutional encoder that is used in my work and is consistent in the Wifi 802.11a standard. Next we analyze briefly the AWGN channel and the BPSJ modulation. Also the basic concepts of the Viterbi algorithm, how it works, its structure and the different applications are given. For the practical part which is the main part of this project, is to study the different architectures of the Viterbi decoder in VLSI approach. The main architectures that were developed for the implementation arithmetic operations is Radix-2 and Radix-4 Viterbi, but in terms of decoding two more architectures were developed, Viterbi continuous decoding-streaming applications and Viterbi decoding for packets of 20 bits. Then, the performance of these architectures in terms of frequency of errors made (BER) was investigated and also the implementation of these architectures in the development system Xilinx was analyzed. At the end we give our conclusion regarding the results of the different simulations that we’ve done.

Orientador: Jaime Portugheis / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-06T08:08:11Z (GMT). No. of bitstreams: 1 Sharma_Manish_M.pdf: 1001397 bytes, checksum: 04250e6b88e19bb784d3b68313ace258 (MD5) Previous issue date: 2006 / Resumo: Nesta dissertação abordamos o problema de como construir codificadores bit-geometricamente uniformes (BGU) para a utilização como codificadores internos em sistemas com concatenação serial de códigos. A utilização destes codificadores implica na facilidade de determinação de parâmetros necessários para a análise do desempenho dos sistemas. Há um grande controle sobre estes parâmetros no projeto destes codificadores utilizando o método descrito neste trabalho, o que sugere que bons codificadores e conseqüentemente bons sistemas podem ser obtidos desta maneira. Além disso, os códigos gerados por estes codificadores possuem a propriedade de uniformidade de erro de bit, o que facilita bastante sua análise / Abstract: This thesis approaches the problem of building bit-geometrically uniform (BGU) encoders to be used as inner encoders in systems with serially concatenated codes. By using this type of encoders, certain parameters that are used to analyze the system's performance are easily determined. There is a great control over these parameters when building encoders using the method described in this work, suggesting that good encoders and subsequently good systems can be obtained. Besides, the codes generated by these encoders posses the uniform bit error property, that greatly facilitates their analysis / Mestrado / Engenharia de Telecomunicações / Mestre em Engenharia Elétrica