Two SiGe-on-insulator (SGOI) structures for CMOS application are presented: surface-channel strained-Si on SGOI (SSOI) and dual-channel SGOI structures. Comparisons between two structures are made from both device performance and CMOS process point of view. We have demonstrated both structures on SGOI, and have fabricated n-MOSFET’s and p-MOSFET’s on those two structures respectively. Device characteristics are presented. The devices show enhancement on both electron and hole mobilities. / Singapore-MIT Alliance (SMA)

In this work, we have developed two different fabrication processes for relaxed Si₁₋xGex-on-insulator (SGOI) substrates: (1) SGOI fabrication by etch-back approach, and (2) by "smart-cut" approach utilizing hydrogen implantation. Etch-back approach produces SGOI substrate with less defects in SiGe film, but the SiGe film uniformity is inferior. "Smart-cut" approach has better control on the SiGe film thickness and uniformity, and is applicable to wider Ge content range of the SiGe film. We have also fabricated strained-Si n-MOSFET’s on SGOI substrates, in which epitaxial regrowth was used to produce the surface strained Si layer on relaxed SGOI substrate, followed by large-area n-MOSFET’s fabrication on this structure. The measured electron mobility shows significant enhancement (1.7 times) over both the universal mobility and that of co-processed bulk-Si MOSFET’s. This SGOI process has a low thermal budget and thus is compatible with a wide range of Ge contents in Si₁₋xGex layer. / Singapore-MIT Alliance (SMA)