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No description available.

Nanoclusters have special importance in nanotechnology because of their low dimensionality, which provides electronic, chemical, and magnetic properties that differ from those of the equivalent bulk materials. Suitably controllable self-assembly methods are required in order to incorporate nanoclusters into useful devices. The self-assembly method used in this study employs V-grooves as a template element for nanocluster device fabrication. The V-grooves are fabricated by optical lithography on SiO2/Si wafers and KOH wet etching. Bi clusters deposited on a V-groove form a self-assembled conducting wire. The clusters are produced using an inert gas aggregation source inside an ultra high vacuum compatible system. In order to characterise the assembly process, Bi clusters with different average sizes and velocities are deposited on V-grooves with different widths. The cluster bouncing was found to be the main process in forming the cluster wires. The bouncing angles were smaller than the incident angle, and they are dependent on the cluster size and velocity. For a certain bouncing angle, the wire width reflects the V-groove width because of the fixed bouncing angle. Nanocluster devices were fabricated by depositing the clusters on V-grooves with pre-formed Au/NiCr electrical contacts. The amount of the deposited material required to form an electrically conducting wire was found to be a function of the V-groove width and the wire length. The two point I(V) measurements in the voltage range between -1 and +1V showed linear characteristics for low resistance wires (kΩ), and non-linear characteristics for the high resistance ones (MΩ). The silicon substrate was used as a back gate. Applying a voltage to the gate was found to modify the electrical conduction of the cluster wire. The temperature dependence of the resistance of the nanocluster wires was studied in the temperature range of 4.2-473K, and all of the measured wires showed a negative temperature coefficient of resistance. These measurements allowed a detailed study of the conduction mechanisms through the cluster wires. The study showed that Bi clusters can be used for device fabrication. To size select the clusters prior to using them for the device fabrication, a high transmission mass filter is required. This transmission can be obtained using the von Issendorff and Palmer mass filter if it is operated using the optimum operation conditions. The mass filter consists of two pairs of parallel plates with horizontal openings in Plates 1 and 2, and it operates on the time of flight principle. During this project, the operation conditions of this mass filter were studied using both experiment and simulation. The study showed that the beam deflection angle is a critical factor in optimising the mass filter transmission efficiency. This angle is dependent on the accelerating voltage, ion mass, and the horizontal velocity of the ions. The optimum operation conditions for the mass filter were found and used to study the mass distribution of Pd ions produced by a magnetron sputtering source with variable cluster aggregation length.

A MEMS based electrostatic field sensor is presented which uses capacitive interrogation of an electrostatic force deflected microstructure. First the deflection of the sensor’s membrane which is caused by electrostatic force in the presence of electric field is calculated both by simulation and theoretical model and it has been shown that the results of the simulations have acceptable values compared to the theoretical ones. Simulation models have also been designed to improve the vibration of the membrane for measuring the ac electric fields. It has been shown that by adding perforations to the surface of the membrane, it is possible to reduce the air drag force effect on the membrane and still have similar electrostatic force on the membrane. Therefore, it is possible to reduce the damping due to air resistance in membrane movement when measuring ac fields. After successful modeling of the sensor structure, the fabrication process for the sensor has been designed. The electroplating process as the most important fabrication step has been studied in detail prior to starting the fabrication of sensor. The process parameters for electroplating process, such as current amplitudes, duty cycle and frequency have been optimized to get the lowest surface roughness to thickness ratio for the electroplated films. A lithography molding process was developed for the electroplating. Both dc and pulse plated films have been studied to show the role of pulse plating in improving the quality of the electroplated films. It was found during the release process that the electroplated copper interacted with sulfur during plasma etching of silicon. However, the result of the releasing process was very helpful to find the best recipe of releasing and they can be used in next projects.

Nanoclusters have special importance in nanotechnology because of their low dimensionality, which provides electronic, chemical, and magnetic properties that differ from those of the equivalent bulk materials. Suitably controllable self-assembly methods are required in order to incorporate nanoclusters into useful devices. The self-assembly method used in this study employs V-grooves as a template element for nanocluster device fabrication. The V-grooves are fabricated by optical lithography on SiO2/Si wafers and KOH wet etching. Bi clusters deposited on a V-groove form a self-assembled conducting wire. The clusters are produced using an inert gas aggregation source inside an ultra high vacuum compatible system. In order to characterise the assembly process, Bi clusters with different average sizes and velocities are deposited on V-grooves with different widths. The cluster bouncing was found to be the main process in forming the cluster wires. The bouncing angles were smaller than the incident angle, and they are dependent on the cluster size and velocity. For a certain bouncing angle, the wire width reflects the V-groove width because of the fixed bouncing angle. Nanocluster devices were fabricated by depositing the clusters on V-grooves with pre-formed Au/NiCr electrical contacts. The amount of the deposited material required to form an electrically conducting wire was found to be a function of the V-groove width and the wire length. The two point I(V) measurements in the voltage range between -1 and +1V showed linear characteristics for low resistance wires (kΩ), and non-linear characteristics for the high resistance ones (MΩ). The silicon substrate was used as a back gate. Applying a voltage to the gate was found to modify the electrical conduction of the cluster wire. The temperature dependence of the resistance of the nanocluster wires was studied in the temperature range of 4.2-473K, and all of the measured wires showed a negative temperature coefficient of resistance. These measurements allowed a detailed study of the conduction mechanisms through the cluster wires. The study showed that Bi clusters can be used for device fabrication. To size select the clusters prior to using them for the device fabrication, a high transmission mass filter is required. This transmission can be obtained using the von Issendorff and Palmer mass filter if it is operated using the optimum operation conditions. The mass filter consists of two pairs of parallel plates with horizontal openings in Plates 1 and 2, and it operates on the time of flight principle. During this project, the operation conditions of this mass filter were studied using both experiment and simulation. The study showed that the beam deflection angle is a critical factor in optimising the mass filter transmission efficiency. This angle is dependent on the accelerating voltage, ion mass, and the horizontal velocity of the ions. The optimum operation conditions for the mass filter were found and used to study the mass distribution of Pd ions produced by a magnetron sputtering source with variable cluster aggregation length.

Thesis (Ph.D.)--Drexel University, 2008. / Includes abstract and vita. Includes bibliographical references (leaves 90-100).

Th. univ.--Paris 6--Informatique, 1989. / 1989 d'après la déclaration de dépôt légal. Bibliogr. p. 224-229. Résumé en français.

Th. Univ.--Sci. de l'ing.--Paris 13, 1993. / Bibliogr. f. 134-142.

abstract: Digital Fabrication has played a pivotal role in providing reality to industrial designers' ideas since its first commercial use in late 80's. Making the final prototype of a design project has been the initial assumed use for these technologies in the design process. However, new technology advances in this area offer further opportunities for designers. In this research these opportunities have been carefully explored. This research will be conceptualized through discussing the findings of a case study and theories in the areas of Industrial Design methodology, digital fabrication, and design pedagogy. Considering the span of digital fabrication capabilities, this research intends to look into the design-fabrication relation from a methodology perspective and attempts to answer the question of how the digital fabrication methods can be integrated into the Industrial Design process to increase the tangibility of the design process in very first steps. It will be argued that the above is achievable in certain design topics - i.e. those with known components but unknown architecture. This will be studied through the development of series of hypothetical design processes emphasizing the role of digital fabrication as an ideation tool rather than a presentation tool. In this case study, two differing processes have been developed and given to Industrial Design students to design specific power tools. One of them is developed based on the precedence of digital fabrication. Then the outcome of the two processes is compared and evaluated. This research will introduce the advantages of using the digital fabrication techniques as a powerful ideation tool, which overcomes the imagination problems in many of complicated design topics. More importantly, this study suggests the criteria of selecting the proposed design methodology. It is hoped that these findings along with the advances in the area of additive and subtractive fabrication will assist industrial designers to create unique methodologies to deal with complicated needs both in practice and design education. / Dissertation/Thesis / M.S. Design 2012

The aim of this project is to fabricate highly efficient grating couplers in thin-film silicon-on-insulator (SOI) wafers, which have a silicon (Si) thickness of the order of 1 mum. These thin-film waveguides allow the development of higher speed Si optical modulators, sensors and vertical surface coupling for Si light emitting diodes (LEDs), Hence, SOI rectangular and blazed grating couplers were fabricated where the buried oxide layer in SOI was designed as a reflective layer. The former gratings were fabricated by electron beam lithography followed by reactive ion etching, while the latter gratings were fabricated by angled argon ion beam etching. Both types of grating were designed at the diffraction order of -1, for a wavelength of 1.3 mum. The fabricated rectangular gratings have grating heights of 0.14, 0.23, 0.30 and 0.44 mum and a pitch of 0.40 mum whereas the sawtooth blazed gratings have a grating depth of 0.08 mum and a period of 0.38 mum To our knowledge, no Si blazed gratings with a pitch of less than 500 nm have been fabricated before. The SOI rectangular grating couplers yield a maximum output efficiency of 71 +/- 5 % towards the superstrate, while the blazed grating couplers produce an output efficiency of 84 +/- 5 % towards the substrate. These experimental output efficiencies are the highest yet reported in SOI for each grating profile, respectively. In addition, an optical loss of 0.15 +/- 0.05 dB/cm of Unibond SOI was measured for the first time. Furthermore, the experimental output efficiencies of the grating couplers with various grating heights were found to be consistent with perturbation theory. Thus, our aim of designing and fabricating an highly efficient thin film SOI waveguide grating coupler has been achieved. These grating couplers may enhance the applications of integrated optics in Si, and may allow the development of devices such as those mentioned above.