In this work Scanning Kelvin Probe Microscopy (SKPM) was used to characterize surface states and device surface charging in nitride materials. Samples grown by Molecular Beam Epitaxy (MBE), Metal Organic Chemical Vapor Deposition (MOCVD) and Hydride Vapor Phase Epitaxy (HVPE) typically show a high surface band bending of about 1 eV. In an n-type sample with 3X1017 cm-3 carrier concentration, 1 eV upward band bending corresponds to 1.7X1012 cm-2 trapped charge density in the surface states. Under continuous ultraviolet (UV) illumination up to 0.6 eV surface photo voltage effect could be observed in some samples, which further indicates that surface band bending is very likely larger than 0.6 eV, i.e. close to 1 eV. Reactive Ion Etching (RIE)damage was observed to increase surface band bending by about 0.4 eV where as surface treatments in organic solvents and inorganic acids did not affect surface band bending significantly. These results indicate presence of high density of surface states in devices fabricated in nitride materials. Surface potential measurements immediately after turning off a reverse bias to the Schottky contact of a GaN Schottky diode as well as an AlGaN/GaN Hetero-junction Field Effect Transistor (HFET) show an increase of band bending near the Schottky contact edge. For an applied reverse bias of 4 V, about 0.5 eV increase of band bending was observed. This increase of band bending was caused by tunneling of electrons from the Schottky contact and their subsequent capture by surface states near the contact edge. In case of the HFET, the increase of band bending for a bias that caused no current flow through the device was similar to a bias that did. This showed that hot electron injection from the channel did not play a significant role in increasing surface band bending. The accumulated charge near the gate edge of a HFET can deplete the channel, which would cause the drain current to decrease. The total times of accumulation and dissipation of excess surface charge near the gate edge of the HFET were comparable to the time scales of drain current transients of current collapse and recovery. From this observation we attributed current collapse phenomena to charge accumulation near the edge of the reverse biased gate contact of a HFET.

Engineers know well from an early point in their training the trials and tribulations of having to make design tradeoffs in order to optimize one performance parameter for another. Discovering tradeoff conditions that result in the elimination of a loss associated with the enhancement of some other parameter (an improvement over a typical tradeoff), therefore, ushers in a new paradigm of design in which the constraints which are typical of the task at hand are alleviated. We call such a design paradigm “tuning” as opposed to “trading off”, and this is the central theme of this work. We investigate two types of microwave electronic devices, namely GaN-based heterostructure field effect transistors (HFETs) and tunable ferroelectric-ferrite-based microwave phase shifters. The “tuning” associated with these types of devices arises from the notion of an optimal 2DEG density, capable of achieving higher performance in terms of electron velocity and enhanced reliability in the case of the HFET, and the coupling of ferroelectric and ferrite materials in tunable microwave phase shifters, capable of achieving high differential phase shifts while at the same time mitigating the losses associated with impedance mismatching which typically arise when the phase is tuned. Promises and problems associated with HFET devices based on the intriguing InAlN/GaN material system will be described. We focus on the fundamental problem associated with the induction of the large density of carriers at the interface, namely the disintegration of an excess of longitudinal optical phonons (hot phonons) in the channel. We use microwave measurements in conjunction with stress tests to evidence the existence of an optimal 2DEG density wherein the hot phonon effect can be “tuned,” which allows for enhanced high frequency performance as well as device reliability. Next, we focus on the design, fabrication, and measurement of tunable phase shifters consisting of thin films of BaxSr1-xTiO3 (BST), which has the advantage of having high dielectric tunability as well as relatively low microwave loss. We discuss the design, fabrication, and measurement of a simple coplanar waveguide (CPW) type of phase shifter as well as a more complicated “hybrid” phase shifter consisting of a ferrite (YIG) in addition to BST. The use of such a bilayer allows one to “tune” the impedance of the phase shifters independently of the phase velocity through careful selection of the DC biasing magnetic fields, or alternatively through the use of an additional piezoelectric layer, bonded to YIG whose permeability can then be tuned through magnetostriction.

Thesis (M. Tech. Engineering: Electrical--Vaal University of Technology / A high-power Mosfet was incorporated as a switching device into the efficient Class E configuration, where the switching device switches current through itself either completely on or completely off at high frequencies. The first objective of this project was to demonstrate the effectiveness of a phase-lock loop circuit in generating stable high frequencies when connected in an indirect frequency synthesizer configuration. The indirect frequency synthesizer has established itself as a versatile frequency generator capable of generating high frequencies based on a lower stable reference frequency. The frequency generation stage incorporates a phaselock loop circuit, a frequency divider and a stable reference frequency section. The phase-lock loop section incorporates the TTL based 74HC 4046 that is based upon the common CMOS 4046 integrated circuit. The frequency divider section is built around the CMOS-based 4526 whilst the reference frequency section incorporates the CMOS-based 4060. The frequency synthesizer produced a range of frequencies from 50 kHz to 8 MHz in 50 kHz steps. The output voltage was constant at 5,5 V. The second objective was to show that the complementary emitter follower is indeed a worthy Mosfet gate drive circuit at high frequencies. The Mosfet driver stage produced a voltage signal of at least 11 V, being able to source and sink relatively high peaks of current, especially at high frequencies. Voltage amplification occurred through the use of multiple CMOS-based 40106 inverters. The complementary emitter follower, known for its low output impedance and its ability to source and sink large amounts of current, was an important component in the final Mosfet gate section.

A dissertation submitted to the Faculty of Science, Wits University, in fulfilment of the requirements for the degree of Master of Science. 30 March 2016. / Bismuth ferrite BiFeO3 is a transition metal oxide that exhibits both antiferromagnetic and ferroelectric orderings and is termed a magnetoelectric multiferroic. These functional properties make it crucial for applications in various nanoelectronic devices and sensors. However, the integration of BiFeO3 in devices requires the scaling down of bulk BiFeO3 to nano dimensional length scales in thin lm format. For this purpose, the elements of the elastic constant tensor of BiF eO3 thin lms are requisite, especially in multilayered or single layer-on-substrate device con gurations. It is thus essential that mechanical properties of BiFeO3 thin lms be established due to their size and growth mode dependence. Therefore, the study aims to determine the propagation of the surface acoustic waves and the elastic constants of BiFeO3 BFO thin lms in order to tailor the mechanical properties for device applications. In this approach the e ect of morphology and microstructure on the elastic constants has been investigated. / MT2016

Hiu Yung Wong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 104-111). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgments --- p.iii / List of Figures --- p.ix / List of Tables --- p.xiii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation and Objectives --- p.1 / Chapter 1.2 --- Contributions --- p.3 / Chapter 1.3 --- Organization of the Thesis --- p.4 / Chapter 2 --- Devices and Fabrication Processes --- p.5 / Chapter 2.1 --- Introduction --- p.5 / Chapter 2.2 --- BJTs --- p.6 / Chapter 2.2.1 --- Structure and Modeling of BJTs --- p.6 / Chapter 2.2.2 --- Standard BJT Process and BJT Characteristics --- p.7 / Chapter 2.3 --- MOSFETs and Complementary MOS (CMOS) --- p.8 / Chapter 2.3.1 --- Structure and Modeling of MOSFETs --- p.8 / Chapter 2.3.2 --- Standard n-well CMOS Process and MOSFETs Charac- teristics --- p.11 / Chapter 2.4 --- BiCMOS Technology --- p.13 / Chapter 2.5 --- Summary --- p.14 / Chapter 3 --- Matching Properties --- p.15 / Chapter 3.1 --- Introduction --- p.15 / Chapter 3.2 --- Importance of Matched Devices in IC Design --- p.15 / Chapter 3.2.1 --- What is Matching? --- p.15 / Chapter 3.2.2 --- Low-power Systems --- p.16 / Chapter 3.2.3 --- Device Size Downward Scaling --- p.16 / Chapter 3.2.4 --- Analog Circuits and Analog Computing --- p.17 / Chapter 3.3 --- Measurement of Mismatch --- p.18 / Chapter 3.3.1 --- Definitions and Statistics of Mismatch --- p.18 / Chapter 3.3.2 --- Types of Mismatches --- p.20 / Chapter 3.3.3 --- Matching Properties of MOSFETs --- p.23 / Chapter 3.3.4 --- Matching Properties of BJTs and CLBTs --- p.27 / Chapter 3.4 --- Summary --- p.30 / Chapter 4 --- CMOS Compatible Lateral Bipolar Transistors (CLBTs) --- p.31 / Chapter 4.1 --- Introduction --- p.31 / Chapter 4.2 --- Structure and Operation --- p.32 / Chapter 4.3 --- DC Model of CLBTs --- p.34 / Chapter 4.4 --- Residual Gate Effect in Accumulation --- p.35 / Chapter 4.5 --- Main Characteristics of CLBTs --- p.37 / Chapter 4.5.1 --- Low Early Voltage --- p.37 / Chapter 4.5.2 --- Low Lateral Current Gain at High Current Levels --- p.38 / Chapter 4.5.3 --- Other Issues --- p.39 / Chapter 4.6 --- Enhanced CLBTs with Cascode Circuit --- p.40 / Chapter 4.7 --- Applications --- p.41 / Chapter 4.8 --- Design and Layout of CLBTs --- p.42 / Chapter 4.9 --- Experimental Results of Single pnp CLBT； nMOSFET and pMOSFET --- p.44 / Chapter 4.9.1 --- CLBT Gains --- p.46 / Chapter 4.9.2 --- Gate Voltage Required for Pure Bipolar Action --- p.47 / Chapter 4.9.3 --- I ´ؤ V and Other Characteristics of Bare pnp CLBTs --- p.49 / Chapter 4.9.4 --- Transfer Characteristics of a Cascoded pnp CLBT --- p.50 / Chapter 4.9.5 --- Transfer Characteristics of an nMOSFET --- p.51 / Chapter 4.9.6 --- Transfer Characteristics of Cascoded and Bare CLBTs Operating as pMOSFETs --- p.52 / Chapter 4.10 --- Summary --- p.53 / Chapter 5 --- Experiments on Matching Properties --- p.54 / Chapter 5.1 --- Introduction --- p.54 / Chapter 5.2 --- Objectives --- p.55 / Chapter 5.3 --- Technology --- p.57 / Chapter 5.4 --- Design of Testing Arrays --- p.57 / Chapter 5.4.1 --- nMOSFET Array --- p.57 / Chapter 5.4.2 --- pnp CLBT Array --- p.59 / Chapter 5.5 --- Design of Input and Output Pads (I/O Pads) --- p.62 / Chapter 5.6 --- Shift Register --- p.62 / Chapter 5.7 --- Experimental Equipment --- p.63 / Chapter 5.8 --- Experimental Setup for Matching Properties Measurements --- p.65 / Chapter 5.8.1 --- Setup for Measuring the Mismatches of the Devices --- p.65 / Chapter 5.8.2 --- Testing Procedures --- p.68 / Chapter 5.8.3 --- Data Analysis --- p.68 / Chapter 5.9 --- Matching Properties --- p.69 / Chapter 5.9.1 --- Matching Properties of nMOSFETs --- p.69 / Chapter 5.9.2 --- Matching Properties of CLBTs --- p.71 / Chapter 5.9.3 --- Matching Properties of pMOSFETs --- p.73 / Chapter 5.9.4 --- "Comments on the Matching Properties of CLBT, nMOSFET, and pMOSFET" --- p.76 / Chapter 5.9.5 --- "Mismatch in CLBT, nMOSFET, and pMOSFET Cur- rent Mirrors" --- p.77 / Chapter 5.10 --- Summary --- p.79 / Chapter 6 --- Conclusion --- p.80 / Chapter A --- Floating Gate Technology --- p.82 / Chapter A.1 --- Floating Gate --- p.82 / Chapter A.2 --- Tunnelling --- p.83 / Chapter A.3 --- Hot Electron Effect --- p.85 / Chapter A.4 --- Summary --- p.86 / Chapter B --- A Trimmable Transconductance Amplifier --- p.87 / Chapter B.1 --- Introduction --- p.87 / Chapter B.2 --- Trimmable Transconductance Amplifier using Floating Gate Com- patible Lateral Bipolar Transistors (FG-CLBTs) --- p.87 / Chapter B.2.1 --- Residual Gate Effect and Collector Current Modulation --- p.89 / Chapter B.2.2 --- Floating Gate CLBTs --- p.92 / Chapter B.2.3 --- Electron Tunnelling --- p.93 / Chapter B.2.4 --- Hot Electron Injection --- p.94 / Chapter B.2.5 --- Experimental Results of the OTA --- p.94 / Chapter B.2.6 --- Experimental Results of the FGOTA --- p.96 / Chapter B.3 --- Summary --- p.97 / Chapter C --- AMI-ABN 1.5μm n-well Process Parameters (First Batch) --- p.98 / Chapter D --- AMI-ABN 1.5μm n-well Process Parameters (Second Batch) --- p.101 / Bibliography --- p.104

by Fong Hon Hang = 超薄二氧化硅的固定電荷分佈和電擊穿特性 / 方漢鏗. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2000. / Includes bibliographical references. / Text in English; abstracts in English and Chinese. / by Fong Hon Hang = Chao bo er yang hua gui de gu ding dian he fen bu he dian ji chuan te xing / Fang Hankeng. / ABSTRACT --- p.i / ACKNOWLEDGEMENTS --- p.iii / TABLE OF CONTENT --- p.iv / LIST OF FIGURES --- p.ix / LIST OF TABLES --- p.xiv / LIST OF SYMBOLS --- p.xv / Chapter Chapter1 --- Background of the thesis work / Chapter 1.1 --- Introduction --- p.1 / Chapter 1.2 --- Stability of charge on oxide --- p.1 / Chapter 1.3 --- Defects in SiO2/Si --- p.2 / Chapter 1.4 --- Objectives of the thesis work --- p.4 / Chapter 1.5 --- Organization of the thesis --- p.5 / Bibliography for Chapter1 --- p.6 / Chapter Chapter2 --- Theory of X-ray Photoelectron Spectroscopy (XPS) and Surface Charge Spectroscopy (SCS) / Chapter 2.1 --- Introduction --- p.7 / Chapter 2.2 --- X-ray photoelectron spectrometry (XPS) --- p.8 / Chapter 2.2.1 --- Binding energy reference for semiconductors --- p.10 / Chapter 2.2.2 --- Measurement of surface Fermi level --- p.15 / Chapter 2.2.3 --- XPS quantitative analysis --- p.17 / Chapter 2.2.3.1 --- Electron Inelastic Mean free Path --- p.16 / Chapter 2.2.3.2 --- Atomic concentration of a homogeneous material --- p.17 / Chapter 2.2.3.3 --- Determination of overlayer thickness --- p.19 / Chapter 2.3 --- Surface charge Spectroscopy (SCS) --- p.21 / Chapter 2.3.1 --- Principle of the SCS technique --- p.21 / Chapter 2.3.2 --- Control of the dielectric surface potential --- p.21 / Chapter 2.3.3 --- Dielectric layer surface potential --- p.22 / Chapter 2.3.4 --- Surface band bending --- p.23 / Chapter 2.3.5 --- Limitation of the dielectric layer thickness --- p.24 / Chapter 2.4 --- Applications of SCS on Metal-Oxide Semiconductor (MOS) --- p.24 / Chapter 2.4.1 --- Measurements of interface state density (Dit) --- p.24 / Chapter 2.4.2 --- Determination of density of fixed-oxide charges --- p.27 / Bibliography for Chapter2 --- p.28 / Chapter Chapter3 --- Instrumentation & methodology / Chapter 3.1 --- X-ray Photoelectron Spectroscopy (XPS) --- p.30 / Chapter 3.1.1 --- General description of the Kratos AXIS - HS XPS system --- p.30 / Chapter 3.1.2 --- X-ray source --- p.32 / Chapter 3.1.3 --- AXIS - HS electron analyzer and transfer lens system --- p.35 / Chapter 3.1.4 --- Laser alignment facility --- p.38 / Chapter 3.1.5 --- In-lens (Micro XPS) aperture --- p.38 / Chapter 3.1.6 --- Iris (Lens input aperture) --- p.39 / Chapter 3.1.7 --- Magnetic immersion lenses --- p.39 / Chapter 3.1.8 --- Lateral resolutions --- p.41 / Chapter 3.1.9 --- Charge neutralizer --- p.53 / Chapter 3.1.10 --- XPS imaging capability --- p.58 / Chapter 3.1.11 --- Angle-resolved X-ray photoelectron spectroscopy (ARXPS) --- p.58 / Chapter 3.1.12 --- Ion sputtering system and depth profiling --- p.59 / Chapter 3.2 --- Methodology for surface charging --- p.59 / Chapter 3.3 --- Sample preparation --- p.61 / Bibliography for Chapter3 --- p.62 / Chapter Chapter4 --- Fixed-oxide charge Qf(z) of thermally-grown SiO2/Si(100) / Chapter 4.1 --- Introduction --- p.63 / Chapter 4.2 --- Experimental results on oxide surface potential as a function of oxide thickness --- p.64 / Chapter 4.3 --- Calculation of fixed-oxide charge distribution --- p.69 / Chapter 4.3.1 --- Gauss's law --- p.69 / Chapter 4.3.2 --- Density of fixed-oxide charge --- p.70 / Chapter 4.4 --- Applications --- p.78 / Bibliography for chapter4 --- p.80 / Chapter Chapter5 --- Observation of dielectric electrical breakdown phenomena of SiO2/Si structure by SCS / Chapter 5.1 --- Introduction to electrical breakdown analysis in device electronics --- p.81 / Chapter 5.2 --- Experimental --- p.82 / Chapter 5.3 --- Results --- p.82 / Chapter 5.3.1 --- Analysis on 1000A Sio2/Si --- p.82 / Chapter 5.3.1.1 --- Variation of C 1s under charging --- p.82 / Chapter 5.3.1.2 --- Stochastic breakdown of SiO2 --- p.84 / Chapter 5.3.2 --- Analysis on 19k SiO2/Si --- p.91 / Chapter 5.4 --- Discussion --- p.93 / Chapter 5.4.1 --- Model of stochastic breakdown of SiO2/Si --- p.93 / Chapter 5.4.2 --- Variation of Si 2p under charging --- p.95 / Chapter 5.5 --- Summary --- p.96 / Bibliography for Chapter5 --- p.99 / Chapter Chapter6 / Conclusion --- p.100

A wide variety of tunable physio-chemical properties make ZnO nanowires a promising candidate for functional device applications. Although bottom-up grown nanowires are producible in volume, their high-throughput device integration requires control over dimensions and, more importantly, of precise placement. Thus development of top-down fabrication routes with accurate device positioning is imperative and hence pursued in this thesis. ZnO thin film transistors (TFT) were fabricated using solution based precursor zinc neodecanoate. A range of ZnO thin films were prepared by varying process parameters, such as precursor concentrations and annealing temperatures, and then analysed for their optical and electrical characteristics. ZnO TFTs prepared from a 15 % precursor concentration and annealing at 700 $^\circ$C exhibited best device performance with a saturation mobility of 0.1 cm$^2$/V.s and an on/off ratio of 10$^7$. Trap limited conduction (TLC) transport was found to be dominant in these devices. A direct-write electron beam lithography (EBL) process was developed using zinc naphthenate and zinc neodecanoate precursors for the top-down synthesis of ZnO nanowires. Nanoscale ZnO patterns with a resolution of 50 nm and lengths up to 25 $\mu$m were fabricated. A linear mobility of 0.5 cm$^2$/V.s and an on/off ratio of $\sim$10$^5$ was achieved in the micro-FETs with 50 $\mu$m channel width. Interestingly, on scaling down the ZnO channel width down to 100 nm, almost two orders of magnitude enhancement in the linear mobility was observed, which reached $\sim$33.75 cm$^2$/V.s. Such increment in the device performance was attributed to the formation of larger grains and thus reduction in the grain-boundary scattering. Six volatile organic compounds (VOCs) were sensed at room temperature using the direct-write EBL fabricated ZnO devices under UV sensitisation. As the surface-to-volume ratio increases with the decreasing channel width (from 50 $\mu$m to 100 nm), sensing response of the ZnO devices becomes more significant. Ppm level detection of various VOCs was observed; with a 25 ppm level Anisole detection being the lowest concentration. Additionally, using 100 nm device, detection of 10 ppm NO$_2$ was achieved at room temperature. The sensing response towards NO$_2$ was found to be increased with UV illumination and sensor temperature. This led to exhibit $\sim$171 % sensing response for a 2.5 ppm level of NO$_2$.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Steven Lee Garverick. / M.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Charles Edward Harm. / M.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Daniel Dean Kessler. / M.S.