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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

High-speed data acquisition and FPGA detected pulse blanking system for interference mitigation in radio astronomy /

Lillrose, Micah A. January 2007 (has links) (PDF)
Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2007. / Includes bibliographical references (p. 79-80).
42

Using duplication with compare for on-line error detection in FPGA-based designs /

McMurtrey, Daniel Lee, January 2006 (has links) (PDF)
Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2006. / Includes bibliographical references (p. 61-63).
43

Optimizing scalar multiplication for Koblitz curves using hybrid FPGAs /

Głuszek, Gregory A. January 2009 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 2009. / Typescript. Includes bibliographical references (leaves 93-95).
44

A novel partial reconfiguration methodology for FPGAs of multichip systems /

Galindo, Juan Manuel. January 2008 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 2008. / Typescript. Includes bibliographical references (leaves 37-40).
45

Design of custom instruction set for FFT using FPGA-based Nios processors

Sunkara, Divya Lakshmi. Meyer-Baese, U. January 2004 (has links)
Thesis (M.S.)--Florida State University, 2004. / Advisor: Dr. Uwe Meyer-Baese, Florida State University, College of Engineering, Dept. of Electrical and Computer Engineering. Title and description from dissertation home page (viewed Sept. 15, 2005). Document formatted into pages; contains ix, 108 pages. Includes bibliographical references.
46

Higher radix floating-point representations for FPGA-based arithmetic /

Catanzaro, Bryan C. January 2005 (has links) (PDF)
Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2005. / Includes bibliographical references (p. 81-86).
47

Design and evaluation of an "FPGA based" hardware accelerator for elliptic curve cryptography point multiplication a thesis presented to the faculty of the Graduate School, Tennessee Technological University /

Gwalani, Kapil A., January 2009 (has links)
Thesis (M.S.)--Tennessee Technological University, 2009. / Title from title page screen (viewed on June 25, 2010). Bibliography: leaves 93-96.
48

Development test suite for FPGA TekBot learning platform /

Lai, Gerald. January 1900 (has links)
Thesis (M.S.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 73-76). Also available on the World Wide Web.
49

AN APPROACH TOWARDS HDL MODEL GENERATION FOR THE MULTI-TECHNOLOGY FIELD PROGRAMMABLE GATE ARRAY

RAMASWAMY, EASWAR SINGANELLORE 03 April 2006 (has links)
No description available.
50

Reconfigurable design for pattern recognition using field programmable gate arrays

Sareen, Aman January 1999 (has links)
No description available.

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