Yuan, Feng. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2009. / Includes bibliographical references (leaves 60-65). / Abstract also in Chinese. / Abstract --- p.i / Acknowledgement --- p.ii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Manufacturing Test --- p.1 / Chapter 1.1.1 --- Functional Testing vs. Structural Testing --- p.2 / Chapter 1.1.2 --- Fault Model --- p.3 / Chapter 1.1.3 --- Automatic Test Pattern Generation --- p.4 / Chapter 1.1.4 --- Design for Testability --- p.6 / Chapter 1.2 --- Pseudo-Functional Manufacturing Test --- p.13 / Chapter 1.3 --- Thesis Motivation and Organization --- p.16 / Chapter 2 --- On Systematic Illegal State Identification --- p.19 / Chapter 2.1 --- Introduction --- p.19 / Chapter 2.2 --- Preliminaries and Motivation --- p.20 / Chapter 2.3 --- What is the Root Cause of Illegal States? --- p.22 / Chapter 2.4 --- Illegal State Identification Flow --- p.26 / Chapter 2.5 --- Justification Scheme Construction --- p.30 / Chapter 2.6 --- Experimental Results --- p.34 / Chapter 2.7 --- Conclusion --- p.35 / Chapter 3 --- Compression-Aware Pseudo-Functional Testing --- p.36 / Chapter 3.1 --- Introduction --- p.36 / Chapter 3.2 --- Motivation --- p.38 / Chapter 3.3 --- Proposed Methodology --- p.40 / Chapter 3.4 --- Pattern Generation in Compression-Aware Pseudo-Functional Testing --- p.42 / Chapter 3.4.1 --- Circuit Pre-Processing --- p.42 / Chapter 3.4.2 --- Pseudo-Functional Random Pattern Generation with Multi-Launch Cycles --- p.43 / Chapter 3.4.3 --- Compressible Test Pattern Generation for Pseudo-Functional Testing --- p.45 / Chapter 3.5 --- Experimental Results --- p.52 / Chapter 3.5.1 --- Experimental Setup --- p.52 / Chapter 3.5.2 --- Results and Discussion --- p.54 / Chapter 3.6 --- Conclusion --- p.56 / Chapter 4 --- Conclusion and Future Work --- p.58 / Bibliography --- p.65

Gao, Xin. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2007. / Includes bibliographical references (leaves 73-74). / Abstracts in English and Chinese. / Table of Contents --- p.vii / Table of Figures --- p.ix / List of Abbreviations --- p.xiii / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Overview --- p.1 / Chapter 1.2 --- Original Contributions --- p.5 / Chapter 1.3 --- Chapter Outlines --- p.5 / Chapter Chapter 2 --- Fundamentals of Stepped-impedance Resonators --- p.7 / Chapter 2.1 --- Introduction --- p.7 / Chapter 2.2 --- Structures of Stepped-impedance Resonators --- p.8 / Chapter 2.3 --- Resonance Conditions Analysis --- p.10 / Chapter 2.4 --- Spurious Resonance Frequencies --- p.12 / Chapter 2.5 --- Applications of Stepped-impedance Resonator Techniques --- p.14 / Chapter Chapter 3 --- Coupled line and Partially Coupled Stepped-impedance Coupled Lines --- p.15 / Chapter 3.1 --- Introduction --- p.15 / Chapter 3.2 --- Coupled Line Model --- p.17 / Chapter 3.3 --- Analysis of Coupled Line --- p.20 / Chapter 3.4 --- Analysis of Partially Coupled Stepped-impedance Coupled Lines --- p.28 / Chapter 3.5 --- Dual Band Properties of Partially Coupled Stepped-impedance Coupled Lines --- p.29 / Chapter Chapter 4 --- A Novel Dual Band Balun Using Partially Coupled Stepped-impedance Coupled Lines --- p.30 / Chapter 4.1 --- Introduction --- p.30 / Chapter 4.2 --- Theory of Balun --- p.31 / Chapter 4.3 --- Analysis of the Proposed Dual Band Baluns --- p.37 / Chapter 4.4 --- Design Case Study for the Proposed Dual Band Balun --- p.43 / Chapter 4.5 --- Discussion --- p.50 / Chapter 4.6 --- Fabrication of a Balun Working at 900 MHz and 1.8 GHz --- p.56 / Chapter Chapter 5 --- Conclusion --- p.61 / Appendix 1 --- p.62 / Bibliography --- p.73

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Thesis (Ph. D.)--Washington State University, December 2007. / Includes bibliographical references (p. 107-112).

Thesis (Ph.D.)--University of Delaware, 2007. / Principal faculty advisor: Fouad Kiamilev, Dept. of Electrical and Computer Engineering. Includes bibliographical references.

The electrical behavior of on-chip interconnects has become a dominant factor in silicon-based high speed, RF, and mixed-signal integrated circuits. In particular, the frequency-dependent loss mechanisms in heavily-doped silicon substrates can have a large influence on the transmission characteristics of on-chip interconnects. To optimize the performance of the integrated circuit, efficient interconnect models should be available in the design environment. Interconnect models in the form of closed-form expressions or ideal element equivalent circuits are often desirable for fast simulation and circuit optimization. This thesis work is concentrated on the analysis and the methodology for developing closed-form expressions for the frequency-dependent line parameters R(��), L(��), G(��), and C(��) for coplanar-type on-chip interconnects on silicon substrates. In addition, the closed-form expressions for the frequency-dependent series impedance parameters are extended to general interconnect on-chip structures on multilayer substrates. The complete solutions of the frequency-dependent line parameters are formulated in terms of corresponding static (lossless) configurations for which closed-form solutions are readily available. The closed-form expressions for the frequency-dependent series impedance parameters, R(��) and L(��), are obtained from a generalized complex image approach together with a surface impedance formulation including the effects of the frequency-dependent horizontal currents (eddy currents) in the multilayer lossy silicon substrates. Results for single and coupled microstrips on multilayer silicon substrates are shown over a broadband frequency range of 20 GHz and compared with full-wave electromagnetic solutions. For single and coupled coplanar on-chip interconnects, the results are compared with quasi-analytical solutions and validated with available measurement data. The frequency-dependent shunt admittance parameters, G(��) and C(��), are derived in terms of low- and high-frequency asymptotic solutions of the equivalent circuit model combined with the complex image method. Comparisons and validation with measurements are also presented. / Graduation date: 2004

The electrical performance of on-chip interconnects has become a limiting factor to the performance of modern integrated circuits including RFICs, mixed-signal circuits, as well as high-speed VLSI circuits due to increasing operating frequencies, chip areas, and integration densities. It is advantageous to have fast and accurate closed-form expressions for the characteristics of on-chip interconnects to facilitate fast simulation and computer-aided design (CAD) of integrated circuits. This thesis work is mainly concerned with the analysis and the methodology of developing closed-form expressions for the frequency-dependent line parameters R(��), L(��), G(��), and C(��) for microstrip-type on-chip interconnects on silicon substrate. The complete solutions of the frequency-dependent line parameters are formulated in terms of corresponding lossless/static configurations for both single and coupled microstrip-type on-chip interconnects. The series impedance parameters are developed using a complex image approach, which represents the complicated loss effects in the semiconducting silicon substrate. The shunt admittance parameters are developed using low- and high-frequency asymptotic solutions based on the shunt equivalent circuit models. The closed-form expressions are shown to be in good agreement with full-wave and quasi-static electromagnetic solutions. Based on the proposed closed-form solutions, a new on-chip interconnect extractor tool, CELERITY, is implemented. It is shown that the new tool can significantly reduce the simulation time compared with a quasi-static EM-based tool. The proposed extraction technique should be very useful in the design of silicon-based integrated circuits. / Graduation date: 2002

Recent advances in high density low cost RF and microwave three dimensional integration technologies using LTCC(Low Temperature Cofired Ceramics), laminate and other multilayer hybrid and integrated circuits have increased interest in the design of embedded passive components such as inductors, capacitors and filters. The purpose of this study is to develop the design methodology of multilayer components such as coupled line filters in a multilevel inhomogeneous medium. Although multilayer assembly including simple components have been used in the past for digital and low frequency systems, RF and microwave circuits have been fabricated mostly in single level configurations. The use of multilayer three dimensional components and circuits makes microwave circuits more compact and the design more flexible. This thesis describes the basic principles and computational procedure for the design of multilayer components such as, planar single and two-level spirals for applications as an inductive elements for RF and MICs, and coupled line band-pass filter circuits consisting of multiple sections. It is shown that both the quality factor and the inductance values can be enhanced by using multilevel spirals. Design methodology for general multisection filter consisting of asymmetric and multiple coupled lines is formulated and presented. It is shown that given the filter specifications, e.g., bandwidth, selectivity, input and output impedances, single, two and multilevel coupled line filters can be physically realized. The design procedure for narrow band filters is formulated in the conventional manner by using the equivalent circuit with admittance inverters and the component values of the low-pass prototype for Butterworth, Chebyshev and other response functions. Examples of Butterworth and Chebyshev multisection filters are included to demonstrate the design procedure. The physical multilevel filter is then optimized by using the SPICE model for coupled multiconductor lines on commercial CAD tool like LIBRA. The optimized multilevel structure design has been validated by MOMENTUM commercial electromagnetic simulator tool. The design methodology is validated by comparing the theoretical results with measurement data for a strip line filter fabricated on FR-4. / Graduation date: 1998