Apresentamos um novo Protocolo de Controle de Transporte fim-a-fim, implementado somente do lado do transmissor, chamado TCP HolyWood ou, abreviadamente, TCP-HW. Em um ambiente de rede cabeada simulada, TCP HolyWood supera em vazão media três dos mais importantes protocolos TCPs já elaborados. Estamos falando de TCP Reno, TCP Westwood, e TCP Vegas; e em variação de retardo media ao TCP Reno bem como ao TCP Vegas. Alem disso, de acordo com o índice de Jain, nossa proposta e tão imparcial quanto o padrão, TCP Reno. / We introduce a new end-to-end, sender side Transport Control Protocol called TCP HolyWood or in short TCP-HW. In a simulated wired environment, TCP HolyWood outperforms in average throughput, three of the more important TCP protocols ever made, we are talking about TCP Reno, TCP Westwood, and TCP Vegas; and in average jitter to TCP Reno and TCP Vegas too. In addition, according to Jain’s index, our proposal is as fair as TCP Reno, the Standard.

Apresentamos um novo Protocolo de Controle de Transporte fim-a-fim, implementado somente do lado do transmissor, chamado TCP HolyWood ou, abreviadamente, TCP-HW. Em um ambiente de rede cabeada simulada, TCP HolyWood supera em vazão media três dos mais importantes protocolos TCPs já elaborados. Estamos falando de TCP Reno, TCP Westwood, e TCP Vegas; e em variação de retardo media ao TCP Reno bem como ao TCP Vegas. Alem disso, de acordo com o índice de Jain, nossa proposta e tão imparcial quanto o padrão, TCP Reno. / We introduce a new end-to-end, sender side Transport Control Protocol called TCP HolyWood or in short TCP-HW. In a simulated wired environment, TCP HolyWood outperforms in average throughput, three of the more important TCP protocols ever made, we are talking about TCP Reno, TCP Westwood, and TCP Vegas; and in average jitter to TCP Reno and TCP Vegas too. In addition, according to Jain’s index, our proposal is as fair as TCP Reno, the Standard.

As redes de distribuição de sinais de tempo - ou redes de sincronismo - têm a tarefa de distribuir os sinais de fase e freqüência ao longo de relógios geograficamente dispersos. Este tipo de rede é parte integrante de inúmeras aplicações e sistemas em Engenharia, tais como sistemas de comunicação e transmissão de dados, navegação e rastreamento, sistemas de monitoração e controle de processos, etc. Devido ao baixo custo e facilidade de implementação, a topologia mestre-escravo tem sido predominante na implementação das redes. Recentemente, devido ao surgimento das redes sem fio - wireless - de conexões dinâmicas, e ao aumento da freqüência de operação dos circuitos integrados, topologias complexas, tais como as redes mutuamente conectadas e small world têm ganhado importância. Essencialmente cada nó da rede é composto por um PLL - Phase-Locked Loop - cuja função é sincronizar um oscilador local a um sinal de entrada. Devido ao seu comportamentamento não-linear, o PLL apresenta um jitter com o dobro da freqüência de livre curso dos osciladores, prejudicando o desempenho das redes. Dessa forma, este trabalho tem como objetivo o estudo analítico e por simulação das condições que garantam a existência de estados síncronos, e do comportamento do jitter de fase nas redes de sincronismo. São analisadas as topologias mestre-escravo e mutuamente conectada para o PLL analógico clássico. / Network synchronization deals with the problem of distributing time and fre- quency among spatially remote locations. This kind of network is a constituent element of countless aplications and systems in Engineering, such as communication and data transmission systems, navigation and position determination, monitoring and process control systems, etc. Due to its low cost and simplicity, the master-slave architec- ture has been widely used. In the last few years, with the growth of the dynamically connected wireless networks and the rising operational frequencies of the integrated cir- cuits, the study of the mutually connected and small world architectures are becoming relevant. Essentially, each node of a synchronization network is constituted by a PLL - Phase-Locked Loop - circuit that must automatically adjust the phase of a local oscillator to the phase of an incoming signal. Because of its nonlinear behavior the PLL presents a phase jitter with the double of the free running frequency of the oscillators, impairing the network performance. Thus, this work aims to study, both analytically and by simulation, the existence conditions of the synchronous states and the behavior of the double frequency jitter in the synchronization networks. Specifically the One Way Master Slave (OWMS) and Mutually Connected (MC) network architectures for classical analogical PLLs are analyzed.

Nowadays mobility is a field of great importance. The fact of travelling or moving should not mean the rupture of the connection to the Internet. And the current objective is not only to be world-wide connected, it is also to be it always through the best available connection (ABC). It means the need to perform vertical handover to switch between different networks, while maintaining the same Internet connection. All this has to be done in a transparent way to the user. In order provide the highest Quality of Experience some tools are needed to enable checking the status and performance of the different available networks, measuring and collecting statistics, in order to take advantage of each one of them. This thesis presents the theoretical base for a measurement module by describing and analysing different metrics, with special emphasis on delay jitter, collecting and comparing different methods, and discussing their main characteristics and suitability for this goal.

The schedule for the jobs in a real-time system can have a huge impact on how the system behave. Since real-time systems are common in safety applications it is important that the scheduling is done in a valid way. Furthermore, one can enhance the performance of the applications by minimizing data latency and jitter. A challenge is that jobs in real-time systems usually have complex constraints making it too time consuming to minimize data latency and jitter to optimality. The purpose of this report is to investigate the possibility of creating high quality schedules using heuristics, with the goal to keep the computational time under one minute. This will be done by comparing three different algorithms that will be used on real scheduling instances provided by the company Arcticus. The first algorithm is a greedy heuristic, the second one a local search and the third one is a metaheuristic, simulated annealing. The results indicate that the data latency can be reduced whilst keeping the computational time below one minute.

De nos jours, la montée en débit observée dans les réseaux mobiles est une problématique. A long terme, la densification des réseaux radios mobiles s'avérera inefficace. En plus de cela cette densification entraînera une baisse de rentabilité des réseaux d'accès mobiles et augmentera la complexité au niveau de la gestion des fréquences mobile qui accroîtra inéluctablement le risque de la présence des interférences. Pour pallier ce manque de rentabilité et pour faciliter le déploiement de certaines techniques d'optimisation et d'amélioration de l'interface air comme le « Coordinated MultiPoint » (CoMP), les acteurs des télécommunications proposent une nouvelle architecture innovante désignée par les termes Mobile Cloud ou « Centralized or Cloud Radio Access Network » (C-RAN). Le C-RAN consiste à déporter l'entité de traitement des données numérisées appelée « Base Band Unit » (BBU) du site d'antenne vers un local plus sécurisé nommé « Central Oce (CO) ». L'entité de traitement radio dénommée « Remote Radio Head (RRH) »est toujours localisée sur le site d'antenne. Cette délocalisation crée un nouveau segment réseau appelé « fronthaul ». Le fronthaul est un segment réseau très gourmand en bande passante par conséquent la fibre est désignée comme le support idéal pour assurer la communication bidirectionnelle entre la RRH et la BBU. Dans notre thèse, nous avons étudié les solutions de déploiement du fronthaul. Etant donné que l'interface fronthaul utilise de grands débits pour la transmission de données numérisées, elle est soumise à un phénomène physique nommé gigue qui a tendance à dégrader les performances de transmission. Les effets et l'impact de la gigue sur l'interface fronthaul et sur l'interface air ont été aussi étudiés. / In Europe, the competition between the mobile operators is so strong that the profitability of the mobile network has decreased. The cost to implement, to operate and to upgrade the mobile network is increasing while the revenues generated by the latter are not sufficient. Therefore, the operators should find the way to reduce the CAPEX and the OPEX. To keep competitive, the operators have begun to think about a novel RAN architecture. This new architecture is called Centralized or Cloud Radio Access Network. The traditional antenna site consists of the Radio Remote Head (RRH) which performs the radio processing, and the Base Band Unit (BBU) which carries out the digital processing. The principle of C-RAN consists to move the BBU from antenna site towards the local secured belonging to an operator called Central Office (CO). The move of BBU from antenna site to CO leads to the appearance of a new network segment called fronthaul. During this thesis, the different solutions to the deployment of fronthaul are studied and also the effects and the impacts of jitter on the fronthaul interface.

Master‘s thesis is focused on basic characteristics of data transmissions in computer networks. In forepart I digestedly described basic characteristics computer networks, metods of their measurement and valuation. Computer networks type LAN as well as wireless computer networks Wifi, are mentioned. In second part I realized my own proposition of basic characteristics measurement. This proposition is used for SW applications development. Main goal of these applications is measurement of packet delay, packet jitter, paket loss and available bandwidth. I described details of SW applications and realized measurement of real computer networks in the end.

This dissertation presents methods for modeling and mitigating voltage noise and timing jitter across high-speed chip-to-chip interconnects. Channel equalization and associated tuning schemes have been developed to target the distinct characteristics and signal degradation exhibited in the clock and data signals of multi-Gigabit/second digital communication links. Multiple methods for generating realistically degraded signals for the purpose of simulation are also presented and used to verify the proposed equalization and filtering topologies. Specifically, a new technique for modeling high-speed jittery clocks in the frequency domain is presented and shown to reduce transient simulation time and memory requirements, while simultaneously improving the timing resolution and accuracy of the simulation by minimizing the dependence on the transient simulation time-step. The technique is further developed to provide unprecedented control over the timing characteristics of the generated signals, and is then extended to the generation of random data signals with definable jitter statistics. Through these techniques,realistic clock and data waveforms are constructible, providing for the visualization of the combined effects of voltage and timing degradation, while at the same time tracking the phase relationship between the clock and data signals as they pass across their respective channels and through the receiving circuitry of the communication link. New methods for the automated tuning of second-order continuous-time channel equalizers are proposed based on the simulated or measured single pulse and double pulse responses of the transmission channel. Using only one degree of freedom, the methods target the reduction of inter-symbol interference (ISI) as identified in the single and double pulses. Through tuning either the circuit quality factor (Q), the peaking frequency, or the frequency zero, the methods are shown to adapt to a variety of channel lengths and datarates from the same original equalizer transfer function, implying a good degree of generality, while offering a simple, yet effective, method for ISI reduction. Finally, the design of an active 5 Gigahertz (GHz) bandpass filter, employed for high-speed clock conditioning, is presented and shown to address both random and deterministic components of the clock signal degradation. The bandpass transfer function is achieved through a combination of AC coupling and a resonant LC tank consisting of on-chip interleaved spiral inductors and a tunable capacitor array. Through adjusting the load capacitance in parallel with the inductors, the center frequency of the filter is tunable over a range of nearly 5GHz. The design targets a supply voltage of 1.2 volts and draws approximately 5.7 milliamps of current.

Monolithic passively mode-locked colliding pulse semiconductor lasers generating pico- to sub-picosecond terahertz optical pulse trains are promising sources for future applications in ultra-high speed data transmission systems and optical measurements. However, in the absence of external synchronization, these passively mode-locked lasers suffer from large amplitude and timing jitter instabilities resulting in broad comb linewidths, which precludes many applications in the field of coherent communications and signal processing where a much narrower frequency line set is needed. In this dissertation, a novel quantum dot based coupled cavity laser is presented, where for the first time, four-wave mixing (FWM) in the monolithically integrated saturable absorber is used to injection lock a monolithic colliding pulse mode-locked (CPM) laser with a mode-locked high-Q ring laser. Starting with a passively mode-locked master ring laser, a stable 30 GHz optical pulse train is generated with more than 10 dB reduction in the RF noise level at 20 MHz offset and close to 3-times reduction in the average optical linewidth of the injection locked CPM slave laser. The FWM process is subsequently verified experimentally and conclusively shown to be the primary mechanism responsible for the observed injection locking. Other linear scattering effects are found to be negligible, as predicted in the orthogonal waveguide configuration. The novel injection locking technique is further exploited by employing optical hybrid mode-locking and increasing the Q of the master ring cavity, to realize an improved stabilization architecture. Dramatic reduction is shown with more than 14-times reduction in the photodetected beat linewidth and almost 5-times reduction in the optical linewidth of the injection locked slave laser with generation of close to transform limited pulses at ~ 30 GHz. These results demonstrate the effectiveness of the novel injection locking technique for an all-on-chip stability transfer and provides a new way of stabilizing monolithic optical pulse sources for applications in future high speed optical networks.

The clock signal is considered as the “heartbeat” of a digital system yet jitter which is a variation on the arrival time of the clock edge, could undermine the overall performance or even cause failures on the system. Deterministic jitter could be reduced during the designing process however random jitter during operation is somehow less-controllable and unavoidable. Being able to remove jitter on the clock would therefore play a vital role in system performance improvement. This thesis implements a 1GHz fully feedforward jitter reduction circuit (JRC) which can be used as an on-chip IP core at clock tree terminals to provide a low jitter clock signal to a local clock network or be used at the clock insertion point to reduce jitter from an off chip signal. It can also be stand-alone and used on PCB designs to reduce jitter on the high-frequency clock signal used on the board. This jitter attenuation circuit is implemented using IBM CMHV7SF 180nm MOSFET process, demonstrates a jitter reduction of at least 8dB at 1GHz with 33ps rms Gaussian random jitter (for a 200ps peak-to-peak randomly changing rising edge input signal).