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Delay-locked loop techniques in direct sequence spread-spectrum receiversThayaparan, Subramaniam. January 1999 (has links)
published_or_final_version / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy
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A Method for Eliminating Skew Introduced by Non-Uniform Buffer Delay and Wire Lengths in Clock Distribution TreesWu, Henry M. 01 April 1993 (has links)
The computation of a piecewise smooth function that approximates a finite set of data points is decomposed into two decoupled tasks: first, the computation of the locally smooth models, and hence, the segmentation of the data into classes that consist on the sets of points best approximated by each model, and second, the computation of the normalized discriminant functions for each induced class. The approximating function is then computed as the optimal estimator with respect to this measure field. Applications to image processing and time series prediction are presented as well.
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A Control Algorithm for Chaotic Physical SystemsBradley, Elizabeth 01 October 1991 (has links)
Control algorithms which exploit the unique properties of chaos can vastly improve the design and performance of many practical and useful systems. The program Perfect Moment is built around such an algorithm. Given two points in the system's state space, it autonomously maps the space, chooses a set of trajectory segments from the maps, uses them to construct a composite path between the points, then causes the system to follow that path. This program is illustrated with two practical examples: the driven single pendulum and its electronic analog, the phase-locked loop. Strange attractor bridges, which alter the reachability of different state space points, can be used to increase the capture range of the circuit.
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Digital phase-locked loops for multi-GHz clock generation /Kratyuk, Volodymyr. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 73-75). Also available on the World Wide Web.
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An equivalent circuit structure macromodel for analog phase locked loopsChoi, Pyung 05 1900 (has links)
No description available.
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Design techniques for PVT tolerant phase-locked loops /Wu, Ting. January 1900 (has links)
Thesis (Ph. D.)--Oregon State University, 2007. / Printout. Includes bibliographical references (leaves 93-97). Also available on the World Wide Web.
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Interference cancellation in broadband wireless systems utilizing phase aligned injection-locked oscillatorsWang, Xin, January 1900 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2008. / Vita. Includes bibliographical references.
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Phase locked loop analysis and designRatcliff, Marcus. Dai, Foster, January 2008 (has links)
Thesis--Auburn University, 2008. / Abstract. Includes bibliographical references (p. 49-50).
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Delay-locked loop techniques in direct sequence spread-spectrum receivers /Thayaparan, Subramaniam. January 1999 (has links)
Thesis (Ph. D.)--University of Hong Kong, 2000. / Includes bibliographical references (leaves 108-114).
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Performance study of uniform sampling digital phase-locked loops for [Pi]/4-differentially encoded quaternary phase-shift keying /Vong, Chun-yin. January 1998 (has links)
Thesis (M. Phil.)--University of Hong Kong, 1999. / Includes bibliographical references (leaves 123-126).
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