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Development and integration of thin film zinc oxide integral resistors in SOPMorales, Hector Roberto 05 1900 (has links)
No description available.
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Warpage characterization and lithographic limitations of FR-4 for SOP global interconnect needsBanerji, Sounak 08 1900 (has links)
No description available.
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Interfacial adhesion and subcritical debonding of low-k dielectrics in flip-chip-packaged copper/low-k interconnect structures /Miller, Mikel Rolf, January 2000 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 165-169). Available also in a digital version from Dissertation Abstracts.
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Comparison of thermal fatigue reliability between SAC and SnPb solders under various stress range conditions /Yang, Chaoran. January 2009 (has links)
Includes bibliographical references (p. 80-84).
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Understanding adhesion issues at underfill - passivation interfaces /McAdams, Brian J., January 2005 (has links)
Thesis (Ph. D.)--Lehigh University, 2005. / Includes vita. Includes bibliographical references (leaves 170-187).
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Thermal management in 3D packagingRavinuthala, Sridhar. January 2008 (has links)
Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Mechanical Engineering, 2008. / Includes bibliographical references.
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Model extraction of a paddle in plastic surface-mount RF-IC packagesSundberg, Garth 17 February 2000 (has links)
Plastic packaging is a cost-effective solution for housing RF and microwave integrated circuits in low cost communication devices. While enabling low cost packaging of integrated circuits, plastic packages including the circuit ground patch (paddle) inside the package can have a significant parasitic effect on circuit performance. The purpose of this thesis is to develop accurate broadband models and associated extraction procedures for the paddle in plastic surface-mount RF-IC packages. Availability of package models will help the RF design engineer to include the packaging effects directly during the circuit design phase.
In this thesis a new lumped element equivalent circuit model for the ground paddle inside a plastic package is presented. The ground paddle is characterized by planar full-wave electromagnetic simulation as well as by measurement of an equivalent paddle test structure. To de-embed the effects of the measurement probes, several test structures are designed. The equivalent circuit parameters for the paddle in a general symmetric 2n-pin plastic package are extracted from a set of measured or simulated two-port scattering parameters. To illustrate the modeling approach, the response of the paddle model for a four-pin and eight-pin plastic package is shown and found to be in good agreement with the measured and
simulated data over a broad frequency range extending beyond 5 GHz. Finally, the extraction of the equivalent circuit model of the paddle through the package lead-frame is demonstrated. / Graduation date: 2000
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Isotropic copper-invar alloys for microelectronics packaging /Cottle, Rand Duprez, January 2000 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2000. / Vita. Includes bibliographical references (leaves 118-119). Available also in a digital version from Dissertation Abstracts.
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In-process stress analysis of flip chip assembly and reliability assessment during environmental and power cycling testsZhang, Jian, January 2003 (has links) (PDF)
Thesis (Ph. D.)--School of Mechanical Engineering, Georgia Institute of Technology, 2004. Directed by Daniel F. Baldwin. / Vita. Includes bibliographical references (leaves 202-210).
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Mechanical and dielectric characterization of electronic grade polymers at subambient temperaturesSinno, Bilal 05 1900 (has links)
No description available.
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