In this thesis, field oriented control of permanent magnet synchronous motors using three-level neutral-point-clamped inverter is studied. Permanent magnet synchronous motors are used in high performance drive applications. In this study, the permanent magnet synchronous motor is fed by three-level neutral-point-clamped inverter. For three-level neutral-point-clamped inverter different space vector modulation algorithms, which are reported in literature, are analyzed and compared via computer simulations. The voltage balance on dc-link capacitors is also analyzed and a software control method is implemented in conjunction with the space vector PWM modulation, utilized. Nonlinear effects such as dead-time, semiconductor voltage drop and delays in gate drive circuitries also present in neutral-point-clamped inverter. The effects of these nonlinearities are studied and a compensation method for these nonlinear effects is proposed. The theoretical results are supported with computer simulations and verified with experimental results.

The high penetration of renewable energy and the emerging concept of micro-grid system raises challenges to the high power conversion techniques. Multilevel converter plays the key role in such applications and is studied in detail in the dissertation. The topologies and modulation techniques for multilevel converter are categorized at first by a thorough literature survey. The pros and cons for various multilevel topologies and modulation techniques are discussed. The 3-level neutral point clamped (NPC) topology is selected to build a 200kVA, 20 kHz power conversion system. The modularized phase leg building block of the converter is carefully designed to achieve low loss and stress for high frequency and high power operation. The switching characteristics for all the commutation loops of 3-level phase leg are evaluated by double pulse tests. The switching performance is optimized for loss and stress tradeoff. A detailed loss model is built for system loss distribution and loss breakdown calculation. Loss and stress for the phase leg and 3-phase system are quantified at all power factors. The space vector modulation (SVM) for 3-level NPC converter is investigated to achieve loss reduction, neutral voltage balance and noise reduction. The loss model and simulation model provides a quantitative analysis for loss and neutral voltage ripple tradeoff. An improved SVM method is proposed to reduce NP imbalance and switching loss simultaneously. This method also ensures an evenly distributed device loss in each phase leg and gives a constant system efficiency under different power factors. Based on the improved modulation strategy, a new modulation scheme is then proposed with largely reduced conduction loss and switching stress. Moreover, the device loss and stress distribution on a phase leg is more even. This scheme also features on the simplified implementation. The improved switching characteristics for the proposed method are verified by double pulse tests. Also the system loss breakdown and the phase leg loss distribution analysis shows the loss reduction and redistribution result. The harmonic filter for the grid interface converter is designed with LCL topology. A detailed inductor current ripple analysis derives the maximum inductor current ripple and the ripple distribution in a line cycle. The inverter side inductor is designed with the optimum loss and size trade-off. The grid side inductor is designed based on grid code attenuation requirement. Different damping circuits for LCL filter are evaluated in detail. The filter design is verified by both simulation and hardware experiment. The average model for the 3-level NPC converter and its equivalent circuit is derived with the consideration of damping circuit in both ABC and d-q frame. The modeling and control loop design is verified by transfer function measurement on real hardware. The control loops design is also tested and verified on real hardware. The interleaved DC/DC chopper is introduced at last. The different interleaving methods and their current ripple are analyzed in detail with the coupled and non-coupled inductor. An integrated coupled inductor based on 3-dimentional core structure is proposed to achieve high power density and provide both CM and DM impedance for the inductor current and output current. / Ph. D.

Conventional 2-level inverters have been quite popular in industry for drives applications. It used pulse width modulation techniques to generate a voltage waveform with high quality. For achieving this, it had to switch at high frequencies and also the switching is between 0 and Vdc. Also additional LC filters are required before feeding to a motor. 3-phase IM is the work horse of the industry. Several speed control techniques have been established namely the V/f control technique and for high performance, vector control is adopted. An electric drive system comprises of a rectifier, inverter, a motor and a load. each module is a topic by itself. This thesis work discusses the novel inverter topologies to overcome the demerits of a conventional 2-level inverter or even the basic multilevel topologies, for an electric drive. The word ‘multilevel’ itself signifies that inverter can generate more than two levels. The idea was first originated by Nabae, Takahashi and Akagi to bring an additional voltage level so that the waveform becomes a quasi square wave. This additional voltage level brought additional benefits in terms of reduced dv/dt and requirement of low switching frequency. But this was not without any cost. The inverter structure is slightly more complicated than a 2-level and also required more devices. But the advantage it gave was superior enough to such an extent that the above topology (popularly known as NPC) has become quite popular in industry. This topology was later modified to equalize the semiconductor losses among switches by replacing the clamping diodes with controllable switches and such topologies are popularly known as Active NPCs (ANPCs) because of the replacement of diodes with active switches. 3-level flying capacitors were then introduced where the additional voltage level is provided using charged capacitors. But this capacitor voltage has to be maintained at its nominal value during the inverter operation. An additional floating capacitor, which is an electrolytic capacitor is needed for this. Increasing the number of electrolytic capacitors reduces the reliability of the inverter drive since they are the weakest link in any inverters and its count has to be kept to the minimum. By using a H-bridge cell in each of the three phases, three voltage levels can be easily obtained.This is commonly known as Cascaded H-bridge (CHB) multilevel inverter. The above three topologies have been discussed with respect to generation of three pole voltage levels and these topologies are quite suited also. A higher number of voltage levels will reduce the switching frequency even lesser and also the dv/dt. On increasing the number of levels further and further, finally the inverter need not do any PWM switching and just generating the levels is sufficient enough for a good quality waveform and also low dv/dt. But when the above topologies are scaled for more than three voltage levels, all of them suffer serious drawbacks which is briefly discussed below. The diode clamped inverter (known as NPC if it is 3-level), when extended to more than three levels suffers from the neutral point balancing issue and also the count of clamping diodes increase drastically. FC inverters, when extended beyond 3-level, the number of electrolytic capacitors increases and also balancing of these capacitors to their nominal voltages becomes complicated. In the case of multilevel CHB, when extended beyond 3-level, the requirement of isolated DC sources also increases. To generate isolated supplies, phase shifting transformer and 8, 12 or 24 pulse diode rectifier is needed which increases the weight , size and cost of the drive. Therefore its application is limited. In this thesis, the aim is to develop a novel method to develop a multilevel inverter without the drawbacks faced by the basic multilevel topologies when scaled for higher number of voltage levels. This is done through stacking the basic or hybrid combination of these basic multilevel topologies through selector switches. This method is experimentally verified by stacking two 5-level inverters through a 2-level selector switch (whose switching losses can be minimized through soft cycle commutation). This will generate nine levels.Generating 9-levels through scaling the basic topologies is disadvantageous, the comparison table is provided in the thesis. This is true for any higher voltage level generation. Each of the above 5-level inverter is developed through cascading an FC with a capacitor fed H-bridge. The device count can be reduced by making the FC-CHB module common to the selector switches by shifting the selector switches between the DC link and the common FC-CHB module. Doing so, reduces the modular feature of the drive but the device count can be reduced. The FFT plot at different frequencies of operation and the switching losses of the different modules-FC, CHB and the selector switches are also plotted for different frequencies of operation. The next step is to check whether this method can be extended to any number of stackings for generation of more voltage levels. For this, a 49-level inverter is developed in laboratory by stacking three 17-level inverters. Each of the 17-level inverter is developed by cascading an FC with three CHBs. When there are 49 levels in the pole voltage waveform, there is no need to do any regular PWM since the output waveform will be very close to a sine wave even without any PWM switching. The technique used is commonly known in literature as Nearest Level Control (NLC). This method of stacking and cascading has the advantage that the FC and the CHB modules now are of very low voltages and the switching losses can be reduced. The switching losses of the different modules are calculated and plotted for different operating frequencies in the thesis. To reduce the voltages of the modules further, a 6-phase machine has been reconfigured as a 3-phase machine, the advantage being that now the DC link voltage requirement is half of that needed earlier for the same power. This further reduces voltages of the modules by half and this allows the switches to be replaced with MOSFETs, improving the efficiency of the drive. This topology is also experimentally verified for both steady state and transient conditions. So far the research focussed on a 3-phase IM fed through a stacked MLI. It can be observed that a stacked MLI needs as many DC sources as the number of stackings. A 6-phase machine apart from reduced DC link voltage requirement, has other advantages of better fault tolerant capability and better space harmonics. They are serious contenders for applications like ship propulsion, locomotive traction, electric vehicles, more electric aircraft and other high power industrial applications. Using the unique property of a 6-phase machine that its opposite windings always draw equal and opposite current, the neutral point (NP) (formed as a result of stacking two MLIs) voltage can be balanced. It was observed that the net mid point current drawn from the mid point can be made zero in a switching interval. It was later observed that with minimal changes, the mid point current drawn from the NP can be made instantaneously zero and the NP voltage deviation is completely arrested and the topology needs only very low capacity series connected capacitors energized from a single DC link. This topology is also experimentally verified using the stacked 9-level inverter topology discussed above but now for 6-phase application and experimental results are provided in the thesis. Single DC link enables direct back to back conversion and power can be fed back to the mains at any desired power factor. All the experimental verification is done on a DSP (TMS320F28335) and FPGA (Spartan 3 XCS3200) platform. An IM is run using V/f control scheme and the above inverter topologies are used to drive the motor. The IGBTs used are SKM75GB123D for the stacked 9-level inverter in the 3-phase and 6-phase experiments. For the 49-level inverter experiment, MOSFETs-IRF260N were used. Both steady state and transient results ensure that the proposed inverter topologies are suitable for high power applications.

Controlling the dynamic outputs of electrical machines has always been an essential topic in aerospace, automotive and other industries. Electrical machine control consists of several components, each of which can be controlled in various ways. Whereas the dynamic responses are mostly simulated using MATLAB/SIMULINK, Prof. Marko Hinkkanen from Aalto University has launched a project for the development of an open-source simulator called ’Motulator’, based on Python. In this thesis, we focus on developing modulation methods and related functions for the inverter in ’Motulator’ based on an existing model of a Permanent Magnet Electrical Machine (PMSM). First, the two-level and three-level inverters with the Space Vector Modulation (SVPWM) method are developed. The dynamic output performance improves significantly compared to Sinusoidal Pulse-Width Modulation (SPWM). In addition, operation under the over-modulation mode for both inverters is implemented to improve the DC-bus voltage utilisation further, allowing higher torques and speeds. The problem of neutral point voltage imbalance is solved for the three-level inverter, ensuring the difference voltage between upper and lower capacitors to fluctuate around 0. Finally, a harmonic analysis tool based on the non-uniform Fourier transform is established. / Styrning och reglering av elektriska maskiners dynamik har alltid varit ett viktigt ämne inom flyg- och bilindustrin men även för andra tillämpningar. Regleringen av elektriska maskiner består av flera delar som var och en kan styras på olika sätt. De dynamiska förhållandena simuleras vanligen i MATLAB/SIMULINK. För att inte vara beroende av kommersiell programvara har Professor Marko Hinkkanen från Aalto universitetet lanserat en simulator med öppen källkod, baserad på Python, kallad ’Motulator’. Examensarbetet fokuserar vi på att utveckla moduleringsmetoder och relaterade funktioner för växelriktaren i ’Motulator’, baserat på en befintlig modell av en permanentmagnetiserad synkronmaskin (PMSM). Först utvecklas två- och trenivåomriktare med ”Space Vector Modulation” (SVPWM). Drivsystemets dynamisk prestanda förbättras därvid avsevärt i jämförelse med Sinus-pulsbreddsstryning (Sinusoidal-PWM). Övermodulering har implementerats för båda växelriktarna i avseende att ytterligare förbättra DC-bussens spänningsutnyttjande, vilket möjliggör högre vridmoment och varvtal. Problemet med nollpunktsspänningens obalans är löst för trenivåomriktaren, vilket säkerställer att skillnadsspänningen mellan de övre och nedre kondensatorerna fluktuerar runt 0. Slutligen har ett verktyg utvecklats i syfte att analysera övertoner, baserat på en olikformig Fouriertransform.

Das Ziel der Arbeit war die Untersuchung eines neuartigen Phasenbausteins mit der Topologie des Dreipunkt – Neutral Point Clamped – Stromrichters mit Spannungszwischenkreis (3L-NPC-VSC) für Windkraftanwendungen. Wichtige Anforderungen an den Phasenbaustein und daraus resultierende Herausforderungen, sowie Lösungen für ausgewählte Teilprobleme werden präsentiert. Um die Vorteile des 3L-NPC-VSC für Hersteller von Windkraftanlagen zugänglich zu machen, ist es sinnvoll, einen neuartigen Phasenbaustein zu entwickeln. Der Phasenbaustein soll einfach in Systeme zu integrieren sein, in denen gegenwärtig Zweipunktstromrichter (2L-VSC) zum Einsatz kommen. Da sich Modulation, Zwischenkreisbalancierung und Kurzschlussschutz vom 2L-VSC unterscheiden, soll der Phasenbaustein diese Herausforderungen eigenständig bewältigen. Die Arbeit beschreibt die Konzeption eines solchen Phasenbausteins und behandelt insbesondere die Modulation, die Zwischenkreisbalancierung und den Kurzschlussschutz des 3L-NPC-VSC. Ein Vergleich verschiedener Modulationsverfahren wurde durchgeführt und die am besten geeigneten Verfahren für die Implementation in den Phasenbaustein ausgewählt. Eine Anforderung war, dass dieser Signale einer übergeordneten Regelung verarbeiten kann, welche für einen 2L-VSC berechnet wurden. Ein Überblick der Zwischenkreisbalancierungsverfahren zeigte, dass nahezu alle den Nachteil einer zusätzlich benötigten Strommessung haben. Die Untersuchung einer neuen an der Professur Leistungselektronik der TU Dresden entwickelten Methode ohne den Bedarf der Strommessung zeigte, dass diese anwendbar ist. Der Algorithmus wurde simuliert, implementiert und experimentell getestet und zeigte gute Resultate. Die Aufgabe eines komplett unabhängigen Kurzschlussschutzes war die schwierigste. Alle möglichen Fehler innerhalb eines Moduls wurden analysiert und kategorisiert. Einige Fehlertypen können innerhalb einer Phase behandelt werden. Entsprechende Algorithmen wurden entwickelt und getestet. Allerdings gibt es Fehlertypen, die nicht durch die Steuerung einer einzelnen Phase behandelt werden können. Eine schnelle Kommunikation zwischen den drei Phasen des Konverters wäre notwendig. Alternativ könnte eine übergeordnete Steuerung diese Fehler behandeln. Zum Schluss wurde ein Demonstrator des Phasenbausteins aufgebaut und experimentell untersucht. Einige Messergebnisse werden gezeigt, um die Funktion zu verifizieren.

Das Ziel der Arbeit war die Untersuchung eines neuartigen Phasenbausteins mit der Topologie des Dreipunkt – Neutral Point Clamped – Stromrichters mit Spannungszwischenkreis (3L-NPC-VSC) für Windkraftanwendungen. Wichtige Anforderungen an den Phasenbaustein und daraus resultierende Herausforderungen, sowie Lösungen für ausgewählte Teilprobleme werden präsentiert. Um die Vorteile des 3L-NPC-VSC für Hersteller von Windkraftanlagen zugänglich zu machen, ist es sinnvoll, einen neuartigen Phasenbaustein zu entwickeln. Der Phasenbaustein soll einfach in Systeme zu integrieren sein, in denen gegenwärtig Zweipunktstromrichter (2L-VSC) zum Einsatz kommen. Da sich Modulation, Zwischenkreisbalancierung und Kurzschlussschutz vom 2L-VSC unterscheiden, soll der Phasenbaustein diese Herausforderungen eigenständig bewältigen. Die Arbeit beschreibt die Konzeption eines solchen Phasenbausteins und behandelt insbesondere die Modulation, die Zwischenkreisbalancierung und den Kurzschlussschutz des 3L-NPC-VSC. Ein Vergleich verschiedener Modulationsverfahren wurde durchgeführt und die am besten geeigneten Verfahren für die Implementation in den Phasenbaustein ausgewählt. Eine Anforderung war, dass dieser Signale einer übergeordneten Regelung verarbeiten kann, welche für einen 2L-VSC berechnet wurden. Ein Überblick der Zwischenkreisbalancierungsverfahren zeigte, dass nahezu alle den Nachteil einer zusätzlich benötigten Strommessung haben. Die Untersuchung einer neuen an der Professur Leistungselektronik der TU Dresden entwickelten Methode ohne den Bedarf der Strommessung zeigte, dass diese anwendbar ist. Der Algorithmus wurde simuliert, implementiert und experimentell getestet und zeigte gute Resultate. Die Aufgabe eines komplett unabhängigen Kurzschlussschutzes war die schwierigste. Alle möglichen Fehler innerhalb eines Moduls wurden analysiert und kategorisiert. Einige Fehlertypen können innerhalb einer Phase behandelt werden. Entsprechende Algorithmen wurden entwickelt und getestet. Allerdings gibt es Fehlertypen, die nicht durch die Steuerung einer einzelnen Phase behandelt werden können. Eine schnelle Kommunikation zwischen den drei Phasen des Konverters wäre notwendig. Alternativ könnte eine übergeordnete Steuerung diese Fehler behandeln. Zum Schluss wurde ein Demonstrator des Phasenbausteins aufgebaut und experimentell untersucht. Einige Messergebnisse werden gezeigt, um die Funktion zu verifizieren.:1 Einleitung 1.1 Motivation 1.2 Zielstellung 1.3 Inhalt der Arbeit 2 Stromrichter für Windkraftanlagen 2.1 Stand der Technik 2.1.1 Zweipunktstromrichter mit Spannungszwischenkreis 2.1.2 Dreipunkt-Neutral-Point-Clamped-Stromrichter mit Spannungszwischenkreis 2.1.3 Kommerziell verfügbare Stromrichter für WKA 2.2 Vollumrichterlösung mit erhöhter Ausgangsspannung 2.2.1 Motivation und Anforderungen 2.2.2 Vereinfachter Vergleich von Zwei- und Dreipunktstromrichtern 2.3 Herausforderungen bei der Realisierung des 3L-NPC-VSC 3 Struktur und Funktion eines neuartigen 3L-NPC-Phasenbausteins 3.1 Struktur und Schnittstellen 3.1.1 Stand der Technik für 3L-NPC Phasenbausteine 3.1.2 Neuartiger 3L-NPC-VSC-Phasenbaustein 3.2 Realisierung 3.2.1 Anforderungen 3.2.2 Technische Realisierung 3.3 Experimentelle Verifikation 3.3.1 Versuchsstand 3.3.2 Messergebnisse 4 Modulation und Zwischenkreisbalancierung eines 3L-NPC-VSC 4.1 Modulationsarten im Überblick 4.1.1 Trägerbasierte Modulation für den 3L-NPC-VSC 4.2 Ausgewählte Modulation für den neuartigen Phasenbaustein 4.2.1 Zweipunktraumzeigermodulation in einem Trägerband 2L-SVM 4.2.2 Dreipunktraumzeigermodulation 3L-SVM 4.3 Stand der Technik bei Zwischenkreisbalancierungsverfahren 4.4 Die direkte Totzeitregelung zur Zwischenkreisbalancierung 4.4.1 Theoretische Grundlagen 4.4.2 Simulative Verifikation der direkten Totzeitregelung 4.4.3 Experimentelle Verifikation der DDTC 5 Kurzschlussschutz eines 3L-NPC-VSC-Phasenbausteins 5.1 Versuchsstand I5.2 Kurzschlussfehler einer 3L-NPC-VSC-Phase 5.2.1 Kategorisierung der Kurzschlüsse 5.2.2 Untersuchte Bauteilfehler innerhalb einer 3L-NPC-VSC-Phase 5.3 Kurzschlussbehandlungsmethoden 5.3.1 Stand der Technik 5.3.2 Schutzmaßnahmen für 3L-NPC-VSC 5.4 Analyse von Kurzschlüssen und Ableitung von Behandlungsmaßnahmen 5.4.1 Fehler eines äußeren IGBTs 5.4.2 Fehler eines inneren IGBTs 5.4.3 Fehler einer Clampdiode 5.5 Maßnahmen zur sicheren Behandlung von Kurzschlüssen in 3L-NPC-VSC 6 Zusammenfassung