The need for high-density power electronics converters becomes more critical by the day as energy consumption continues to grow across the world. Specifically, the need for medium-voltage (MV) high-density converters in power distribution systems, electric ships, and airplanes become more critical as weight and space becomes more a premium. The limited space and footprint require new packaging technologies and methods to develop an integrated power converter. The advancement of wide-bandgap (WBG) devices like silicon carbide (SiC) allows converters to have higher power and faster switching... To benefit from these devices, the packaging of the converter needs to be carefully considered. This thesis presents the design of a 250 kW integrated power electronics building block (iPEBB) for future electric system applications. This work explores the common substrate concept that would serve as the electrical, thermal, and mechanical foundation for the converter. State-of-the-art organic direct-bonded copper (ODBC) is explored to serve as the material foundation for the common substrate. Multi-domain simulations are used to design the integrated SiC bridges to achieve a power loop inductance of 3.5 nH, a maximum temperature of 175 °C, and a weight of 16 kg. ODBC and silicon nitride switching cells are packaged and analyzed in order to see the benefits on a multi-layer design as well as determining electrical and thermal trade-offs. The insights gained from hardware testing will help in the redesign and refinement of the iPEBB. / M.S. / This thesis presents the design of an integrated power electronics building block (iPEBB) for high-density systems. The PEBB concept allows for modular converters that can perform various power conversions. The design begins with exploring state-of-the-art substrates that will serve as the foundation for the iPEBB. Due to the integrated design, the substrate plays a vital role in the thermal, electrical, and mechanical performance, and contributes to the weight and reliability of the iPEBB. State-of-the-art organic direct-bonded copper (ODBC) substrates and multi-layer silicon nitride substrates are explored in this work. The ODBC is used to develop a common substrate for the converter, which allows for a high level of integration between different SiC half-bridges. Switching-cell prototypes based on the ODBC and multi-layer silicon nitride are fabricated to provide insight into the electrical and thermal performance of different substrates. This information will aid in the further redesign and refinement of the iPEBB concept.

The goal of this research is to improve the communications protocol for Dual Ring Power Electronics Systems called PESNet. The thesis will focus on making the protocol operate in a more reliable manner by tolerating Hardware Manager failures and allowing failover among duplicate Hardware Managers within PEBB-based systems. In order to make this possible, two new features must be added to PESNet: utilization of the secondary ring for fault-tolerant communication, and dynamic reconfiguration of the network. Many ideas for supporting fault tolerance have been discussed in previous work and the hardware for PEBB-based systems was designed so support fault tolerance. However, in spite of the capabilities of the hardware, fault tolerance is not supported yet by existing firmware or software. Improving the PESNet protocol to tolerate Hardware Manager failures will increase the reliability of power electronics systems. Moreover, the additional features that are needed to perform failover also allow recovery from link failures and make hot-swap or plug-and-play of PEBBs possible. Since power electronics systems are real-time systems, it is critical that packets be delivered as soon as possible to their destination. The network latency will limit the granularity of time that the control application can operate on. As a result, methods to implement the required features to meet real-time system requirements are discussed and changes to the protocol are proposed. Changing PESNet will provide reliability gains, depending on the reliability of the components that are used to construct the system. / Master of Science

Development of Power Electronic Building Block (PEBB) modules, initiated through the Office of Naval Research (ONR), is a promising enabling technology which will promote future electrical power systems. Key in this development is the thermal design of a PEBB packaging scheme that will manage the module's high heat dissipation levels. As temperatures in electronics are closely associated with operating efficiency and failure rates, management of thermal loads is necessary to ensure proper and reliable device performance. The current work investigates the thermal design requirements for a preliminary PEBB module developed by the NSF Center for Power Electronics Systems (CPES) at Virginia Tech. This module locates four primary heat-generating devices onto a copper bonded substrate in a multi-chip module format. The thermal impact of several design variables (including heat sink quality, substrate material, device spacing, and substrate and metallization thickness) are modeled within the multi-layer thermal analysis software TAMSä. Model results are in the form of metal layer surface temperatures that closely represent the device junction temperatures. Other design constraints such as electrical and material characteristics are also considered in the thermal design. Design results indicate for the device heat dissipation levels that a low resistance heat sink coupled with a high conductivity substrate, such as aluminum nitride, are required for acceptable device junction temperatures. Substrate performance, in the form of a spreading resistance component, will be negatively affected by a lower quality heat sink. Both forced air and cold plate cooling methods were found acceptable; factors such as environment, cost and integration will determine which solution is most feasible. Maximum surface temperatures can be lowered somewhat through adjustment of device spacing. However, this reduction was small compared to the impact on parasitic capacitance. Additionally, there is some thermal benefit to thicker high-conductivity substrates, whereas lower conductivity substrates will increase the maximum surface temperature. Thicker copper layers will prove beneficial though this benefit is not as great for higher conductivity substrates. Also discussed are the on-going and future development efforts that are expected to require thermal consideration. These consist of a top-level thermal bus for additional heat removal, the use of metal matrix composites and concepts for multi-module integration. / Master of Science

Most digital control architectures for power system applications require synchronization with the distribution system voltage. Therefore, a phase-locked loop (PLL), implemented in a DSP, is generally among the digital control blocks of the control system. The PLL analyzes the bus voltage and provides power system information for some of the other blocks to do further calculation. Thus, the performance of the PLL has a broad impact on the system performance. Small-scale power systems, such as naval systems, pose a challenging environment for PLL design due to voltage distortion and variation in the fundamental frequency that is large as compared to large terrestrial systems. Our objective is to improve the accuracy of the PLL digital block and hence enhance the digital control system. This research compares two PLL algorithms, as well as the use of a PI controller or lag controller with respect to their steady state and transient performance.

The U.S. Navy has developed in their ships, and is continually improving, electric propulsion, ship service power, and electric loads. The latest topology under design is the integrated power system (IPS). The IPS entails the all electric ship concept with electric propulsion, direct current (DC) distribution, and modular technology. In the all electric ship concept, ship propulsion and ship service loads are powered by alternating current (AC) generation. For the IPS, power electronics conversion is to be utilized to convert alternating current (AC) generation to direct current (DC) distribution. As state-of-the-art power electronics, the Navy plans to use power electronic building blocks (PEBB) technology in its IPS. A U.S. naval shipboard power system is required to be a highly reconfigurable system to enhance its survivability and reliability. Reconfiguration is a change in the shipboard power system state for various reasons such as new topology, changing missions and emergencies. It was decided to study the behavior of a PEBB-based integrated shipboard power system during reconfiguration. Since no real time operation data was available, the problem was studied through the simulation of reconfiguration scenarios on a scaled-down computer model of an IPS in MATLAB. Reconfiguration scenarios were determined and staged, and an AC/DC power system stability assessment methodology was applied by decoupling the IPS test system around an intrazonal bus. The coupled system of the test IPS, consisted of two dynamic 4160 VAC generators, two rectifiers, two DC-DC converters between the rectifiers' output looped bus and the downstream intrazonal 775V busses, inverters, buck converters, AC loads and DC loads. There was modeling of excitation perturbations which introduced errors in the assessment of the stability requiring an approximation analysis. The study found that the DC bus of interest was stable for all nine reconfiguration scenarios staged, but it found that other busses were not stable for two of the scenarios. The study further found that lower stability margins occurred at lower frequencies of about 1Hz for stable scenarios. It concluded that there were tangible benefits to advancing the shipboard power system architecture to the IPS topology because of the good stability results.

The U.S. Navy has developed in their ships, and is continually improving, electric propulsion, ship service power, and electric loads. The latest topology under design is the integrated power system (IPS). The IPS entails the all electric ship concept with electric propulsion, direct current (DC) distribution, and modular technology. In the all electric ship concept, ship propulsion and ship service loads are powered by alternating current (AC) generation. For the IPS, power electronics conversion is to be utilized to convert alternating current (AC) generation to direct current (DC) distribution. As state-of-the-art power electronics, the Navy plans to use power electronic building blocks (PEBB) technology in its IPS. A U.S. naval shipboard power system is required to be a highly reconfigurable system to enhance its survivability and reliability. Reconfiguration is a change in the shipboard power system state for various reasons such as new topology, changing missions and emergencies. It was decided to study the behavior of a PEBB-based integrated shipboard power system during reconfiguration. Since no real time operation data was available, the problem was studied through the simulation of reconfiguration scenarios on a scaled-down computer model of an IPS in MATLAB. Reconfiguration scenarios were determined and staged, and an AC/DC power system stability assessment methodology was applied by decoupling the IPS test system around an intrazonal bus. The coupled system of the test IPS, consisted of two dynamic 4160 VAC generators, two rectifiers, two DC-DC converters between the rectifiers' output looped bus and the downstream intrazonal 775V busses, inverters, buck converters, AC loads and DC loads. There was modeling of excitation perturbations which introduced errors in the assessment of the stability requiring an approximation analysis. The study found that the DC bus of interest was stable for all nine reconfiguration scenarios staged, but it found that other busses were not stable for two of the scenarios. The study further found that lower stability margins occurred at lower frequencies of about 1Hz for stable scenarios. It concluded that there were tangible benefits to advancing the shipboard power system architecture to the IPS topology because of the good stability results.

Due to close coupling to hardware and lack of software engineering technologies, the control software in digitally controlled power conversion systems is difficult to design and maintain. This is a natural consequence of a topology- or application-driven design approach. This research work proposes a distributed, modular, open control architecture for power conversion systems to reduce control design complexity, encapsulate and localize design dependencies, reduce unnecessary redesign effort and improve software quality. Dataflow style is chosen as the architectural style for the proposed control architecture based on comparative analysis. The detailed implementation of the dataflow architecture is presented. The resulting dataflow control software is evaluated in comparison to the legacy approach to control design used in industry and academia. The dataflow control software for a 3-phase voltage source inverter is also tested on a real PEBB-based converter system. To further explore the flexibility of control composition that is brought by the dataflow approach, the feasibility of dynamic control reconfiguration is also presented as an important future research direction. / Ph. D.

The Power Electronic Building Block (PEBB) concept leads to multifunctional converter systems, which provide robustness and flexibility in heavily power electronics based power systems. Systems comprised of flexible modular converters may have multiple possible operation conditions with respect to individual converters that meet the overall system goals. In this thesis, an optimization method for such flexible online power electronic systems is developed to minimize power losses of the overall group of converters in the system. Here the objective is to allocate sharing such that compensation objectives are met while the power loss of the entire parallel group of compensators is minimized. Considering optimization of an online power electronic system, convergence time and running in the feasible region should be taken into account. This thesis is

Distributed generation (DG) and microgrid will play an essential role in the modern power system. They could improve energy efficiency, reduce losses, minimize environmental impacts and enhance power system reliability and stability. Most of the renewable energy applications would require two or three power conversions before power reaches the loads. If the power from DG could be utilized in DC form, the loss could be minimized and system efficiency is improved. Fuel cell, energy storage battery, photovoltaic and power electronic building block (PEBB) are used in this research to set up a DC microgrid. Simulation and hardware implementation are conducted. Techniques studied in this thesis include different power sources interconnection and DC bus voltage and microgrid power controls. Based on the studied results, DC mircogrid integration and system operation schemes are recommended.

The basic Power Electronics Building Block (PEBB) configurations are identified and conceptual PEBB modules are constructed and tested. Using the INCA (Inductance Calculator) parasitic extraction and the Saber circuit simulation software, the microscopic relationships between the parasitics of the packaging layout and their circuit electrical effects are cross-examined. The PEBB module with advanced packaging techniques is characterized in comparison with the wire-bond module. The soft-switching techniques are evaluated for PEBB applications. The Zero-Current-Transition (ZCT) is proved better because the parasitics in the power current flow path are absorbed into the resonant soft-switching operation. This makes the PEBBs insensitive to system integration. Based on the building block concept, the discrete and large signal average models are developed for simulation, design, and analysis of large-scale PEBB-based systems. New average models are developed for half-bridge PEBB module and Space Vector Modulation (SVM). These models keep the exact information of the discontinuous SVM and the common mode component of the three-phase system. They can be used to construct the computer models of a power electronics system the same as the modularized hardware and perform time domain simulations with very fast speed. Further more, even though the system is modeled based on modularized concept on the ABC coordinates, it can be used to perform small signal analysis on the DQ coordinates as well. Based on the developed models, the system-level interactions in integrated systems are investigated. Three interaction scenarios are presented: (1) the zero-sequence circulation current in paralleled three-phase rectifiers caused by the interleaved discontinuous SVM, (2) the load and source interactions caused by unbalanced load and small signal impedance overlap, and (3) the combined common mode noise caused by both front-end PWM rectifiers and load inverters. The interaction phenomena and mitigation methods are demonstrated through hardware testbed system. The concept of dc bus conditioning is proposed. The bus conditioner is a bi-directional dc/dc converter programmed as a current controlled current source, which shunts the large signal ac current, which otherwise goes to the dc bus, into an isolated energy storage component. In addition to alleviate the source and load interactions, it increases the load impedance/decreases the bus impedance and provides more stability margins to the distribution system. The dc bus conditioner concept and its functions are demonstrated through system simulation and preliminary hardware experiment. / Ph. D.