This thesis is composed of two designs: a PT (process, temperature) detector for 2¡ÑVDD output buffer with slew rate compensation, and a slew rate self-adjusting 2¡ÑVDD output buffer with PVT compensation. In the first topic, a PT detector for 2¡ÑVDD output buffer with slew-rate compensa-tion is proposed. The driving current of 2¡ÑVDD output stages varies provided that the process and temperature conditions are different. For example, the driving current of 2¡ÑVDD output stage will be low at poor PVT corners. By contrast, the driving current will be high at good PVT corners. The process corner and temperature of NMOS and PMOS should be detected by threshold voltage variation thereof, respectively, such that the slew rate compensation is feasible. The proposed sensors will carry out the PT de-tection and compensate the driving current based on the detected corner, such that the slew rate variation of the output stage will be reduced. The second topic is a slew rate self-adjusting 2¡ÑVDD output buffer with PVT compensation. An NMOS and PMOS process detector is proposed to detect the process corners of NMOS and PMOS, respectively, while the voltage and temperature sensor is proposed to detect the voltage and temperature variations by body effect.

Research has demonstrated a close relationship between verbal short-term (STM) and working memory (WM) and receptive language in children (Baddeley, Gathercole, & Papagno, 1998; Ellis & Sinclair, 1996). Few studies have examined the relationship between memory and language production, and these studies focus on STM only. Though correlations have been found between verbal STM and production, the nature of the correlations are unclear. The current study examined the possibility that receptive language mediates the relationship between memory and language production. Children between 3;0 and 5;11 were administered tests assessing receptive vocabulary, receptive grammar, expressive vocabulary, verbal STM, and verbal WM. Additionally, transcripts from free-play sessions were used to assess grammar production. A regression based analytic approach revealed STM and WM mediate the relationship between receptive language and productive language. The existence of these mediated relationships are discussed in relation to the role of working memory in the speech output buffer.

This thesis is composed of two parts : a 3¡ÑVDD bidirectional mixed-voltage-tolerant I/O buffer, and a 2¡ÑVDD output buffer with process and temperature compensation. In the first topic, a 3¡ÑVDD bidirectional mixed-voltage-tolerant I/O buffer, which is able to tolerate 3¡ÑVDD using stacking transistors in the output stage, is proposed. These transistors are biased by corresponding voltage levels which are generated by a dynamic gate bias generator and a floating N-well circuit when transmitting or receiving signals. In order to prevent the input stage transistors from gate-oxide overstress, an NMOS clamping technique is used to block high input voltages. This design can receive and transmit 0.9 V to 5.0 V (0.9/1.2/1.8/2.5/3.3/5.0 V) signals, which has been implemented using TSMC 1P6M 0.18 £gm CMOS process. The second topic shows a 2¡ÑVDD output buffer with process and temperature compensation using 1P6M 0.18 £gm CMOS process. In this design, a novel process and temperature variation detector is proposed to detect the corners of NMOS and PMOS, respectively. The driving capability of the output stage is enhanced at those corners with low output currents. By contrast, the driving currents is reduced at those corners with high output currents to reduce the variation of output slew rate.

Using bandgap engineering, silicon-germanium (SiGe) BiCMOS technology effectively combines III-V transistor performance with the cost and integration advantages associated with CMOS manufacturing. The suitability of SiGe technology for cryogenic and radiation-intense environments is well known, yet SiGe has been generally overlooked for applications involving extreme high temperature operation. This work is an investigation into the potential capabilities of SiGe technology for operation up to 300°C, including the development of packaging and testing procedures to enable the necessary measurements. At the device level, SiGe heterojunction bipolar transistors (HBTs), field-effect transistors (FETs), and resistors are verified to maintain acceptable functionality across the temperature range, laying the foundation for high temperature circuit design. This work also includes the characterization of existing bandgap references circuits, redesign for high temperature operation, validation, and further optimization recommendations. In addition, the performance of temperature sensor, operational amplifier, and output buffer circuits under extreme high temperature conditions is presented. To the author's knowledge, this work represents the first demonstration of functional circuits from a SiGe technology platform in ambient temperatures up to 300°C; furthermore, the optimized bandgap reference presented in this work is believed to show the best performance recorded across a 500°C range in a bulk-silicon technology platform.