In this work, we design parallel Monte Carlo algorithms for the Ising spin model on a hierarchical cluster. A hierarchical cluster can be considered as a cluster of homogeneous nodes which are partitioned into multiple supernodes such that communication across homogenous clusters is represented by a supernode topological network. We consider different data layouts and provide equations for choosing the best data layout under such a network paradigm. We show that the data layouts designed for a homogeneous cluster will not yield results as good as layouts designed for a hierarchical cluster. We derive theoretical results on the performance of the algorithms on a modified version of the LogP model that represents such tiered networking, and present simulation results to analyze the utility of the theoretical design and analysis. Furthermore, we consider the 3-D Ising model and design parallel algorithms for sweep spin selection on both homogeneous and hierarchical clusters. We also discuss the simulation of hierarchical clusters on a homogeneous set of machines, and the efficient implementation of the parallel Ising model on such clusters. / Master of Science

A mobile user may voluntarily disconnect itself from the web server to save battery life and also to avoid the high communication price. To allow web pages to be updated while the mobile user is disconnected from the web server, updates can be staged in the mobile unit and propagated back to the web server upon reconnection. In this thesis, we investigate methods for supporting disconnected write operations and develop a performance model which helps identify the optimal length of the disconnection period under which the cost of update propagation is minimized. We validate the analytic model with simulation in the thesis. We also show how the result can be applied to real-time web applications with a deadline requirement to propagate updates of web pages. The analysis result is particularly applicable to web applications which allow wireless mobile users to modify web contents while on the go. The algorithms that we have developed can be generally applied to other data items such as files and databases. / Master of Science

Throughout her career, the artist and singer Lady Gaga has portrayed a great number of personas in her performances. This thesis uses Gaga’s performances of ”Paparazzi”, ”The Edge of Glory”, and ”Million Reasons” to evaluate how her musical personas have been expressed between 2009 and 2018. Philip Auslander’s theories on musical personas are applied as a tool to examine and analyze Lady Gaga’s use of personas in nine performances. The results of the analysis suggest that, in addition to genre conventions, performance contexts also impacted the adaptations of Gaga’s musical personas. Furthermore, Gaga’s Born This Way Ball tour showcased how a musician can adopt a temporary character tailored for a specific tour plot, suggesting the idea of a “tour persona” as a distinct entity separate from musical personas and song characters. The conclusion drawn from the case study suggests that the term ”persona adjustment” may be more suitable than ”persona development” or ”evolvement” when analyzing changes in musical personas over time. Finally, Gaga's changing personas in this case study challenge Auslander's idea that a performer's persona development relies on longevity and audience negotiation, as Gaga's artistic image is sustained through unpredictable fashion choices and diverse mannerisms.

Performance regression testing is a difficult task with several intricacies and complexities. In the absence of analysis tools, manual analysis must be conducted which is undoubtedly infeasible. Thereby, in this thesis, an automated performance analysis framework is proposed, aiming to mitigate the faced issues. To make this possible, the adequacy of the data needed to be established. Additionally, a fault detection algorithm had to be developed. From investigating the current state-of-the-art of performance anomaly detection, evidently, statistical models have been utilised far more than classical machine learning, and deep learning. Consequently, based on this knowledge and based on the types of anomalies present in the data, a cumulative sum based statistical method is proposed. The findings demonstrate that the data is adequate for detecting faults, and verifying their validity, as they are consistently observable in several test configurations. However, tests are not performed frequently enough which consequently leads to challenges in identifying the exact locations of faults. The algorithm was evaluated on artificial data with injected faults and could detect over 90 % of anomalies if they were prominent enough. Longer sequences before fault deviations occur, improved the ability of detecting the faults. Thus, further motivating the need to collect data more frequently. On a final note, the automated performance analysis framework successfully improved the efficiency of fault detection, and greater contextual data awareness were achieved through the visualization features. Manual analysis can however detect faults with greater accuracy. On that ground, these results should be interpreted with caution.

Efficient usage of file systems poses a major challenge for highly scalable parallel applications. The performance of even the most sophisticated I/O subsystems lags behind the compute capabilities of current processors. To improve the utilization of I/O subsystems, several libraries, such as HDF5, facilitate the implementation of parallel I/O operations. These libraries abstract from low-level I/O interfaces (for instance, POSIX I/O) and may internally interact with additional I/O libraries. While improving usability, I/O libraries also add complexity and impede the analysis and optimization of application I/O performance. This thesis proposes a methodology to investigate application I/O behavior in detail. In contrast to existing approaches, this methodology captures I/O activities on multiple layers of the I/O software stack, correlates these activities across all layers explicitly, and identifies interactions between multiple layers of the I/O software stack. This allows users to identify inefficiencies at individual layers of the I/O software stack as well as to detect possible conflicts in the interplay between these layers. Therefor, a monitoring infrastructure observes an application and records information about I/O activities of the application during its execution. This work describes options to monitor applications and generate event logs reflecting their behavior. Additionally, it introduces concepts to store information about I/O activities in event logs that preserve hierarchical relations between I/O operations across all layers of the I/O software stack. In combination with the introduced methodology for multi-layer I/O performance analysis, this work provides the foundation for application I/O tuning by exposing patterns in the usage of I/O routines. This contribution includes the definition of I/O access patterns observable in the event logs of parallel scientific applications. These access patterns originate either directly from the application or from utilized I/O libraries. The introduced patterns reflect inefficiencies in the usage of I/O routines or reveal optimization strategies for I/O accesses. Software developers can use these patterns as a guideline for performance analysis to investigate the I/O behavior of their applications and verify the effectiveness of internal optimizations applied by high-level I/O libraries. After focusing on the analysis of individual applications, this work widens the scope to investigations of coordinated sequences of applications by introducing a top-down approach for performance analysis of entire scientific workflows. The approach provides summarized performance metrics covering different workflow perspectives, from general overview to individual jobs and their job steps. These summaries allow users to identify inefficiencies and determine the responsible job steps. In addition, the approach utilizes the methodology for performance analysis of applications using multi-layer I/O to record detailed performance data about job steps, enabling a fine-grained analysis of the associated execution to exactly pinpoint performance issues. The introduced top-down performance analysis methodology presents a powerful tool for comprehensive performance analysis of complex workflows. On top of their theoretical formulation, this thesis provides implementations of all proposed methodologies. For this purpose, an established performance monitoring infrastructure is enhanced by features to record I/O activities. These contributions complement existing functionality and provide a holistic performance analysis for parallel scientific applications covering computation, communication, and I/O operations. Evaluations with synthetic case studies, benchmarks, and real-world applications demonstrate the effectiveness of the proposed methodologies. The results of this work are distributed as open-source software. For instance, the measurement infrastructure including improvements introduced in this thesis is available for download and used in computing centers world-wide. Furthermore, research projects already employ the outcomes of this work.

Thesis (MScEng (Mechanical and Mechatronic Engineering))--University of Stellenbosch, 2009. / This thesis describes the development of a vacuum arc thruster (VAT) to be used as a potential low mass (< 500 g), low power (< 5–10W) propulsion system for nanosatellites. The thruster uses a high voltage capacitive circuit to initiate and power the arc process with a 400 ns high current (150–800A) pulse. A one-dimensional steady state analyticalmodel describing the cathode region of the vacuum arc was developed. The model made use of mass and energy balances at the sheath region and cathode surface respectively to predict key quantities such as thrust, ion velocity, ion-to-arc current ratio and erosion rate. Predicted results were shown to be within the limits of reported literature (∼63 μN/A, 26.12 km/s, 0.077 and 110 μg/C respectively). A sensitivity analysis of the analytical model found that a high electric field in the cathode region impedes and decelerates ion flow, which is used for thrust. This was confirmed experimentally for thrust values at arc voltages greater than 2000 V. Both direct and indirect means of measuring thrust were achieved by using a deflecting cantilever beam and an ion collector system, respectively. The transient response of the cantilever beam to impulsive thrust was analytically modeled, whilst the ion current was found by measuring the current induced on a plate subject to ion bombardment. Knowledge of the ion current density distribution was successfully used to approximate the effective normal thrust vector. Direct and indirect thrust levels were roughly 140 and 82 μN/A of average arc current, respectively. Measured thrust was found to be higher than predicted thrust due to thrust contributions fromthe ablation of Teflon insulation. The discrepancy is also due to the uncertainty in quantifying free parameters in the analytical model such as the fraction of generated ions flowing away from the cathode region. The thrust-topower ratio, specific impulse and efficiency of the vacuum arc thruster at an average arc current of 200 A was measured to be 0.6 μN/W, 160 s and 0.05 %, respectively. A thruster performance analysis and specification showed that the VAT is capable of achieving specific orbital and slew manoeuvres within a constant 5–10 W average power. It was concluded that thruster performance could be improved by using a two-stage arc circuit consisting of a high voltage, low current, short pulse trigger and a low voltage, high current, long pulse driver.

Over recent years, wireless communication systems have been experiencing a dramatic and continuous growth in the number of subscribers, thus placing extra demands on system capacity. At the same time, keeping Quality of Service (QoS) at an acceptable level is a critical concern and a challenge to the wireless network designer. In this sense, performance analysis must be the first step in designing or improving a network. Thus, powerful mathematical tools for analysing most of the performance metrics in the network are required. A good modelling and analysis of the wireless cellular networks will lead to a high level of QoS. In this thesis, different analytical models of various handoff schemes and resource re-allocation in homogeneous and heterogeneous wireless cellular networks are developed and investigated. The sustained increase in users and the request for advanced services are some of the key motivations for considering the designing of Hierarchical Cellular Networks (HCN). In this type of system, calls can be blocked in a microcell flow over to an overlay macrocell. Microcells in the HCN can be replaced by WLANs as this can provide high bandwidth and its users have limited mobility features. Efficient sharing of resources between wireless cellular networks and WLANs will improve the capacity as well as QoS metrics. This thesis first presents an analytical model for priority handoff mechanisms, where new calls and handoff calls are captured by two different traffic arrival processes, respectively. Using this analytical model, the optimised number of channels assigned to II handover calls, with the aim of minimising the drop probability under given network scenarios, has been investigated. Also, an analytical model of a network containing two cells has been developed to measure the different performance parameters for each of the cells in the network, as well as altogether as one network system. Secondly, a new solution is proposed to manage the bandwidth and re-allocate it in a proper way to maintain the QoS for all types of calls. Thirdly, performance models for microcells and macrocells in hierarchical cellular networks have been developed by using a combination of different handoff schemes. Finally, the microcell in HCN is replaced by WLANs and a prioritised vertical handoff scheme in an integrated UMTS/WLAN network has been developed. Simulation experiments have been conducted to validate the accuracy of these analytical models. The models have then been used to investigate the performance of the networks under different scenarios.

<p>With the increasing capacity of today's integrated circuits, a number ofheterogeneous  system-on-chip (SoC)  architectures  in embedded  systemshave been proposed. In order to achieve energy and design cost efficientstreaming applications  on these  systems, new design  space explorationframeworks  and  performance  analysis  approaches are  required.   Thisthesis  considers three state-of-the-art  SoCs architectures,  i.e., themulti-processor SoCs (MPSoCs)  with network-on-chip (NoC) communication,the hybrid CPU/FPGA architectures, and the run-time reconfigurable (RTR)FPGAs.  The main topic of the  author?s research is to model and capturethe  application  scheduling,  architecture  customization,  and  bufferdimensioning  problems, according to  the real-time  requirement.  Sincethese  problems  are NP-complete,  heuristic  algorithms and  constraintprogramming solver are used to compute a solution.For  NoC  communication  based  MPSoCs,  an  approach  to  optimize  thereal-time    streaming    applications    with   customized    processorvoltage-frequency levels and memory  sizes is presented. A multi-clockedsynchronous  model  of  computation   (MoC)  framework  is  proposed  inheterogeneous  timing analysis and  energy estimation.   Using heuristicsearching  (i.e., greedy  and  taboo search),  the  experiments show  anenergy reduction (up to 21%)  without any loss in application throughputcompared with an ad-hoc approach.On hybrid CPU/FPGA architectures,  the buffer minimization scheduling ofreal-time streaming  applications is addressed.  Based  on event models,the  problem  has  been  formalized  decoratively  as  constraint  basescheduling,  and  solved  by  public domain  constraint  solver  Gecode.Compared  with  traditional  PAPS  method,  the  proposed  method  needssignificantly smaller  buffers (2.4%  of PAPS in  the best  case), whilehigh throughput guarantees can still be achieved.Furthermore, a  novel compile-time analysis approach  based on iterativetiming  phases is  proposed  for run-time  reconfigurations in  adaptivereal-time   streaming   applications  on   RTR   FPGAs.   Finally,   thereconfigurations analysis and design trade-offs analysis capabilities ofthe proposed  framework have been  exemplified with experiments  on bothexample and industrial applications.</p> / Andres

<p>Recently, wireless sensor network (WSN) has become a promising technologywith a wide range of applications such as supply chain monitoringand environment surveillance. It is typically composed of multiple tiny devicesequipped with limited sensing, computing and wireless communicationcapabilities. Design of such networks presents several technique challengeswhile dealing with various requirements and diverse constraints. Performanceanalysis techniques are required to provide insight on design parametersand system behaviors.</p><p>Based on network calculus, we present a deterministic analysis methodfor evaluating the worst-case delay and buffer cost of sensor networks. Tothis end, three general traffic flow operators are proposed and their delayand buffer bounds are derived. These operators can be used in combinationto model any complex traffic flowing scenarios. Furthermore, the methodintegrates a variable duty cycle to allow the sensor nodes to operate at lowrates thus saving power. In an attempt to balance traffic load and improveresource utilization and performance, traffic splitting mechanisms areintroduced for mesh sensor networks. Based on network calculus, the delayand buffer bounds are derived in non-splitting and splitting scenarios.In addition, analysis of traffic splitting mechanisms are extended to sensornetworks with general topologies. To provide reliable data delivery in sensornetworks, retransmission has been adopted as one of the most popularschemes. We propose an analytical method to evaluate the maximum datatransmission delay and energy consumption of two types of retransmissionschemes: hop-by-hop retransmission and end-to-end retransmission.</p><p>We perform a case study of using sensor networks for a fresh food trackingsystem. Several experiments are carried out in the Omnet++ simulationenvironment. In order to validate the tightness of the two bounds obtainedby the analysis method, the simulation results and analytical results arecompared in the chain and mesh scenarios with various input traffic loads.From the results, we show that the analytic bounds are correct and tight.Therefore, network calculus is useful and accurate for performance analysisof wireless sensor network.</p> / Ipack VINN Excellence Center

With rising complexity of high performance computing systems and their parallel software, performance analysis and optimization has become essential in the development of efficient applications. The comparison of performance data is a key operation required in performance analysis. An analyst may conduct different types of comparisons in order to understand the performance properties of an application. One use case is comparing performance data from multiple measurements. Typical examples for such comparisons are before/after comparisons when applying optimizations or changing code versions. Besides comparing performance between multiple runs, also comparing performance characteristics across the parallel execution streams of an application is essential to detect performance problems. This is typically useful to detect imbalances, outliers, or changing runtime behavior during the execution of an application. While such comparisons are straightforward for the aggregated data in performance profiles, only limited solutions exist for comparing event traces. Trace-based analysis, i.e., the collection of fine-grained information on individual application events with timestamps and application context, has proven to be a powerful technique. The detailed performance information included in event traces make them very suitable for performance analysis. However, this level of detail also presents a challenge because it implies a large and overwhelming amount of data. Currently, users need to perform manual comparison of event traces, which is extremely challenging and time consuming because of the large volume of detailed data and the need to correctly line up trace events. To fill the gap of missing solutions for automatic comparison of event traces, this work proposes a set of techniques that automatically align traces. The alignment allows their structural comparison and the highlighting of differences between them. A set of novel metrics provide the user with an objective measure of the differences between traces, both in terms of differences in the event stream and timing differences across events. An additional important aspect of trace-based analysis is the visualization of performance data in event timelines. This has proven to be a powerful approach for the detection of various types of performance problems. However, visualization of large numbers of event timelines quickly hits the limits of available display resolution. Likewise, identifying performance problems is challenging in the large amount of visualized performance data. To alleviate these problems this work proposes two new approaches for event timeline visualization. First, novel folding strategies for event timelines facilitate visual scalability and provide powerful overviews of performance data at the same time. Second, this work presents an effective approach that automatically identifies and highlights several types of performance critical sections in an application run. This approach identifies time dominant functions of an application and subsequently uses them to analyze runtime imbalances throughout the application run. Intuitive visualizations present the resulting runtime variations and guide the analyst to performance hot spots. Evaluations with benchmarks and real-world applications assess all introduced techniques. The effectiveness of the comparison approaches is demonstrated by showing automatically detected performance issues and structural differences between different versions of applications and across parallel execution streams. Case studies showcase the capabilities of the event timeline visualization techniques by demonstrating scalable performance data visualizations and detecting performance problems and code inefficiencies in real-world applications.