A point-of-load converter was designed for a distributed power architecture using a normally off silicon carbide (SiC) junction field effect transistor (JFET) as the enabling technology. The power supply accepts a 208-V single phase input and generates a +26 V and +10 V output for pulsed loads as well as a +5 V and -5 V auxiliary supplies for digital/control circuitry. This work focuses on the integration of the first normally off SiC JFET to allow for an efficient (≥ 93%), high power density (≥ 100 W/in3) power converter demonstrating higher switching frequency. A switching frequency of 500 kHz was achieved which more than doubles the operating frequency of a reference design with silicon MOSFETs. The power supply design described in this thesis integrates a power factor correction pre-regulator with multiple output Weinberg and flyback converters each utilizing normally off SiC JFETs. Experimental results are presented to validate the design.

This diploma thesis is focused on the LLC resonant power supply with power factor correction. The first part of the thesis is focused on a selection of a suitable controller for the control of this source. Here the emphasis is mainly on efficiency and EMC. The thesis also deals with the design of the scheme and the selection of suitable components. The thesis contains the design of the LLC power supply itself and also the power factor correction circuit - PFC.

A power supply is an essential part of all electronic devices. A switching mode power supply is a light weight power solution for most modern electronic equipment. The high frequency transformer is the backbone of modern switched mode power supplies. The skin effect and proximity effects are major problems in high frequency transformer design, because of induced eddy currents. These effects can result in transformers being destroyed and losing their power transferring function at high frequencies. Therefore, eddy currents are unwanted currents in high frequency transformers. Leakage inductance and the unbalanced magnetic flux distribution are two further obstacles for the development of high frequency transformers. Winding structures of power transformers are also a critical part of transformer design and manufacture, especially for high frequency applications. A new planar transformer with a helical winding structure has been designed and can maintain the advantages of existing planar transformers and significantly reduce the eddy currents in the windings. The maximum eddy current density can be reduced to 27% of the density of the planar transformer with meander type winding structure and 33% of the density of the transformer with circular spiral winding structure at an operating frequency of 1MHz. The voltage ratio of the transformer with helical winding structure is effectively improved to 150% of the voltage ratio of the planar transformer with circular spiral coils. With the evenly distributed magnetic flux around the winding, the planar transformer with helical winding structure is excellent for high frequency switching mode power supplies in the 21st Century.

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ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada / Modern telemetry systems using state of the art field programmable gate arrays (FPGAs) and signal processing components require lower voltage supplies to support various CMOS core geometries while still needing multiple higher voltage rails to support legacy interfaces. Addressing these power supply requirements efficiently requires switching power supply topologies that if left unchecked can generate high input surge currents and high levels of detrimental noise for both the sensitive analog signal processing circuitry and the power supply input source. This paper focuses on the design considerations and tradeoffs associated with implementing an efficient telemetry encoder power supply while mitigating the resulting noise effects typically associated with switching power supplies. This noise can negatively affect the power supply input source and the linear signal processing circuitry within the telemetry encoder.

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No description available.

As semiconductor technology is scaled and voltage level is reduced, the impact of the variation in power supply has become very significant in predicting the realistic worst-case delays in integrated circuits. The analysis of power supply noise is inevitable because high correlations exist between supply voltage and delay. Supply noise analysis has often used a vector-based timing analysis approach. Finding a set of test vectors in vector-based approaches, however, is very expensive, particularly during the design phase, and becomes intractable for larger circuits in DSM technology. In this work, two novel vectorless approaches are described such that increases in circuit delay, because of power supply noise, can be efficiently, quickly estimated. Experimental results on ISCAS89 circuits reveal the accuracy and efficiency of my approaches: in s38417 benchmark circuits, errors on circuit delay distributions are less than 2%, and both of my approaches are 67 times faster than the traditional vector-based approach. Also, the results show the importance of considering care-bits, which sensitize the longest paths during the power supply noise analysis.

Project report (M.S.)--Virginia Polytechnic Institute and State University, 1990. / Vita. Abstract. Includes bibliographical references (leaves 123-124). Also available via the Internet.

In the master´s thesis author deals with simulations of electromagnetic fields and their applications in the electric practice at the design of electromagnetic devices. The first part of thesis deals with 3 electromagnetic field simulation softwares, their comparison and selection of the best software for the practical part of the thesis. The second part contains the practical applications of electrostatic and electromagnetic field simulation of HT power supply.