<p>This thesis discusses design of narrowband low noise amplifiers for multi¬standard applications. The target of this work is to design a low noise ampli¬fier(LNA) for DCS1800 and Bluetooth standard frequency bands. Various designs for narrowband multi-standard LNAs have been studied and a new design for tunable multi-standard LNA has been presented and designed using accumulation mode MOS varactors.</p><p>As this design includes on-chip spiral inductors, the design, modelling and layout of on-chip inductors have been discussed briefly. The tool used for this purpose is ASITIC.</p><p>Also ESD protection techniques for RF circuits and their effect on LNA per¬formance has been discussed.</p><p>Finally fully differential LNA has been designed in O.35um AMS thick metal CMOS process using Cadence SpectreRF. The design also includes ESD pro¬tection at the input of LNA.</p>

Interactive packaging is an emerging research area in recent years. It brings people convenient and smart lives, reduces consumption of traditional packaging materials and direct or indirect labor costs as well. Being integrated in interactive packaging, Radio Frequency Identification (RFID) technology becomes one of the most proactive development enablers. In this paper, an interactive and intelligent packaging solution integrating passive RFID system and Controlled Delamination Material (CDM) is given at first. Package opening action is electrically controlled by the RFID system. CDM is primarily used in aerospace applications in the past and the conductor/adhesive joint can be easily opened by applying a little electric power on to the material. Some related works will be shown about the electrochemical characteristics of CDM in order to facilitate the system design. A demonstration system was developed and the test results have proved feasibility of the solution and shown the potential of low cost for mass production. Based on this solution, an interactive medication package for pervasive healthcare is further developed, using EPCglobal Gen2 RFID technology. It will make the medication being accessible for patient only at the prescribed dose and time, and medication taking information will be delivered as well. Such medication package will not only give unprecedented high patient compliance, but also improve the communication between patients and healthcare staffs. / QC 20111202

The objective of the proposed research is to understand the design and reliability of RF front-end building blocks using SOI CMOS and SiGe BiCMOS technologies for high dynamic-range applications. This research leads to a comprehensive understanding of dynamic range in SOI CMOS devices and contributes to knowledge leading to improvement in overall dynamic range and reliability of RF building blocks. While the performance of CMOS transistors has been improving naturally with scaling, this work aims to explore the possibilities of improvement in RF performance and reliability using standard layouts (that don't need process modifications). The total-ionizing dose tolerance of SOI CMOS devices has been understood with extensive measurements. Furthermore, the role of body contacts in SOI technology is understood for dynamic range performance improvement. In this work, CMOS low-noise amplifier design for high linearity WLAN applications and its integration with RF switch on the same chip is presented. The LNA and switches designed provide state-of-the-art performance in silicon based technologies. Further, the work aims to explore applications of SiGe HBT in the context of highly linear and reliable RF building blocks. The RF reliability of SiGe HBT based RF switches is investigated and compared with CMOS counterparts. The inverse-mode operation of SiGe HBT based switches is understood to give considerably higher linearity.

This thesis work started with an extensive literature study in several areas, ZigBee, instruments and measuring methods. The knowledge was implemented in use with the ZigBee modules from the two manufacturers ITN and Chipcon along with ZigBee Software Stack. Measuring methods were developed and software in ZigBee software Stack was developed to use in the ZigBee modules for the measurements. Developing measurement methods and performing measurements was an iterative process for the different measurements. The aim was to characterize the ZigBee modules in the most important areas during the extent of this master thesis work.

The objective of the research presented in this dissertation is to explore the achievable dynamic range limits in high-performance RF front-ends designed using SiGe HBTs, with a focus on complementary (npn + pnp) SiGe technologies. The performance requirements of RF front-ends are high gain, high linearity, low dc power consumption, very low noise figure, and compactness. The research presented in this dissertation shows that all of these requirements can easily be met by using complementary SiGe HBTs. Thus, a strong case is made in favor of using SiGe technologies for designing high dynamic range RF front-ends. The contributions from this research are summarized as follows: 1. The first-ever comparison study and comprehensive analysis of small-signal linearity (IIP3) for npn and pnp SiGe HBTs on SOI. 2. A novel comparison of large-signal robustness of npn and pnp SiGe HBTs for use in high-performance RF front-ends. 3. A systematic and rigorous comparison of SiGe HBT compact models for high-fidelity distortion modeling. 4. The first-ever feasibility study of using weakly-saturated SiGe HBTs for use in severely power constrained RF front-ends. 5. A novel X-band Low Noise Amplifier (LNA) using weakly-saturated SiGe HBTs. 6. Design and comprehensive analysis of RF switches with enhanced large-signal linearity. 7. Development of novel methods to reduce crosstalk noise in mixed-signal circuits and the first-ever analysis of crosstalk noise across temperature. 8. Design of a very high-linearity cellular band quadrature modulator for use in base-station applications using first-generation complementary SiGe HBTs.

With increased and varied performance demands, it is essential that complex multi-standard radio/systems coexist on a same chip. To have cost and performance benefits, these analog/RF systems are implemented in scaled nanometer nodes. At these nodes, the high level of variability in process variations is making the task of manufacturing high fidelity systems a challenge leading to yield and reliability issues. Hence, in the post-manufacturing phase, test and diagnosis steps are critical to identify the cause and effect of the process variations. Further, intelligent post-manufacturing tuning techniques are required to correct the effect of process variations on analog/RF systems. In this work, a die-level concurrent test and diagnosis approach using optimized measurements obtained in high volume manufacturing environment is proposed for analog/RF circuits. Such a simultaneous test and diagnosis methodology enables monitoring parametric process shifts and providing rapid feedback to the fab to minimize or prevent yield loss. In the case of devices that are continuously operating in the field, an efficient on-line diagnosis approach has been developed to perform reliability related prognosis. For advanced RF technologies such as MIMO-OFDM systems, a rapid system-level testing scheme is presented that performs concurrent testing of the multiple RF chains. Depending on the availability of the computational resources and system tuning knobs, different low-cost methodologies for post-manufacture tuning or self-healing of RF SISO/MIMO systems are developed. These include faster digital monitoring and tuning techniques, on-chip tuning techniques using digital logic that enables die-level self-tuning, and DSP-based power conscious iterative techniques for SISO/MIMO RF systems. An adaptive power-performance tuning technique is developed for those devices that have a post-manufacture power consumption value that is more than the acceptable limit. These intelligent post-manufacturing techniques result in reduced manufacturing cost, improved yield, and reliability of analog/RF systems.

This master thesis deals with the study of ultra low power Low Noise Amplifier (LNA) for use inmedical implant device. Usually, low power consumption is required for a long battery lifetime andlonger operation. The target technology is 90nm CMOS process.First basic principle of LNA is discussed. Then based on a literature review of LNA design, theproposed LNA is presented in sub-threshold region which reduce power consumption through scalingthe supply voltage and through scaling current.The circuit implementation and simulations is presented to testify the performance of LNA .Besides thepower consumption simulated under the typical supply voltage (1V), it is also measured under someother low supply voltages (down to 0.5V) to investigate the minimum power consumption and theminimum noise figure. Evaluation results show that at a supply voltage of 1V the LNA performs a totalpower consumption of 20mW and a noise of 1dB. Proper performance is achieved with a current ofdown to 200uA and supply voltage of down to 0.45V, and a total power consumption of 200uW

This thesis discusses design of narrowband low noise amplifiers for multi¬standard applications. The target of this work is to design a low noise ampli¬fier(LNA) for DCS1800 and Bluetooth standard frequency bands. Various designs for narrowband multi-standard LNAs have been studied and a new design for tunable multi-standard LNA has been presented and designed using accumulation mode MOS varactors. As this design includes on-chip spiral inductors, the design, modelling and layout of on-chip inductors have been discussed briefly. The tool used for this purpose is ASITIC. Also ESD protection techniques for RF circuits and their effect on LNA per¬formance has been discussed. Finally fully differential LNA has been designed in O.35um AMS thick metal CMOS process using Cadence SpectreRF. The design also includes ESD pro¬tection at the input of LNA.

The investigation of liquid crystal polymer (LCP) technology to function as a low-cost next-generation organic platform for designs up to millimeter-wave frequencies has been performed. Prior to this research, the electrical performance of LCP had been characterized only with the implementation of standard transmission lines and resonators. In this research, a wide variety of passive functions have been developed on LCP technology and characterized for the first time. Specifically, we present the development of patch antenna arrays for remote sensing applications, the performance of compact low-pass and band-pass filters up to millimeter-wave frequencies, and the integration of passive elements for X-band and V-band transceiver systems. First, dual-frequency/dual-polarization antenna arrays have been developed on multilayer LCP technology and have been integrated with micro-electro-mechanical-system (MEMS) switches to achieve real-time polarization reconfigurability. These arrays are conformal, efficient and have all the features desirable for applications that require space deployment. Second, a wide variety of filters with different physical and functional characteristics have been implemented on both single and multilayer LCP technology. These filters can be classified based on the filter type (low-pass/band-pass), the resonators used (single-mode/dual-mode), the response characteristics (symmetric/asymmetric), and the structure of the filter (modular/non-modular). Last, examples of integrated modules for use in transceiver systems are presented. This part of the research involves the development of duplexers, radiating elements, as well as their integration. The duplexers themselves are realized by integrating a set of band-pass filters and matching networks. The characterization of the individual components, and of the integrated system are included. This research has resulted in a thorough understanding of LCP's electrical performance and its multilayer lamination capabilities pertaining to its functioning as a material platform for integrated microwave systems. Novel passive prototypes that can take advantage of such multilayer capabilities have been developed.

The objective of this research is to demonstrate the feasibility of the implementation of low-cost, small-size, and high power RF front ends using CMOS technology which has been known not to be suitable for high-power applications due to its material characteristic. One part of this research focuses on developing GaAs switches for multi band and multi mode high power applications. The development of RF front end switches for high power applications using CMOS technology is very challenging in that the characteristics of CMOS technology such as low breakdown voltages, slow electron mobility and existence of substrate junction diodes are limiting power handling capability of CMOS technology. Various topologies of CMOS switches have been employed in implementing high power RF front end CMOS switches in order to overcome material limitations of CMOS technology in high power applications. Based on measurement data such as power handling capability and S-parameters of fabricated CMOS switches, the feasibility of use of CMOS technology in high power RF antenna switch design has been studied, and novel methods of designing CMOS switches to improve the power handling capability without compensating S-parameter performance are proposed. As a part of this research, multi-band and multi-mode power switches using GaAs technology are fabricated and tested for use of the commercial applications such as handsets covering GSM, PCS/DCS, and UMTS bands. Current commercial RF switch products demand small size, low cost and low voltage control as the number of wireless standards integrated in a single application increases. This research provides a solution for commercial products which can meet all the specifications as well as needs required in the wireless market.