ALICE is one of four major experiments of particle accelerator LHC installed in the European laboratory CERN. The management committee of the LHC accelerator has just approved a program update for this experiment. Among the upgrades planned for the coming years of the ALICE experiment is to improve the resolution and tracking efficiency maintaining the excellent particles identification ability, and to increase the read-out event rate to 100 KHz. In order to achieve this, it is necessary to update the Time Projection Chamber detector (TPC) and Muon tracking (MCH) detector modifying the read-out electronics, which is not suitable for this migration. To overcome this limitation the design, fabrication and experimental test of new ASIC named SAMPA has been proposed . This ASIC will support both positive and negative polarities, with 32 channels per chip and continuous data readout with smaller power consumption than the previous versions. This work aims to design, fabrication and experimental test of a readout front-end in 130nm CMOS technology with configurable polarity (positive/negative), peaking time and sensitivity. The new SAMPA ASIC can be used in both chambers (TPC and MCH). The proposed front-end is composed of a Charge Sensitive Amplifier (CSA) and a Semi-Gaussian shaper. In order to obtain an ASIC integrating 32 channels per chip, the design of the proposed front-end requires small area and low power consumption, but at the same time requires low noise. In this sense, a new Noise and PSRR (Power Supply Rejection Ratio) improvement technique for the CSA design without power and area impact is proposed in this work. The analysis and equations of the proposed circuit are presented which were verified by electrical simulations and experimental test of a produced chip with 5 channels of the designed front-end. The measured equivalent noise charge was <550e for 30mV/fC of sensitivity at a input capacitance of 18.5pF. The total core area of the front-end was 2300?m × 150?m, and the measured total power consumption was 9.1mW per channel. / ALICE é um dos quatro grandes experimentos do acelerador de partículas LHC (Large Hadron Collider) instalado no laboratório europeu CERN. Um programa de atualizações desse experimento acaba de ser aprovado pelo comitê gestor do acelerador LHC. Dentro das atualizações planejadas para os próximos anos do experimento ALICE, está melhorar a resolução e eficiência de rastreamento de partículas produzidas em colisões entre íons pesados, mantendo a excelente capacidade de identificação de partículas para uma taxa de leitura de eventos significativamente maior da atual. Para se alcançar esse objetivo, entre outras ações, é preciso atualizar os detectores Time Projection Chamber (TPC), modificando a eletrônica de leitura de eventos, a qual não é adequada para esta migração. Para superar esta limitação tem sido proposto o projeto, simulação, fabricação, teste experimental e validação de um ASIC protótipo de aquisição de sinais e de processamento digital chamado SAMPA, que possa ser usado na eletrônica de detecção dos sinais no cátodo do TPC, que suporte polaridades negativas de tensão de entrada e leitura continua de dados, com 32 canais por chip, com menor consumo de potência comparado com a versão anterior do chip. Este trabalho tem como objetivo o projeto, fabricação, e teste experimental de um readout front-end em tecnologia CMOS 130nm, com polaridade configurable (positiva/ negativa), peaking time e sensibilidade, de forma que o novo SAMPA ASIC possa ser usada em ambos detectores. Para obter um ASIC integrando 32 canais por chip, o projeto do front-end proposto precisa ter baixa área e baixo consumo de potência, mas ao mesmo tempo requer baixo ruido. Neste sentido, uma nova técnica para melhorar a especificação de ruido e o PSRR (Power Supply Rejection Ratio) sem impacto no consumo de área e potência é proposta neste trabalho. A análise e as equações do circuito proposto são apresentadas as quais foram validadas por simulação e teste experimental de um circuito integrado com 5 canais do front-end projetado. O Equivalent Noise Charge medido foi <550e para uma capacitance do detector de 18.5pF. A área total do front-end foi de 2300?m × 150?m, e o consumo total de potencia medido foi de 9.1mW por canal.

No description available.

Josephson junction qubits are promising candidates for a scalable quantum processor. Such qubits are commonly manipulated by means of sequences of rf-pulses and different methods are used to determine their quantum state. The readout should be able to distinguish the two qubit states with high accuracy and be faster than the relaxation time of the qubit. We discuss and experiment with a readout method based on the switching of a Josephson junction from the zero voltage state to a finite voltage state. The Josephson junction circuit has a non-linear dynamics and when it is brought to a bifurcation point, it can be made arbitrarily sensitive to small perturbations. This extreme sensitivity at a bifurcation point can be used to distinguish the two quantum states if the topology of the phase space of the circuit leads to a quick separation into the final states where re-crossings of the bifurcation point are negligible. We optimize a switching current detector by analyzing the phase space of a Josephson junction circuit with frequency dependent damping. A pulse and hold technique is used where an initial current pulse brings the junction close to its bifurcation point and the subsequent hold level is used to give the circuit enough time to evolve until the two states can be distinguished by the measuring instrument. We generate the pulse and hold waveform by a new technique where a voltage step with following linear voltage rise is applied to a bias capacitor. The frequency dependent damping is realized by an on-chip RC-environment fabricated with optical lithography. Josephson junction circuits are added on by means of e-beam lithography. Measurements show that switching currents can be detected with pulses as short as 5 ns and a resolution of 2.5% for a sample directly connected to the measurement leads of the cryostat. Detailed analysis of the switching currents in the RC-environment show that pulses with a duration of 20 us can be explained by a generalization of Kramers' escape theory, whereas switching the same sample with 25 ns pulses occurs out of thermal equilibrium, with sensitivity and speed adequate for qubit readout. / QC 20100924

This thesis consists of two topics. We proposed a low power half-run RC5 cipher for portable biomedical devices in the first part of this thesis. The second topic is to realize a frequency-shift readout system for FPW-based biosensors. In the first topic, a half-round low-power RC5 encryption structure is proposed. To reduce hardware cost as well as power consumption, the proposed RC5 cipher adopts a resource-sharing approach, where only one adder/subtractor, one bi-directional barrel shifter, and one XOR with 32-bit bus width are used to carry out the entire design. Two data paths are switched through the combination of four multiplexers in the encryption/decryption procedure. For the sake of power reduction, the clock in the key expansion can be turned off when all subkeys are generated. In the second topic, an IgE antigen concentration measurement system using a frequency-shift readout method for a two-port FPW (flexural plate-wave) allergy biosensor is presented. The proposed frequency-shift readout method adopts a peak detecting scheme to detect the resonant frequency. A linear frequency generator, a pair of peak detectors, two registers, and an subtractor are only needed in our system. According to the characteristics of the FPW allergy biosensor, the frequency sweep range is limited in a range of 2 MHz to 4 MHz. The precision of the measured frequency is proved to the 4.2 kHz/mV, which is for better than that of existing designs.

No description available.

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DNA nucleases are essential for various biological functions such as replication, recombination, and repair. Restriction endonucleases (REs) are excellent model system for the investigation of DNA recognition and specificity. SgrAI is a type IIF RE that cuts an 8 base pair primary sequence. In addition to its primary cleavage activity it also cleaves secondary sequences, but only appreciably in the presence of the primary sequence. The longer flanking DNA exhibits much greater activated DNA cleavage by SgrAI (>1000 fold activation by secondary site). Interestingly, the asymmetric cleavage seen in one of the two types of secondary site DNA is lost upon activation of SgrAI, suggesting a loss of communication between DNA recognition and activity upon specificity expansion. The structure of SgrAI bound to 22-1HT supports the cryoelectron microscopy structure of activated, oligomeric SgrAI highlighting the significance of the contacts made by the flanking DNA and the role played by N-terminal domain contacts in forming the run-on oligomer. The biological study suggests that the run-on oligomer formation sequesters the host DNA from being cleaved by the activated SgrAI complex. The DNA sequence binding, cleavage preference, and the structure of K96A SgrAI were determined. Unexpectedly, this mutation did not alter the structure of the enzyme, nor did it result in an enzyme lacking sequence preference at the 7ᵗʰ position. Instead, the largest effect of the mutation appears to be in making the enzyme more specific such that it fails to cleave either type of secondary site. It may be that the K96 side chain is required to distort the non YG sequences (specifically GG and TC) of secondary site DNA for proper positioning in the enzyme active site upon activation and specificity expansion. The crystal structure of Mk0566, XPG homologue from M. kandleri, was solved to 2.48 Å resolution and was found to be very similar to that of human FEN-1 and to other archaeal FEN-1/XPG homologues. These results suggest that the main biological role of Mk0566 is in DNA replication; however, they do not preclude involvement in a modified form of nucleotide excision repair.

The gravitational wave observatory and many other large ground-based instruments need to be decoupled from the Earth’s ever-present motion to improve their performance. In such scenarios, inertial sensors which measure the ground motion are necessary, especially those with a high resolution and a large dynamic range. This thesis aims to develop high performance inertial sensors which outperform the commercially available ones in terms of resolution and dynamic range in low frequency down to 0.01 Hz.Inertial sensors essentially consist of two parts: a single-degree-of-freedom mechanism and a transducer which converts mechanical quantities into electrical quantities. In this work, a novel interferometric readout based on homodyne quadrature interferometer is proposed and examined. Experimental results show that its resolution is 1e-11, 1e-12 and 2e-13 m/rtHz at 0.01, 0.1 and 1 Hz respectively. For the mechanical parts, the leaf spring pendulum and Lehman pendulum are used respectively as the restoring springs for the vertical and horizontal inertial sensors. With these, the resonance frequencies are made to 0.26 and 0.11 Hz, respectively. Combined with the interferometric readout, a Vertical Interferometric Inertial Sensor (VINS) and a Horizontal Interferometric Inertial Sensor (HINS) are developed. They are placed together in a vacuum chamber as an inertial unit to measure vertical and horizontal motion.A critical investigation of the developed HINS and VINS is performed. The passive VINS and HINS are compared, firstly, with a commercial seismometer (Guralp 6T) the results showed that they provide equivalent seismograms in frequencies from tides to 10 Hz. Secondly, both simulations and measurements have been conducted in this study, a noise budget of the interferometric readout itself was constructed, which corresponds to the case when the proof-mass of the inertial sensors is blocked. At present, the resolution of the interferometric readout is found to be limited by the photodetector noise from 0.01 to 1 Hz. Moreover, huddle tests were conducted for the inertial units to examine their overall performance. However, extra experiments and simulations are performed and it is found that the resolution identified from the experimental means is worse than that from the simulation. Nevertheless, the mismatch can be reduced by reducing the magnitude of input ground vibration, by reducing undesired inputs and improving the stability of the interferometric readout output signal. / Doctorat en Sciences de l'ingénieur et technologie / info:eu-repo/semantics/nonPublished

In preparation for the High-Luminosity Large Hadron Collider (HL-LHC) at CERN, the Compact Muon Solenoid (CMS) Detector is undergoing a series of upgrades to its existing infrastructure, and is adding in several completely new subdetector systems. The first of these new systems, called GE1/1, is a series of 144 gas electron multiplier (GEM) detectors, arranged as 36 two-detector "superchambers" in each of the muon endcaps of CMS. These detectors are a subtype of micropattern gas detectors, and consist of three layers of "GEM foils", thin sheets of polyimide coated with 5 um of copper on each side and chemically etched with holes of 50 - 70 um diameter at a pitch of 140 um. These layers are stacked on top of a printed circuit board (PCB) readout and sealed within a gastight volume that is filled with Ar:CO2 70:30, and a high voltage is applied to the foils to create electric fields within the GEM detectors. When a muon enters the detector and ionizes the gas within, the ionized electrons encounter these fields and multiply in Townsend avalanches at each successive foil layer, until they are read out at the readout PCB at a gain of ~10^4. In early 2017, a demonstrator system known as the "slice test" was installed into the negative endcap. Consisting of 10 GEM detectors, the two-year-long slice test served as both a proof of concept for the GE1/1 system and an invaluable learning experience that would permanently impact not only the GE1/1 project, but future GEM systems GE2/1 and ME0 as well. During the slice test, it was observed that readout channels were being lost in the course of operation to such a degree that the operational lifetime of the system was in serious jeopardy. These losses were attributed to damage to the front-end readout ASIC (VFAT) inputs, caused propagating electrical discharges within the detectors, and a dedicated campaign to study the discharges was launched. The results of this study will be presented in this dissertation. A campaign to mitigate these discharges and their resulting damage was launched. In order to protect the sensitive VFAT from damage, several external protection circuits were proposed and thoroughly tested. The results of these tests, which are presented herein, determined that a series of resistors totaling 470 Ohms would be installed on the VFAT hybrid. When coupled with an additional 200 kOhm resistor on the HV filter, this reduced the probability of damage following a discharge from 93% to 3% As GE2/1 and ME0 are not due to be installed for another few years, more complex discharge-prevention measures can be put into place. As such, the following measures have been examined, and results will be discussed herein: A new, larger VFAT hybrid is being manufactured, whose larger surface area can accommodate more robust protection circuits than those considered and used for GE1/1. As well, double-segmented GEM foils, in which both the top and bottom of each foil is segmented into < 100 cm^2 sectors that are separated by resistors, were examined for use in the detectors. These double-segmented foils were found to introduce a cross-talk signal in the detectors that results in false signals being treated as true signals, which causes a saturation of the GEM bandwidth and results in unwanted dead time. These cross-talk signals, as well as the compromises made to reduce the cross-talk while maintaining robust discharge prevention, will be discussed. / Doctorat en Sciences / info:eu-repo/semantics/nonPublished

Over the past two decades, Micro-Electro-Mechanical System (MEMS) based accelerometers, benefiting from relatively simple structure, low-power consumption, high sensitivity, and easy integration, have been widely used in many industrial and consumer electronics applications. For the high precision accelerometers, a significant technical challenge is to design a low-noise readout circuit to guarantee the required high resolution of the entire integrated system. There are three main approaches for improvement of the noise and offset of the readout circuit, namely auto-zero (AZ) and correlated double sampling (CDS) for the switched- capacitor (SC) circuit and chopper stabilization (CHS) for the continuous-time circuit. This thesis investigates the merits and drawbacks of all three techniques for reading the capacitance of a low noise MEMS accelerometer developed in our group. After that, we compare the different effects of the three technologies on noise, offset, output range, linearity, dynamic range, and gain. Next, we present the design of the most suitable structure for our sensor to achieve low noise, low offset, and high precision within the working frequency. In this thesis, the design and post-layout simulation of the circuit is proposed, and the fabrication is currently in progress. The readout circuit has reached the noise floor of the sub-μg, which meets the strict requirements of low noise MEMS capacitance-to-voltage converter. A high-performance accelerometer system is regarded as the core of a low-noise, high-resolution geophone. We show that together with the MEMS accelerometer sensor, the readout circuit provides competitive overall system noise and guarantees the required resolution.