In large-scale distributed memory multiprocessors, communication latency scaleup is the bottleneck of the overall system performance. Router design is the major factor that affects system communication performance. On a medium level of communication workload, queuing delay due to congestion can drastically increase communication latency. In this research, we designed a router of a globally adaptive routing method. The routing method polls traffic states in the mesh interconnection network. Based on the polled traffic information, it performs congestion-reduction routing and improves communication latency on a medium level of communication workload. The method partitions a mesh into a hierarchical structure to facilitate traffic state polling and routing at various levels of routing regions. The method adopts two detailed routing methods : look-around routing and parallel approximate maze routing, in order to make congestion-avoidance routing decisions at corresponding levels of routing regions. In this research, we proposed a system design of its router design. In addition, we added a multicast routing function and a fault-tolerance capability into the system design. We utilized system simulation of its hardware architectonic to compare the congestion-reduction capabilities of the router design and other commonly used router designs such as the minimal router, and thin overall communication performance.

Weingarten, Diplomarbeit, 2007.

ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada / One of the core philosophies of the integrated Network Enhanced Telemetry (iNET) project is to leverage standard networking technologies whenever possible to both reduce development cost and to allow standard networking applications to function. This also provides the best long-term scalability to new unforeseen applications, much as the Internet has grown through its open standards. Unfortunately, the radio frequency (RF) channel characteristics do not fully lend themselves to the typical physical layer approaches utilized by IP technologies. As such, the iNET program has developed a specialized communication link management control. But, combining this specialized link management approach with the standardized IP infrastructure on the range and test article provides some challenges. The program has chosen a method to encapsulate the special concepts within a set of components that together (at their boundaries) form a classic router. Construction of this router is quite unique in that portions of it are geographically separate: antenna sites, test article, and mission control room. This paper describes the construction of what the program calls a "virtual router" and explains the performance issues that required it.

A cluster-based router is a new router architecture that is composed of a cluster of commodity processing nodes interconnected by a high-speed and low-latency network. It inherits packet processing extensibility from the software router, and forwarding performance scalability from clustering. In this thesis, we describe a prototype cluster-based router, including the design of the cluster-based router architecture and the addressing of critical issues such as the design of a highly efficient communication layer, reduction of operating system overheads, buffer recycling and packet packing. By experimental evaluation, we expose its forwarding capacity scalability and latency variance. We also evaluate and analyze the potential hardware bottlenecks of its commodity processing nodes, and present the correlation between the reception and transmission capabilities of an individual port as well as ports on the same bus. We propose an adaptive scheduling mechanism based on system state information to manage the adverse effect of this correlation on the router performance. We also investigate internal congestion in the cluster-based router. To manage the internal congestion, we propose two backward explicit congestion notification schemes: a novel queue scheduling method and an optimal utility-based scheme. We show the effectiveness of these schemes either by ns-3 simulation, experimental evaluation, or both. We also analyze the stability of the optimal utility-based BECN internal congestion control scheme through theoretical proof, simulation and experimental evaluation.

The increase in the number of cores that can be integrated on a single chip has forced the designer to use computer network concepts for design of System on Chip (SoC). This idea led to development of Network on Chip (NoC) to deal with more cores on a single chip. NoC has three main parts, namely routers, link and network interface through which cores are connected to NoC. Router is one of the most important parts because cores communicate with other cores through routers. One of the important tasks for a NoC designer is to design router with low latency.Router design depends on the routing protocol and routing algorithm used. Two kinds of routing algorithms are source routing and distributed routing. In source routing, complete route information is available in Head flit while in distributed routing, routing decisions are taken inside every router on the path. Source routing has speed advantage over distributed routing because the packet itself contains the routing information. But source routing leads to overhead to store complete path information in the header of each packet. To overcome this flaw, junction based source routing has been introduced. If destination is far away from the source then first packet will go to a junction and get the new path information from the junction to the destination. Thus we need to store the path information only for a few hops in the packet header. This idea has been taken from the daily experience of train journey. In this thesis we have developed design of a router for junction based source routing. Main component of simple router includes buffering, header modification and making route decision. Router includes a table called Path Table which stores information about paths from junction to various destinations. JB router also includes, picking up the new path information from Path Table and modify the header by adding new path information.We have developed VHDL designs of two versions of the routers for Junction Based Routing. The delay performance of routers have been analysed through simulation. A simple prototype of the router has also been implemented in Altera FPGA to find out the resource requirements of the new router designs.

Abstract In large-scale distributed multiprocessor systems, communication delay becomes the bottleneck of system performance. A main factor which affects communication delay is the adopted routing method and the router design light traffic, the queuing delay can be increased drastically due to message congestion. We have developed a hierarchical globally adaptive routing method. The method can poll global traffic status. According to the traffic status, it can select a routing path congestion which can alleviate. Therefore, the queuing delay due to congestion can be reduces significantly non-light traffic globally. We also developed two detail routing methods applied at different hierarchical routing levels¡Gthe look around routing method and the parallel approximate maze routing method. They can avoid selecting a routing path via congested regions as much as possible. In this research, we designed a performance simulator of the globally adaptive mesh router. We also provided a traffic with the different levels of non-uniform traffic distribution. We utilized the performance simulator to exercise minimal routing, adaptive routing and our globally adaptive routing methods. The experiment results show that our globally adaptive method obtains significant performance improvement in non-light traffic.

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Tese de mestrado integrado. Engenharia Electrotécnica e de Computadores - Major de Telecomunicações. Faculdade de Engenharia. Universidade do Porto. 2008

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Recent research results on buffer sizing challenged the widely used assumption that routers should buffer millions of packets. These new results suggest that when smooth Transmission Control Protocol (TCP) traffic goes through a single tiny buffer of size O(logW), then close-to-peak throughput can be achieved where W is the maximum window size of TCP flows. But the current routers have the buffer size much larger than that. It is shown that, we can reduce the buffer size by a factor of √N when the traffic is somehow smooth, where N is the number of flows. So, the main goal of this thesis is to show some directions on how the buffer size can be reduced in Internet routers. In this research, we adopted some measures like different packet sizes, different network scenarios, different buffer sizes, various link delays to see the performance of small buffers with the presence of both TCP and UDP traffic. / Graduate