Context. Test Automation is a technique followed by the present software development industries to reduce the time and effort invested for manual testing. The process of automating the existing manual tests has now gained popularity in the Telecommunications industry as well. The Telecom industries are looking for ways to improve their existing test methods with automation and express the benefit of introducing test automation. At the same time, the existing methods of testing for throughput calculation in industries involve measurements on a larger timescale, like one second. The possibility to measure the throughput of network elements like routers on smaller timescales gives a better understanding about the forwarding capabilities, resource sharing and traffic isolation in these network devices. Objectives. In this research, we develop a framework for automatically evaluating the performance of routers on multiple timescales, one second, one millisecond and less. The benefit of introducing test automation is expressed in terms of Return on Investment, by comparing the benefit of manual and automated testing. The performance of a physical router, in terms of throughput is measured for varying frame sizes and at multiple timescales. Methods. The method followed for expressing the benefit of test automation is quantitative. At the same time, the methodology followed for evaluating the throughput of a router on multiple timescales is experimental and quantitative, using passive measurements. A framework is developed for automatically conducting the given test, which enables the user to test the performance of network devices with minimum user intervention and with improved accuracy. Results. The results of this thesis work include the benefit of test automation, in terms of Return on Investment when compared to manual testing; followed by the performance of router on multiple timescales. The results indicate that test automation can improve the existing manual testing methods by introducing greater accuracy in testing. The throughput results indicate that the performance of a physical router varies on multiple timescales, like one second and one millisecond. The throughput of the router is evaluated for varying frame sizes. It is observed that the difference in the coefficient of variance at the egress and ingress of the router is more for smaller frame sizes, when compared to larger frame sizes. Also, the difference is more on smaller timescales when compared to larger timescales. Conclusions. This thesis work concludes that the developed test automation framework can be used and extended for automating several test cases at the network layer. The automation framework reduces the execution time and introduces accuracy when compared to manual testing. The benefit of test automation is expressed in terms of Return on Investment. The throughput results are in line with the hypothesis that the performance of a physical router varies on multiple timescales. The performance, in terms of throughput, is expressed using a previously suggested performance metric. It is observed that there is a greater difference in the Coefficient of Variance values (at the egress and ingress of a router) on smaller timescales when compared to larger timescales. This difference is more for smaller frame sizes when compared with larger frame sizes.

[Abstract]: This is a project to implement a Mice and Elephants queueing discipline, which favoursshort flows over long flows, on Linux. The project has three aims. The first aim is toproduce a prototype Mice and Elephants router for the purpose of further evaluation ofthe Mice and Elephants strategy and the Shortest Job First strategy. The second aim is tomake a contribution to Linux by making my implementation as code that is both fit fordistribution with Linux and useful in a small business or domestic setting. The third aimis to explore and document a method of creating Linux queueing disciplines in general.

This thesis investigates distributed router architectures and IP networks with centralized control. While the current trend in IP-router architectures is towards decentralized design, there have also been research proposals for centralizing the control functions in IP networks. With continuous evolution of routers and IP networks, we believe that eventually IP networks in an autonomous system (AS) and a distributed router might converge into one network system. This system, which can be considered both as a distributed router and a centrally-controlled IP network, is divided into a control plane and a forwarding plane. The control plane is responsible for routing, management and signalling protocols, while the forwarding plane is responsible for forwarding packets. The work in this thesis covers both the forwarding and control planes. In the forwarding plane, we study network processor systems that function as forwarding elements in a distributed router. We introduce a system model and a simulation tool based on the model. Using the simulation tool, we investigate network processor system design by studying throughput, utilization, queueing behavior and packet delays. In addition to network processor systems, we study IP-address lookup, which is one of the key packet processing functions in Internet routers. Our work in IP-address lookup contains an efficient lookup algorithm, a scheme to divide the lookup procedure into two-stages in a distributed router, and an approach to perform efficient lookup on a router supporting multiple virtual routers. In the control plane, we study three emerging research issues with centralized control. We provide a thorough study of the routing convergence process in networks with centralized control, and compare it with decentralized link-state routing protocols. We propose an efficient approach to perform traffic engineering and routing in networks with centralized control, and compare it with an approach using optimized link weights. Finally, we present an approach to perform loop-free updates of forwarding tables when the forwarding paths change. This loop-free update approach is particularly useful in networks with centralized control. The results presented in this thesis are useful for building next-generation routers and IP networks with centralized control that might eventually converge into one network system. / QC 20100726

As the number of processor cores on a chip increases with the advance of CMOS technology, there has been a growing need of more efficient Network-on-Chip (NoC) design since communication delay has become a major bottleneck in large-scale multicore systems. In designing efficient input buffers of NoC routers for better performance and power efficiency, Spin-Torque Transfer Magnetic RAM (STT-MRAM) is regarded as a promising solution due to its nature of high density and near-zero leakage power. Previous work that adopts STT-MRAM in designing NoC router input buffer shows a limitation in minimizing the overhead of power consumption, even though it succeeds to some degree in achieving high network throughput by the use of SRAM to hide the long write latency of STT-MRAM. In this thesis, we propose a novel input buffer design that depends solely on STT-MRAM without the need of SRAM to maximize the benefits of low leakage power and area efficiency inherent in STT-MRAM. In addition, we introduce power-efficient buffer refreshing schemes synergized with age-based switch arbitration that gives higher priority to older flits to remove unnecessary refreshing operations. On an average, we observed throughput improvements of 16% on synthetic workloads and benchmarks.

As the feature size is continuously decreasing and integration density is increasing, interconnections have become a dominating factor in determining the overall quality of a chip. Due to the limited scalability of system bus, it cannot meet the requirement of current System-on-Chip (SoC) implementations where only a limited number of functional units can be supported. Long global wires also cause many design problems, such as routing congestion, noise coupling, and difficult timing closure. Network-on-Chip (NoC) architectures have been proposed to be an alternative to solve the above problems by using a packet-based communication network. The processing elements (PEs) communicate with each other by exchanging messages over the network and these messages go through buffers in each router. Buffers are one of the major resource used by the routers in virtual channel flow control. In this thesis, we analyze two kinds of buffer allocation approaches, static and dynamic buffer allocations. These approaches aim to increase throughput and minimize latency by means of virtual channel flow control. In statically allocated buffer architecture, size and organization are design time decisions and thus, do not perform optimally for all traffic conditions. In addition, statically allocated virtual channel consumes a waste of area and significant leakage power. However, dynamic buffer allocation scheme claims that buffer utilization can be increased using dynamic virtual channels. Dynamic virtual channel regulator (ViChaR), have been proposed to use centralized buffer architecture which dynamically allocates virtual channels and buffer slots in real-time depending on traffic conditions. This ViChaR’s dynamic buffer management scheme increases buffer utilization, but it also increases design complexity. In this research, we reexamine performance, power consumption, and area of ViChaR’s buffer architecture through implementation. We implement a generic router and a ViChaR architecture using Verilog-HDL. These RTL codes are verified by dynamic simulation, and synthesized by Design Compiler to get area and power consumption. In addition, we get latency through Static Timing Analysis. The results show that a ViChaR’s dynamic buffer management scheme increases the latency and power consumption significantly even though it could increase buffer utilization. Therefore, we need a novel design to achieve high buffer utilization without a loss.

In a multiprocessor system-on-chip (MPSOC), parallel processors are utilized to enhance overall performance. However, the communication between processors and memory modules can affect overall performance significantly. We proposed a software design of communication performance estimation for system synthesis. We designed a hardware simulator of mesh communication architecture of MPSOC. We implemented the simulator of router nodes in SystemC language. An analytical communication performance estimation model can be trained with data measured from communication simulation. It can then be utilized for estimating inter-processor communication performance in an MPSOC.

Η παρούσα διπλωματική εργασία αφορά τη μελέτη σφάλματος στο δρομέα τριφασικής ασύγχρονης μηχανής με τη δημιουργία δισδιάστατου μοντέλου πεπερασμένων στοιχείων και σύγκριση με πειραματικά αποτελέσματα. Σκοπός της διπλωματικής εργασίας είναι η ανάλυση της λειτουργίας τριφασικού ασύγχρονου κινητήρα με βραχυκυκλωμένο δρομέα, με και χωρίς σφάλμα στο δακτύλιο βραχυκύκλωσης καθώς και ανίχνευση του σφάλματος. Με εφαρμογή της μεθόδου «Motor Current Signature Analysis» ή «ΜCSA» είμαστε σε θέση να εντοπίσουμε την ύπαρξη κάποιου σφάλματος στο κινητήρα. Η μέθοδος «ΜCSA» χρησιμοποιεί αισθητήρες οι οποίοι δεν διεισδύον στο εσωτερικό της μηχανής και η λειτουργία της βασίζεται στην ανάλυση του φάσματος του ρεύματος του στάτη (ρεύματος τροφοδοσίας) μίας ασύγχρονης μηχανής, με σκοπό να εντοπιστεί ένα σφάλμα εν τη γένεση του στον κινητήρα. Η ύπαρξη κάποιου σφάλματος προκαλεί την εμφάνιση αρμονικών συνιστωσών χαρακτηριστικών του συγκεκριμένου σφάλματος. Πραγματοποιήθηκε σχεδίαση μοντέλου τριφασικού ασύγχρονου κινητήρα στις δύο διαστάσεις με χρήση του λογισμικού πεπερασμένων στοιχείων «Opera – 2d» για να μελετηθεί η λειτουργία του τριφασικού ασύγχρονου κινητήρα με σφάλμα και χωρίς σφάλμα στο δακτύλιο βραχυκύκλωσης, καθώς και για εφαρμογή της μεθόδου «Motor Current Signature Analysis». Με εξομοίωση του κινητήρα παίρνουμε τις κυματομορφές του ρεύματος στάτη και της ροπής για εφαρμογή της μεθόδου «MCSA». Στη συνέχεια με υλοποίηση πειραματικής διάταξης πραγματοποιήθηκε μελέτη της συμπεριφοράς τριφασικού ασύγχρονου κινητήρα με βραχυκυκλωμένο δρομέα, με και χωρίς σφάλμα στο δακτύλιο βραχυκύκλωσης. Από την πειραματική διάταξη παίρνουμε τις κυματομορφές του ρεύματος στάτη για εφαρμογή της μεθόδου «MCSA». Τέλος έγιναν οι απαραίτητες συγκρίσεις ανάμεσα στα αποτελέσματα του κινητήρα με σφάλμα και χωρίς σφάλμα στο δακτύλιο βραχυκύκλωσης καθώς και ανάμεσα στα αποτελέσματα της εξομοίωσης και των πειραματικών αποτελεσμάτων. Η διπλωματική εργασία χωρίζεται σε 6 κεφάλαια. Στο πρώτο κεφάλαιο γίνεται μια περιληπτική αναφορά στις βασικές αρχές που διέπουν την κατασκευή και την λειτουργία της τριφασικής ασύγχρονης μηχανής. Επίσης γίνεται αναφορά στα τυλίγματα των ασύγχρονων μηχανών καθώς και στις μεθόδους που χρησιμοποιούνται για την εκκίνηση των τριφασικών ασύγχρονων κινητήρων. Στο κεφάλαιο 2 γίνεται παρουσίαση της μεθόδου «Motor Current Signature Analysis» η οποία χρησιμοποιείται για την ανίχνευση σφαλμάτων καθώς και για την επιτήρηση της λειτουργίας τριφασικών ασύγχρονων μηχανών. Παρουσιάζονται οι λόγοι για τους οποίους είναι χρήσιμο ένα τέτοιο διαγνωστικό σύστημα, η διάταξη υλοποίησης, τι πρέπει να προσέχουμε κατά την εφαρμογή του και πως εφαρμόζεται σε πολύπλοκα συστήματα. Το κεφάλαιο 3 αναφέρεται στο πειραματικό σκέλος της διπλωματικής εργασίας. Γίνεται περιγραφή της πειραματικής διάταξης που υλοποιείται στο εργαστήριο για εφαρμογή της μεθόδου «Motor Current Signature Analysis». Από δύο όμοιους τριφασικούς ασύγχρονους κινητήρες, ένα με σφάλμα στο δακτύλιο βραχυκύκλωσης και ένα χωρίς σφάλμα παίρνουμε τις κυματομορφές του ρεύματος στάτη στις οποίες θα γίνει ανάλυση FFΤ έτσι ώστε να εντοπιστούν οι συχνότητες στις οποίες εισάγονται αρμονικές λόγω του σφάλματος στο δακτύλιο βραχυκύκλωσης. Στο κεφάλαιο 4 βλέπουμε τη σχεδίαση και εξομοίωση των δύο κινητήρων που χρησιμοποιήθηκαν στην πειραματική διάταξη, με χρήση του λογισμικού πεπερασμένων στοιχείων «Opera–2d». Παρουσιάζεται αναλυτικά η διαδικασία σχεδίασης των δύο κινητήρων καθώς και κάποια βήματα τα οποία προηγούνται της ανάλυσης. Στο κεφάλαιο 5 παρουσιάζονται τα αποτελέσματα τα οποία προκύπτουν από την εξομοίωση των δύο κινητήρων. Συγκεκριμένα πραγματοποιήθηκε δυναμική ανάλυση στα δύο μοντέλα του κινητήρα με δύο διαφορετικές μεθόδους : i) υπό σταθερό αριθμό στροφών ανά λεπτό του δρομέα και ii) υπό σταθερό φορτίο στο κινητήρα. Επίσης πραγματοποιήθηκε ανάλυση κατά την εκκίνηση των δύο κινητήρων καθώς και υπό φορτίο. Για το κινητήρα με σφάλμα πραγματοποιήσαμε και μη γραμμική ανάλυση υπό φορτίο. Τέλος στο κεφάλαιο 6 πραγματοποιήθηκε επεξεργασία των πειραματικών αποτελεσμάτων καθώς και των αποτελεσμάτων τα οποία προκύπτουν από την εξομοίωση των δύο κινητήρων. Συγκεκριμένα πραγματοποιήθηκε ανάλυση FFT στις κυματομορφές του ρεύματος στάτη καθώς και της ροπής για τους δύο κινητήρες. Από τα αποτελέσματα που προέκυψαν εξάγαμε σημαντικά συμπεράσματα όσο αφορά τη λειτουργία των δύο κινητήρων. Επίσης έγινε και μια σύγκριση των πειραματικών αποτελεσμάτων με τα αποτελέσματα της εξομοίωσης. / -

Today's companies are growing in a steady pace, with more and more network devices added to the network it is very important to keep track of and monitor the status of devices. Even though the wireless evolution has come, it all depends on the wired connections to supply a continuous connection to the rest of the world.   This thesis explores, tests and informs about creating a functional system that automatically creates backups of configuration files from network devices and how to troubleshoot networking problems and maintain a network to keep it in good shape.   Even though many companies have manual backups of router and switch configurations, the possibility to have this part automated should be desired by most companies. It can open up for the administrators in the company to have more time over to help the employees that are experiencing problems at the same time as the automated system eliminates the possible errors that a human can cause. Of course one can see it the other way, that it takes away manual labor for the employees, but it is just a small part of the job yet it is so very important that making this service automated is a good choice for a company. Integrity is proven by the means of backups and by the option to see the difference between the previous backups and the most recent.   The three of us have worked as a group to do all tests and to write the documentation. After working with a couple of companies it is clear that well functional backup systems of network devices are not as common as it should be. Companies that do take backups of the network devices often do this manually. When seeing this it makes sense to use a reliable system that uses revision handling so it is easy to see the recent changes made to the devices.   The results ended up in a working automated backup system for routers and switches. The automated system is running Debian and connects to all the routers and switches in the network to collect the configuration files with the help of rancid. The thesis also explains the functions of concepts such as disaster recovery and different maintenance models.

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Mitt examensarbete handlar om den utfasade snickerimaskinen överfräsen. Maskinen försvann från verkstäderna för mer än 30 år sedan och den erfarenhetsbaserad kunskapen om hur den användes finns hos före detta verkmästare och arbetare. Genom platsbesök och intervjuer på verkstäder och föreningar dokumenterar jag den immateriella kunskap som inte går att finna i litteraturen. Jag kommer sedan själv göra praktiska tester på maskinen för att verifiera den nyvunna kunskapen men också för att undersöka om maskinen har några användingsområden i det moderna snickeriet. / My thesis explores the overhead router, a formerly common but now rarely used and largely forgotten milling machine. My methods will be both practical and theoretical, and I will linger on three main questions; (1) How is the overhead router used? (2) Why did workers and foremen stop using the overhead router? And (3) what are the potential advantages of the overhead router? The theoretical side of my work will be based on interviews and field research from various workshops and woodwork organizations. The practical aspect of my thesis is an attempt to learn to use the overhead router personally, and in doing so, find out if the overhead router has a place in the contemporary woodworking shop.