We have advanced the state-of-the-art for nano-fabrication of carbon nanotube (CNT) based field emission devices, and have conducted experimental and theoretical investigations to better understand the reasons for the high reduced brightness achieved. We have demonstrated that once the CNT emitter failure modes are better understood and resolved, such CNT emitters can easily reach reduced brightness on the order of 10⁹ A m⁻² sr⁻¹ V⁻¹ and noise levels of about 1%. These results are about 10% better than the best brightness results from a nanotip emitter archived to date. Our CNT emitters have order of magnitude better reduced brightness than state-of-the-art commercial Schottky emitters. Our analytical models of field emission matched our experimental results well. The CNT emitter was utilized in a modified commercial scanning electron microscope (SEM) and briefly operated to image a sample. We also report a successful emission from a lateral CNT emitter element having a single suspended CNT, where the electron emission is from the CNT sidewall. The lateral CNT emitters have reduced brightness on the order of 10⁸ A m⁻² sr⁻¹ V⁻¹, about 10X less than the vertical CNT emitters we fabricated and analyzed. The characteristics of the lateral field emitter were analyzed for manually fabricated and directly grown CNT emitters. There was no significant difference in performance based on the way the CNT emitter was fabricated. We showed that the fabrication technique for making a single CNT emitter element can be scaled to an array of elements, with potential density of 10⁶-10⁷ CNT emitters per cm². We also report a new localized, site selective technique for editing carbon nanotubes using water vapor and a focused electron beam. We have demonstrated the use of this technique to cut CNTs to length with 10s of nanometers precision and to etch selected areas from CNTs with 10s of nanometers precision. The use of this technique was demonstrated by editing a lateral CNT emitter. We have conducted investigations to demonstrate the effects of higher local water pressure on the CNT etching efficiency. This was achieved by developing a new method of localized gas delivery with a nano-manipulator. / text

The fabrication of zone plate lenses that are used for focusing X-rays relies on nanofabrication techniques such as e-beam lithography, reactive ion etching, and electroplating. The circular grating-like zone plate pattern can have a smallest half-period, a so-called zone width, of down to 20 nm while it also needs to have a height that is 5 to 10 times the zone width to have good diffraction efficiency. This high aspect ratio structuring is a very challenging field of nanofabrication. This diploma project has focused on improving the process step of fabricating the electroplating mold by cryo-cooling the polymer during the reactive ion etching with O2. The low temperature causes passivation of the sidewalls of the mold during etching which results in a more ideal rectangular profile of the high aspect ratio plating mold. By etching at -100 °C, structures with highly vertical sidewalls and no undercut were realized. The experiments showed that there is a tradeoff between the anisotropy of the zone profile and the formation rate of polymer residue, so-called RIE grass. Through a proper choice of process parameters the grass could be completely removed without introducing any undercut. / QC 20100414

The objective of this research is to demonstrate the impact of interconnect process variations, line-edge roughness and size effects on interconnect effective resistivity and ultimately chip performance. The investigation is accomplished through five tasks. In Task I, a new closed-form effective resistivity model, which is a function of line-edge roughness (LER), surface specularity and grain boundary reflectivity, is derived. In Task II, a critical path model is enhanced by including interconnect parasitics using the model in Task I. This enhancement also involves an extensive survey of foundry process data to shed light on the device resistance estimation used in the critical path model in Task II. Task III develops a Monte Carlo (MC) simulation framework called the Fast Interconnect Statistical Simulator (FISS). Using the latest International Technology Roadmap for Semiconductors (ITRS) projections, the FISS projects the impact of interconnect process variations and size effects onto high performance microprocessor units (HP-MPUs). Task IV fabricates metallic interconnect test structures with sub-100nm line-widths. The fifth task statistically calibrates the model from Task I using resistivity data measured from the test structures in Task IV.