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U.S. AND INDIAN MANAGERIAL BOUNDARY SPANNING BEHAVIORS IN GLOBALLY DISTRIBUTED SOFTWARE TEAMSPadgett, Maureen January 2019 (has links)
This paper explores the construct of Boundaries and Boundary Spanning in software development teams that consist of members located in both the U.S. and in India. Drawing on literature pertaining to boundaries in business, global boundaries, cultural boundaries, virtual team boundaries, and organizational boundaries, two studies were conducted. The first study measured the boundary spanning behaviors of software team managers of 25 teams. These results were analyzed in conjunction with a standard measure of software team output. No support was found for the hypothesis that frequency of team manager boundary spanning behavior had an impact on overall team output. In the second study, interviews were conducted of 20 software team managers to better understand their perceptions of the boundaries to team success. Managers cited several boundaries to team output, such as those of communication and issues of power-distance. Nearly all managers felt that time zone difference, a temporal boundary, was the most impactful to their own team success. Through flexible pattern matching analysis, categories of team boundaries have been proposed. / Business Administration/Management Information Systems
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Fast Fault Recovery in Switched Networks for Carrying IP Telephony TrafficEisazadeh, Ali Akbar, Espahbodi, Nora January 2010 (has links)
<p>One of the most parts of VOIP management is fault management and, in having a good fault management, finding good mechanisms to detect faults in the network have to be considered.</p><p>The main focus of this project is to implement different types of fast fault recovery protocols in networks<strong>,</strong> especially networks that carry IP telephony. Having a complete understanding of some common link failure detection and fault recovery protocols<strong>,</strong> such as spanning tree protocol (STP), rapid spanning tree protocol (RSTP) and per-VLAN spanning tree protocol (PVSTP)<strong>,</strong> and also having a complete understanding of three other common techniques for fault detection and fault recovery, such as hot standby routing protocol (HSRP), virtual router redundancy protocol (VRRP) and gateway load balancing protocol (GLBP) will be regarded in the project. We are going to test some fault recovery protocols which can be used in IP telephony networks and choose the best. We intend to focus on this issue in LAN environment in theoretical descriptions and practical implementations.</p><p>The final outcome of the thesis is implementation in the Halmstad University’s lab environment to obtain the final result. For doing our thesis, we are going to use some technical tools as hardware tools (Cisco L3 and L2 switches, Routers, IP Phones) and tools which are used for network performance monitoring<strong>,</strong> like as CommVeiw.</p>
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Fast Fault Recovery in Switched Networks for Carrying IP Telephony TrafficEisazadeh, Ali Akbar, Espahbodi, Nora January 2010 (has links)
One of the most parts of VOIP management is fault management and, in having a good fault management, finding good mechanisms to detect faults in the network have to be considered. The main focus of this project is to implement different types of fast fault recovery protocols in networks, especially networks that carry IP telephony. Having a complete understanding of some common link failure detection and fault recovery protocols, such as spanning tree protocol (STP), rapid spanning tree protocol (RSTP) and per-VLAN spanning tree protocol (PVSTP), and also having a complete understanding of three other common techniques for fault detection and fault recovery, such as hot standby routing protocol (HSRP), virtual router redundancy protocol (VRRP) and gateway load balancing protocol (GLBP) will be regarded in the project. We are going to test some fault recovery protocols which can be used in IP telephony networks and choose the best. We intend to focus on this issue in LAN environment in theoretical descriptions and practical implementations. The final outcome of the thesis is implementation in the Halmstad University’s lab environment to obtain the final result. For doing our thesis, we are going to use some technical tools as hardware tools (Cisco L3 and L2 switches, Routers, IP Phones) and tools which are used for network performance monitoring, like as CommVeiw.
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Spanning Halin Subgraphs Involving Forbidden SubgraphsYang, Ping 09 May 2016 (has links)
In structural graph theory, connectivity is an important notation with a lot of applications. Tutte, in 1961, showed that a simple graph is 3-connected if and only if it can be generated from a wheel graph by repeatedly adding edges between nonadjacent vertices and applying vertex splitting. In 1971, Halin constructed a class of edge-minimal 3-connected planar graphs, which are a generalization of wheel graphs and later were named “Halin graphs” by Lovasz and Plummer. A Halin graph is obtained from a plane embedding of a tree with no stems having degree 2 by adding a cycle through its leaves in the natural order determined according to the embedding. Since Halin graphs were introduced, many useful properties, such as Hamiltonian, hamiltonian-connected and pancyclic, have been discovered. Hence, it will reveal many properties of a graph if we know the graph contains a spanning Halin subgraph. But unfortunately, until now, there is no positive result showing under which conditions a graph contains a spanning Halin subgraph. In this thesis, we characterize all forbidden pairs implying graphs containing spanning Halin subgraphs. Consequently, we provide a complete proof conjecture of Chen et al. Our proofs are based on Chudnovsky and Seymour’s decomposition theorem of claw-free graphs, which were published recently in a series of papers.
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Representação Nó-profundidade em FPGA para algoritmos evolutivos aplicados ao projeto de redes de larga-escala / Node-depth representation in FPGA for evolutionary algorithms applied to network design problems of large-scaleGois, Marcilyanne Moreira 26 October 2011 (has links)
Diversos problemas do mundo real estão relacionados ao projeto de redes, tais como projeto de circuitos de energia elétrica, roteamento de veículos, planejamento de redes de telecomunicações e reconstrução filogenética. Em geral, esses problemas podem ser modelados por meio de grafos, que manipulam milhares ou milhões de nós (correspondendo às variáveis de entrada), dificultando a obtenção de soluções em tempo real. O Projeto de uma Rede é um problema combinatório, em que se busca encontrar a rede mais adequada segundo um critério como, por exemplo, menor custo, menor caminho e tempo de percurso. A solução desses problemas é, em geral, computacionalmente complexa. Nesse sentido, metaheurísticas como Algoritmos Evolutivos têm sido amplamente investigadas. Diversas pesquisas mostram que o desempenho de Algoritmos Evolutivos para Problemas de Projetos de Redes pode ser aumentado significativamente por meio de representações mais apropriadas. Este trabalho investiga a paralelização da Representação Nó-Profundidade (RNP) em hardware, com o objetivo de encontrar melhores soluções para Problemas de Projetos de Redes. Para implementar a arquitetura de hardware, denominada de HP-RNP (Hardware Parallelized RNP), foi utilizada a tecnologia de FPGA para explorar o alto grau de paralelismo que essa plataforma pode proporcionar. Os resultados experimentais mostraram que o HP-RNP é capaz de gerar e avaliar novas redes em tempo médio limitado por uma constante (O(1)) / Many problems related to network design can be found in real world applications, such as design of electric circuits, vehicle routing, telecommunication network planning and phylogeny reconstruction. In general, these problems can be modelled using graphs that handle thousands or millions of nodes (input variables), making it hard to obtain solutions in real-time. The Network Design is the combinatorial problem of finding the most suitable network subject to a evaluation criterion as, for example, lower cost, minimal path and time to traverse the network. The solution of those problems is in general computationally complex. Metaheuristics as Evolutionary Algorithms have been widely investigated for such problems. Several researches have shown that the performance of Evolutionary Algorithms for the Network Design Problems can be significantly increased through more appropriated dynamic data structures (encodings). This work investigates the parallelization of Node-Depth Encoding (NDE) in hardware in order to find better solutions for Network Design Problems. To implement the proposed hardware architecture, called HP-NDE (Hardware Parallellized NDE), the FPGA technology was used to explore the high degree of parallelism that such platform can provide. The experimental results have shown that the HP-NDE can generate and evaluate new networks in average time constrained by a constant (O(1))
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Mechanical properties of pore-spanning membranes prepared from giant vesicles / Mechanische Eigenschaften von Poren-Spanning Membranen aus Riesenvesikeln vorbereitetKocun, Marta 23 May 2011 (has links)
No description available.
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A Comparative Study Of Tree Encodings For Evolutionary ComputingSaka, Esin 01 July 2005 (has links) (PDF)
One of the most important factors on the success of evolutionary algorithms (EAs) about trees is the representation of them. The representation should exhibit efficiency, locality and heritability to enable effective evolutionary computing. Neville proposed three different methods for encoding labeled trees. The first one is similar with Prü / fer' / s encoding. In 2001, it is reported that, the use of Prü / fer numbers is a poor representation of spanning trees for evolutionary search, since it has low locality for random trees. In the thesis Neville' / s other two encodings, namely Neville branch numbers and Neville leaf numbers, are studied. For their performance in EA their properties and algorithms for encoding and decoding them are also examined. Optimal algorithms with time and space complexities of O(n) , where n is the number of nodes, for encoding and
decoding Neville branch numbers are given. The localities of Neville' / s encodings are investigated. It is shown that, although the localities of Neville branch and leaf numbers are perfect for star type trees, they are low for random trees. Neville branch and Neville leaf numbers are compared with other codings in EAs and SA for four problems: ' / onemax tree problem' / , ' / degree-constrained minimum spanning tree problem' / , ' / all spanning trees problem' / and ' / all degree constrained spanning trees problem' / . It is shown that, neither Neville nor Prü / fer encodings are suitable for EAs. These encodings are suitable for only tree enumeration and degree computation. Algorithms which are timewise and spacewise optimal for ' / all spanning trees problem' / (ASTP) for complete graphs, are given by using Neville branch encoding. Computed time and space complexities for solving ASTP of complete graphs are O(nn-2) and O(n) if trees are only enumerated and O(nn-1) and O(n) if all spanning trees are printed , respectively, where n is the number of nodes. Similarly, ' / all degree constrained spanning trees problem' / of a complete graph is solvable in O(nn-1) time and O(n) space.
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Towards New Bounds for the 2-Edge Connected Spanning Subgraph ProblemLegault, Philippe January 2017 (has links)
Given a complete graph K_n = (V,E) with non-negative edge costs c ∈ R^E, the problem multi-2EC_cost is that of finding a 2-edge connected spanning multi-subgraph of K_n with minimum cost. It is believed that there are no efficient ways to solve the problem exactly, as it is NP-hard. Methods such as approximation algorithms, which rely on lower bounds like the linear programming relaxation multi-2EC^LP of multi-2EC , thus become vital cost cost to obtain solutions guaranteed to be close to the optimal in a fast manner.
In this thesis, we focus on the integrality gap αmulti-2EC of multi-2EC^LP , which is a
measure of the quality of multi-2EC^LP as a lower bound. Although we currently only know cost that 6/5 ≤ αmulti-2EC_cost ≤ 3 , the integrality gap for multi-2EC_cost has been conjectured to be 6/5. We explore the idea of using the structure of solutions for αmulti-2EC_cost and the concept of convex combination to obtain improved bounds for αmulti-2EC_cost. We focus our efforts on a family J of half-integer solutions that appear to give the largest integrality gap for multi-2EC_cost. We successfully show that the conjecture αmulti-2EC_cost = 6/5 is true for any cost functions optimized by some x∗ ∈ J.
We also study the related problem 2EC_size, which consists of finding the minimum size 2-edge connected spanning subgraph of a 2-edge connected graph. The problem is NP-hard even at its simplest, when restricted to cubic 3-edge connected graphs. We study that case in the hope of finding a more general method, and we show that every 3-edge connected cubic graph G = (V ′, E′), with n = |V ′| allows a 2EC_size solution for G of size at most 7n/6 This improves upon Boyd, Iwata and Takazawa’s guarantee of 6n/5 and extend Takazawa’s 7n/6 guarantee for bipartite cubic 3-edge connected graphs to all cubic 3-edge connected graphs.
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Representação Nó-profundidade em FPGA para algoritmos evolutivos aplicados ao projeto de redes de larga-escala / Node-depth representation in FPGA for evolutionary algorithms applied to network design problems of large-scaleMarcilyanne Moreira Gois 26 October 2011 (has links)
Diversos problemas do mundo real estão relacionados ao projeto de redes, tais como projeto de circuitos de energia elétrica, roteamento de veículos, planejamento de redes de telecomunicações e reconstrução filogenética. Em geral, esses problemas podem ser modelados por meio de grafos, que manipulam milhares ou milhões de nós (correspondendo às variáveis de entrada), dificultando a obtenção de soluções em tempo real. O Projeto de uma Rede é um problema combinatório, em que se busca encontrar a rede mais adequada segundo um critério como, por exemplo, menor custo, menor caminho e tempo de percurso. A solução desses problemas é, em geral, computacionalmente complexa. Nesse sentido, metaheurísticas como Algoritmos Evolutivos têm sido amplamente investigadas. Diversas pesquisas mostram que o desempenho de Algoritmos Evolutivos para Problemas de Projetos de Redes pode ser aumentado significativamente por meio de representações mais apropriadas. Este trabalho investiga a paralelização da Representação Nó-Profundidade (RNP) em hardware, com o objetivo de encontrar melhores soluções para Problemas de Projetos de Redes. Para implementar a arquitetura de hardware, denominada de HP-RNP (Hardware Parallelized RNP), foi utilizada a tecnologia de FPGA para explorar o alto grau de paralelismo que essa plataforma pode proporcionar. Os resultados experimentais mostraram que o HP-RNP é capaz de gerar e avaliar novas redes em tempo médio limitado por uma constante (O(1)) / Many problems related to network design can be found in real world applications, such as design of electric circuits, vehicle routing, telecommunication network planning and phylogeny reconstruction. In general, these problems can be modelled using graphs that handle thousands or millions of nodes (input variables), making it hard to obtain solutions in real-time. The Network Design is the combinatorial problem of finding the most suitable network subject to a evaluation criterion as, for example, lower cost, minimal path and time to traverse the network. The solution of those problems is in general computationally complex. Metaheuristics as Evolutionary Algorithms have been widely investigated for such problems. Several researches have shown that the performance of Evolutionary Algorithms for the Network Design Problems can be significantly increased through more appropriated dynamic data structures (encodings). This work investigates the parallelization of Node-Depth Encoding (NDE) in hardware in order to find better solutions for Network Design Problems. To implement the proposed hardware architecture, called HP-NDE (Hardware Parallellized NDE), the FPGA technology was used to explore the high degree of parallelism that such platform can provide. The experimental results have shown that the HP-NDE can generate and evaluate new networks in average time constrained by a constant (O(1))
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A Framework For Analysing Investable Risk Premia Strategies / Ett ramverk för analys av investerbarariskpremiestrategierSandqvist, Joakim, Byström, Erik January 2014 (has links)
The focus of this study is to map, classify and analyse how different risk premia strategies that are fully implementable, perform and are affected by different economic environments. The results are of interest for practitioners who currently invest in or are thinking about investing in risk premia strategies. The study also makes a theoretical contribution since there currently is a lack of publicised work on this subject. A combination of the statistical methods cluster tree, spanning tree and principal component analysis are used to first categorise the investigated risk premia strategies into different clusters based on their correlation characteristics and secondly to find the strategies’ most important return drivers. Lastly, an analysis of how the clusters of strategies perform in different macroeconomic environments, here represented by inflation and growth, is conducted. The results show that the three most important drivers for the investigated risk premia strategies are a crisis factor, an equity directional factor and an interest rate factor. These three components explained about 18 percent, 14 percent and 10 percent of the variation in the data, respectively. The results also show that all four clusters, despite containing different types of risk premia strategies, experienced positive total returns during all macroeconomic phases sampled in this study. These results can be seen as indicative of a lower macroeconomic sensitivity among the risk premia strategies and more of an “alpha-like” behaviour. / Denna studie fokuserar på att kartlägga, klassificera och analysera hur riskpremie-strategier, som är fullt implementerbara, presterar och påverkas av olika makroekonomiska miljöer. Studiens resultat är av intresse för investerare som antingen redan investerar i riskpremiestrategier eller som funderar på att investera. Studien lämnar även ett teoretiskt bidrag eftersom det i dagsläget finns få publicerade verk som behandlar detta ämne. För att analysera strategierna har en kombination av de statistiska metoderna cluster tree, spanning tree och principal component analysis använts. Detta för att dels kategorisera riskpremie-strategierna i olika kluster, baserat på deras inbördes korrelation, men också för att finna de faktorer som driver riskpremiestrategiernas avkastning. Slutligen har också en analys över hur de olika strategierna presterar under olika makroekonomiska miljöer genomförts där de makroekonomiska miljöerna representeras av inflation- och tillväxtindikatorer. Resultaten visar att de tre viktigaste faktorerna som driver riskpremiestrategiernas avkastning är en krisfaktor, en aktiemarknadsfaktor och en räntefaktor. Dessa tre faktorer förklarar ungefär 18 procent, 14 procent och 10 procent av den undersökta datans totala varians. Resultaten visar också att alla fyra kluster, trots att de innehåller olika typer av riskpremiestrategier, genererade positiv avkastning under alla makroekonmiska faser som studerades. Detta resultat ses som ett tecken på en lägre makroekonomisk känslighet bland riskpremiestrategier och mer av ett alfabeteende.
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