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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
41

Minimizing memory requirements for deterministic test data in embedded testing

Ahlström, Daniel January 2010 (has links)
<p>Embedded and automated tests reduce maintenance costs for embedded systems installed in remote locations. Testing multiple components of an embedded system, connected on a scan chain, using deterministic test patterns stored in a system provide high fault coverage but require large system memory. This thesis presents an approach to reduce test data memory requirements by the use of a test controller program, utilizing the observation of that there are multiple components of the same type in a system. The program use deterministic test patterns specific to every component type, which is stored in system memory, to create fully defined test patterns when needed. By storing deterministic test patterns specific to every component type, the program can use the test patterns for multiple tests and several times within the same test. The program also has the ability to test parts of a system without affecting the normal functional operation of the rest of the components in the system and without an increase of test data memory requirements. Two experiments were conducted to determine how much test data memory requirements are reduced using the approach presented in this thesis. The results for the experiments show up to 26.4% reduction of test data memory requirements for ITC´02 SOC test benchmarks and in average 60% reduction of test data memory requirements for designs generated to gain statistical data.</p>
42

Minimizing memory requirements for deterministic test data in embedded testing

Ahlström, Daniel January 2010 (has links)
Embedded and automated tests reduce maintenance costs for embedded systems installed in remote locations. Testing multiple components of an embedded system, connected on a scan chain, using deterministic test patterns stored in a system provide high fault coverage but require large system memory. This thesis presents an approach to reduce test data memory requirements by the use of a test controller program, utilizing the observation of that there are multiple components of the same type in a system. The program use deterministic test patterns specific to every component type, which is stored in system memory, to create fully defined test patterns when needed. By storing deterministic test patterns specific to every component type, the program can use the test patterns for multiple tests and several times within the same test. The program also has the ability to test parts of a system without affecting the normal functional operation of the rest of the components in the system and without an increase of test data memory requirements. Two experiments were conducted to determine how much test data memory requirements are reduced using the approach presented in this thesis. The results for the experiments show up to 26.4% reduction of test data memory requirements for ITC´02 SOC test benchmarks and in average 60% reduction of test data memory requirements for designs generated to gain statistical data.
43

INTERACTIVE ANALYSIS AND DISPLAY SYSTEM (IADS)

Mattingly, Patrick, Suszek, Eileen, Bretz, James 10 1900 (has links)
International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The Interactive Analysis and Display System (IADS) provides the test engineer with enhanced test-data processing, management and display capabilities necessary to perform critical data monitoring in near real-time during a test mission. The IADS provides enhanced situational awareness through a display capability designed to increase the confidence of the engineer in making clearance decisions within a Mission Control Room (MCR) environment. The engineer achieves this confidence level through IADS’ real-time display capability (every data point) and simultaneous near real-time processing capability consisting of both time and frequency domain analyses. The system displays real-time data while performing interactive and automated near real-time analyses; alerting the engineer when displayed data exceed predefined threshold limits. The IADS provides a post-test capability at the engineer’s project area desktop, with a user interface common with the real-time system. The IADS promotes teamwork by allowing engineers to share data and test results during a mission and in the post-test environment. The IADS was originally developed for the government’s premier flight test programs. IADS has set the standard for MCR advancements in data acquisition and monitoring and is currently being integrated into all the existing MCR disciplines.
44

Adapting Fourier Analysis for Predicting Earth, Mars and Lunar Orbiting Satellite's Telemetry Behavior

Losik, Len 10 1900 (has links)
ITC/USA 2010 Conference Proceedings / The Forty-Sixth Annual International Telemetering Conference and Technical Exhibition / October 25-28, 2010 / Town and Country Resort & Convention Center, San Diego, California / Prognostic technology uses a series of algorithms, combined forms a prognostic-based inference engine (PBIE) for the identification of deterministic behavior embedded in completely normal appearing telemetry from fully functional equipment. The algorithms used to define normal behavior in the PBIE from which deterministic behavior is identified can be adapted to quantify normal spacecraft telemetry behavior while in orbit about a moon or planet or during interplanetary travel. Time-series analog engineering data (telemetry) from orbiting satellites and interplanetary spacecraft are defined by harmonic and non-harmonic influences, which shape it behavior. Spectrum analysis can be used to understand and quantify the fundamental behavior of spacecraft analog telemetry and relate the behavior's frequency and phase to its time-series behavior through Fourier analysis.
45

Using Telemetry Science, An Adaptation of Prognostic Algorithms for Predicting Normal Space Vehicle Telemetry Behavior from Space for Earth and Lunar Satellites and Interplanetary Spacecraft

Losik, Len 10 1900 (has links)
ITC/USA 2009 Conference Proceedings / The Forty-Fifth Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2009 / Riviera Hotel & Convention Center, Las Vegas, Nevada / Prognostic technology uses a series of algorithms, combined forms a prognostic-based inference engine (PBIE) for the identification of deterministic behavior embedded in completely normal appearing telemetry from fully functional equipment. The algorithms used to define normal behavior in the PBIE from which deterministic behavior is identified can be adapted to quantify normal spacecraft telemetry behavior while in orbit about a moon or planet or during interplanetary travel. Time-series analog engineering data (telemetry) from orbiting satellites and interplanetary spacecraft are defined by harmonic and non-harmonic influences which shape it behavior. Spectrum analysis can be used to understand and quantify the fundamental behavior of spacecraft analog telemetry and relate the behavior's frequency and phase to its time-series behavior through Fourier analysis.
46

Search-based software engineering : a search-based approach for testing from extended finite state machine (EFSM) models

Kalaji, Abdul Salam January 2010 (has links)
The extended finite state machine (EFSM) is a powerful modelling approach that has been applied to represent a wide range of systems. Despite its popularity, testing from an EFSM is a substantial problem for two main reasons: path feasibility and path test case generation. The path feasibility problem concerns generating transition paths through an EFSM that are feasible and satisfy a given test criterion. In an EFSM, guards and assignments in a path‟s transitions may cause some selected paths to be infeasible. The problem of path test case generation is to find a sequence of inputs that can exercise the transitions in a given feasible path. However, the transitions‟ guards and assignments in a given path can impose difficulties when producing such data making the range of acceptable inputs narrowed down to a possibly tiny range. While search-based approaches have proven efficient in automating aspects of testing, these have received little attention when testing from EFSMs. This thesis proposes an integrated search-based approach to automatically test from an EFSM. The proposed approach generates paths through an EFSM that are potentially feasible and satisfy a test criterion. Then, it generates test cases that can exercise the generated feasible paths. The approach is evaluated by being used to test from five EFSM cases studies. The achieved experimental results demonstrate the value of the proposed approach.
47

Adapting Fourier Analysis for Predicting Earth, Mars and Lunar Orbiting Satellite's Telemetry Behavior

Losik, Len 10 1900 (has links)
ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada / Prognostic technology uses a series of algorithms, combined forms a prognostic-based inference engine (PBIE) for the identification of deterministic behavior embedded in completely normal appearing telemetry from fully functional equipment. The algorithms used to define normal behavior in the PBIE from which deterministic behavior is identified can be adapted to quantify normal spacecraft telemetry behavior while in orbit about a moon or planet or during interplanetary travel. Time-series analog engineering data (telemetry) from orbiting satellites and interplanetary spacecraft are defined by harmonic and non-harmonic influences, which shape it behavior. Spectrum analysis can be used to understand and quantify the fundamental behavior of spacecraft analog telemetry and relate the behavior's frequency and phase to its time-series behavior through Fourier analysis.
48

Improving the transparency and predictability of environmental risk assessments ofpharmaceuticals

Ågerstrand, Marlene January 2010 (has links)
<p>The risk assessment process and the subsequent risk management measures need tobe constantly evaluated, updated and improved. This thesis contributes to that workby considering, and suggesting improvements, regarding aspects like userfriendliness,transparency, accuracy, consistency, data reporting, data selection anddata evaluation.The first paper in this thesis reports from an empirical investigation of themotivations, intentions and expectations underlying the development andimplementation of a voluntary industry owned environmental classification systemfor pharmaceuticals. The results show that the purpose of the classification systemis to provide information, no other risk reduction measures are aimed for.The second paper reports from an evaluation of the accuracy and the consistency ofthe environmental risk assessments conducted within the classification system. Theresults show that the guideline recommendations were not followed in several casesand consequently alternative risk ratios could be determined for six of the 36pharmaceutical substances selected for evaluation in this study. When additionaldata from the open scientific literature was included the risk ratio was altered formore than one-third of the risk assessments. Seven of the 36 substances wereassessed and classified by more than one risk assessor. In two of the seven cases,different producers classified the same substance into different classificationcategories.The third paper addresses the question whether non-standard ecotoxicity data couldbe used systematically in environmental risk assessments of pharmaceuticals. Fourdifferent evaluation methods were used to evaluate nine non-standard studies. Theevaluation result from the different methods varied at surprisingly high rate and theevaluation of the non-standard data concluded that the reliability of the data wasgenerally low.</p> / QC 20100929
49

Towards the effective utilisation of trade-related aspects of intellectual property rights flexibilities to improve access to essential medicines in Ghana

Kuudogrme, Barbara Bangfudem January 2018 (has links)
Magister Legum - LLM / Access to medicines is an essential component of the basic human right to health and a key determinant of the importance attached to the health care system of a country. It essentially entails the availability and acceptability of the essential medicines on the market and the ability of patients to afford such medicines when needed. Globally, countries face access to medicine challenges partly because of patents which undoubtedly accounts for excessive pricing of medicine. As such, efforts have been made to ensure the accessibility of medicines through the Trade-Related Aspect of Intellectual Property Rights (TRIPS) flexibilities of the World Trade Organisation (WTO). Beyond these interventions, it is incumbent on Members of the WTO to domesticate the flexibilities of the TRIPS Agreement before their utilisation because by their very nature, they cannot be self-executed. With an estimated population of 29.6 million, about 310 000 people in Ghana are living with HIV. The country’s health facilities record 40 per cent of outpatient visits each year and about 14 550 per 100 000 of the population are infected with tuberculosis with cancer on the rise. These diseases require medicines which are mostly patented yet Ghana has access to medicine problems despite the existence of a national health insurance system. Ghana has however not fully incorporated the TRIPS flexibilities in its national legislations and therefore unable to fully utilise the flexibilities as an option to access essential medicines. Questions therefore remain as to why and how Ghana can utilise the flexibilities to improve access to medicines. Based on an examination of the WTO’s patent system and legislations of Ghana, this mini- thesis contends that, the extent of incorporation of the flexibilities are inadequate due to the existence of lacunas in the Ghanaian legislations. Furthermore, a comparative assessment with South Africa supports an understanding that conditions are not ripe for full utilisation of all the flexibilities. It further argues that the utilisation of the TRIPS flexibilities by Ghana has been rendered ineffective due to administrative, political, economic and social challenges which adversely affects the full utilisation of the flexibilities incorporated and those yet to be incorporated. It is therefore important that Ghana adopts holistic approaches taking into consideration best practices if the TRIPS flexibilities must be effectively utilised. This mini-thesis concludes that, the TRIPS flexibilities are necessary for accessing essential medicines in Ghana to promote the right to health and that a review of Ghana’s current legislations to fully incorporate the TRIPS flexibilities and addressing other non-legal challenges are the required linchpin for effective utilisation of the TRIPS flexibilities.
50

Compression de données de test pour architecture de systèmes intégrés basée sur bus ou réseaux et réduction des coûts de test / Test data compression for integrated systems architecture based on bus or network and test cost reduction

Dalmasso, Julien 01 October 2010 (has links)
Les circuits intégrés devenant de plus en plus complexes, leur test demande des efforts considérables se répercutant sur le coût de développement et de production de ces composants. De nombreux travaux ont donc porté sur la réduction du coût de ce test en utilisant en particulier les techniques de compression de données de test. Toutefois ces techniques n'adressent que des coeurs numériques dont les concepteurs détiennent la connaissance de toutes les informations structurelles et donc en pratique n'adressent que le test de sous-blocs d'un système complet. Dans cette thèse, nous proposons tout d'abord une nouvelle technique de compression des données de test pour les circuits intégrés compatible avec le paradigme de la conception de systèmes (SoC) à partir de fonctions pré-synthétisées (IPs ou coeurs). Puis, deux méthodes de test des systèmes utilisant la compression sont proposées. La première est relative au test des systèmes SoC utilisant l'architecture de test IEEE 1500 (avec un mécanisme d'accès au test de type bus), la deuxième concerne le test des systèmes pour lesquels la communication interne s'appuie sur des structures de type réseau sur puce (NoC). Ces deux méthodes utilisent conjointement un ordonnancement du test des coeurs du système avec une technique de compression horizontale afin d'augmenter le parallélisme du test des coeurs constituant le système et ce, à coût matériel constant. Les résultats expérimentaux sur des systèmes sur puces de référence montrent des gains de l'ordre de 50% sur le temps de test du système complet. / While microelectronics systems become more and more complex, test costs have increased in the same way. Last years have seen many works focused on test cost reduction by using test data compression. However these techniques only focus on individual digital circuits whose structural implementation (netlist) is fully known by the designer. Therefore, they are not suitable for the testing of cores of a complete system. The goal of this PhD work was to provide a new solution for test data compression of integrated circuits taking into account the paradigm of systems-on-chip (SoC) built from pre-synthesized functions (IPs or cores). Then two systems testing method using compression are proposed for two different system architectures. The first one concerns SoC with IEEE 1500 test architecture (with bus-based test access mechanism), the second one concerns NoC-based systems. Both techniques use test scheduling methods combined with test data compression for better exploration of the design space. The idea is to increase test parallelism with no hardware extra cost. Experimental results performed on system-on-chip benchmarks show that the use of test data compression leads to test time reduction of about 50% at system level.

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