In this thesis, a novel low-voltage, highly linear and tunable triode transconductor is introduced. The proposed transconductor with new structure is based on constant drain-source voltage method to operate at low-voltage. The proposed transconductor achieves wide linear input range up to 1.5V at 1.8V supply voltage and the total harmonic distortion is -61dB at 0.7Vpp. The design uses TSMC 0.18£gm CMOS technology and supply voltage as low as 1.6V. Moreover, it possesses large transconductance tuning range from 220£gS to 869£gS and also keeps the wide linear input range.

This thesis has described a wide tuning range transconductor combining source degeneration, cross-coupled, translinear loop to achieve high linearity. The transconductance tuning range from 220£gs to 1050£gs with 1V input range and the total harmonic distortion is -50dB with 0.6Vpp input voltage. And its application to a fifth-order elliptic low-pass Gm-C filter for the front-end RF circuit is presented. In order to transform the passive element circuit into a Gm-C based filter, a GIC flow method has been used. The proposal Gm-C based filter achieve a with performance a low frequency filtering range from 5Mhz to 10Mhz by transconductance tuning.

In this thesis, a first order low pass square root domain filter (SRD filter) based on the novel operational transconductor amplifiers (OTAs) is presented. The SRD filter consists of a translinear filter and two OTAs. Because the conventional OTA has small input voltage swings, which violates the large signal operation of a SRD filter. We propose the novel OTA which is based on the large signal behaviors of MOSFETs, and the OTA also has large signal operation. We improve Cruz¡¦s SRD filter [22], reduce the number of the transconductors from 3 to 2, and replace Class-AB linear transconductors with the proposed OTAs. The MOSFET count of whole circuit can be reduced. Therefore, the OTAs have many advantages: wider input voltage swing, low supply voltage, low power consumption, and small chip area. The circuit has been fabricated with 0.35£gm CMOS technology. It operates with a supply voltage 1.5V and the bias current varies from 0.3£gA to 15£gA. Measurement results show that the cutoff frequency can be tuned from 1.1kHz to 35.2kHz when the external capacitance C is 1nF and the cutoff frequency can be tuned from 8.7kHz to 310.4kHz when the external capacitance C is 100pF. The total harmonic distortions are 0.93% and 0.91% when the external capacitances C are 1nF and 100pF, and the power consumption is 152.29£gW.

This master’s thesis deals with the design of tuneable frequency second order filter in CMOS technology. The thesis describes the design of a transconductor and its utilization for tunable gm-C filter. The design and all simulations were made in Cadence Spectre and Virtuoso software. Limitedly Orcad Pspice and SNAP were also used.

Este trabalho propõe novas topologias de circuitos e técnicas de projeto para filtros ativos e amplificadores de ganho programável (PGA) com operação em ultra baixa tensão (ULV) e ultra-baixa potência (ULP). Os receptores de RF do tipo Bluetooth de baixa energia (BLE), utilizados nos circuitos de internet das coisas (IoT), são as aplicações alvo dos circuitos propostos neste trabalho. Na faixa de ULV são utilizados filtros do tipo RC-ativo, uma vez que possuem uma maior linearidade em relação aos filtros do tipo gmC. A operação em ULP é alcançada neste trabalho utilizando uma nova topologia de amplificador operacional de transcondutância (OTA), com único estágio, que apresenta uma alta eficiência e reduzida sensibilidade às variações de processo, tensão e temperatura (PVT). O baixo ganho de tensão do amplificador de estágio único e os efeitos das cargas resistivas de realimentação são compensados usando um transcondutor negativo, robusto a variações em PVT, conectado às entradas do OTA. A faixa dinâmica dos circuitos é elevada usando topologias totalmente diferenciais e as taxas de rejeição de modo comum e de fonte de alimentação são melhoradas utilizando circuitos de realimentação de modo-comum. Para possibilitar a operação na faixa de ULV todos os circuitos usam apenas dois transistores empilhados e o nível de inversão do canal é elevado através da polarização direta do substrato. Neste trabalho são propostas também uma ferramenta de análise do ponto de operação do transistor, baseando-se na simulação elétrica, e algumas metodologias de projetos para circuitos operando em ULV. Os circuitos e metodologias desenvolvidos foram utilizados para o projeto de um filtro passa-faixa complexo RC-ativo de terceira ordem, um amplificador de ganho programável e um filtro biquadrático do tipo Tow-Thomas com ganho programável, compatíveis com receptores de RF do padrão BLE. Para a implementação do PGA, uma nova topologia de transconductor negativo programável foi desenvolvida para permitir a compensação ótima do amplificador operacional em todos os modos de ganho. Todos os circuitos foram projetados para operar com uma tensão de alimentação de 0,4 V e foram prototipados em processos de fabricação CMOS e BiCMOS de 180 nm e 130 nm, respectivamente. Os resultados experimentais e de simulação pós-layout demonstram uma operação adequada em 0,4 V, uma ultra-baixa dissipação de potência, atingindo o mínimo de 10.9 ?W/polo, e a melhor figura-de-mérito (FoM) em relação aos outros filtros ativos e amplificadores disponíveis na literatura. / This thesis proposes novel circuit topologies and design techniques of ultra-low voltage (ULV) and ultra-low power (ULP) active-filters and programmable gain amplifiers (PGA) suitable for the Bluetooth low energy (BLE) RF receivers used in the Internet of Things (IoT) applications. The active-RC filters are preferred to the gm-C topologies at the ULV operation due to its improved linearity. However, the closed-loop operation increases the operational amplifier required voltage gain and its capacity to drive the resistive feedback load. In this work, the ULP dissipation is obtained by proposing a very efficient single-stage inverter-based operational transconductance amplifier (OTA) and a proper forward bulk biasing to reduce the sensitivity to process, voltage and temperature (PVT) variations. The low voltage gain and the resistive load effects on the single-stage OTA are completely compensated by using a PVT robust negative transconductor connected at the OTA inputs. The dynamic range is increased by using fully-differential topologies and common-mode feedback to improve the common-mode and power supply rejection rates. The operation at the ULV range is reached by using only two-stacked transistors in all the circuit implementations and bulk forward bias in some transistors to reduce the threshold voltage and to increase the channel inversion level. An operation point simulation-based tool and some design methodologies are also proposed in this work to design the ULV circuits. The proposed circuits were used to design a third-order active-RC complex band-pass filter (CxBPF), a programmable gain amplifier (PGA) and a Tow-Thomas biquad, with integrated programmable gain capability, suitable for BLE RF receivers. The PGA implementation uses a new programmable input negative transconductor to obtain the optimal closed-loop amplifier compensation in all the gain modes. The circuits were designed to operate at the power supply voltage of 0.4 V and are prototyped in 180 nm and 130 nm low-cost CMOS and BiCMOS process, respectively. The experimental and post-layout simulation results have demonstrated the proper ULV operation at 0.4 V, the ultra-low power dissipation down to 10.9 ?W/pole and the best figure-of-merit (FoM) among the state-of-the-art active-filters and amplifiers from the literature.

The electronics industry has developed incredibly in last few years and the need for low voltage and low power consuming devices is reflected with its growth. A small extension in battery life can be reflected in an order of magnitude in terms of retail prices. From multimedia gadgets (like laptops, mobiles, notebook etc.) to the biomedical device, all applications have seen a rapid advancement. All these devices need a low voltage and low power transceiver to connect with the wireless networks. This PhD thesis is focused on the development of new designing techniques for low voltage, low power integrated circuits, having close attention on circuits suitable for analog devices. The vast majority of high performance analog circuit cells realized in metal–oxide–semiconductor field-effect transistor (MOSFET) technologies traditionally exploits transistors operating in saturation. Meanwhile there exists a region of weak inversion, which was left unexploited until recently, where the behavior of a MOS transistor is similar to a bipolar transistor in qualitative terms. This region could be exploited for the devices which require operating with low voltage supply. Instead of operating in saturation region, the MOS devices employed in this design, operate in weak inversion. The MOS devices in the proposed circuits are bulk-controlled. In the conventional mode of biasing the bulk terminal is left unused and is connected with lowest supply voltage or ground while the gate is usually chosen for the input signal introduction to bias the circuit. The bulk can be used as an input for signal, can lower the threshold of a transistor if biased properly, ultimately lowering the supply voltage requirement of the transistor. In this work a modified Nauta’s Transconductor, which operates on very low voltages and have a tunable transconductance is employed to design filters. The filter constructed can be tuned in the range of few MHz. The proposed filter is operated using a 0.5V supply and its cutoff frequency can be easily adjusted. All circuits are designed and analyzed using a triple well 0.13μm CMOS process. This OTA is further modified to achieve better performance, in order to implement it in a complex filter. In low IF devices the down-conversion of image signal along with the wanted signal at the same frequency is a major problem. Complex filter can easily remove this image signal by applying a frequency shifting operation. A sixth order complex filter by implementing Leapfrog technique is designed using the differential OTA. The filter is designed to meet the Bluetooth and Zigbee standard requirements. The filter operates on a 0.5V supply voltage, and has very good results for Image rejection, sensitivity, noise and the filter is orthogonally tunable. The performance of the filter has been evaluated through simulation results by employing a triple well 0.13μm CMOS process. This filter design can be implemented in the Bluetooth devices used for the biomedical applications. / Η βιομηχανία της ηλεκτρονικής έχει αναπτυχθεί απίστευτα τα τελευταία χρόνια και η ανάπτυξη αυτή συνδυάζεται με την ανάγκη για συσκευές που λειτουργούν σε χαμηλή τάση και με χαμηλή κατανάλωση ενέργειας. Σε ότι αφορά την εμπορική τιμή, μια μικρή αύξηση της διάρκειας ζωής της μπαταρίας μπορεί να αντανακλάται σε μια αύξηση κατά μία τάξη μεγέθους της τιμής. Όλες οι εφαρμογές, από τις συσκευές πολυμέσων (όπως κινητά τηλέφωνα, φορητούς υπολογιστές, notebook κ.λπ.) έως και τις βιοϊατρικές συσκευές έχουν δει μια ταχεία πρόοδο. Όλες αυτές οι συσκευές, για να συνδέονται με ασύρματα δίκτυα, χρειάζονται πομποδέκτη χαμηλής τάσης και χαμηλής κατανάλωσης ισχύος. Η παρούσα διδακτορική διατριβή επικεντρώνεται στην ανάπτυξη νέων τεχνικών σχεδιασμού για ολοκληρωμένα κυκλώματα με έμφαση στα αναλογικά κυκλώματα, χαμηλής τάσης και χαμηλής ισχύος. Η συντριπτική πλειοψηφία των δομικών βαθμίδων αναλογικών κυκλωμάτων υψηλών επιδόσεων πραγματοποιείται σε τεχνολογία μετάλλου οξειδίου ημιαγωγού τρανζίστορ φαινομένου πεδίου (MOSFET) και εκμεταλλεύεται τα τρανζίστορ που παραδοσιακά λειτουργούν σε κόρο. Ωστόσο, υπάρχει η περιοχή ασθενούς αναστροφής, η οποία αφέθηκε ανεκμετάλλευτη μέχρι πρόσφατα, όπου η συμπεριφορά των τρανζίστορ MOS είναι παρόμοια με αυτήν των διπολικών τρανζίστορ. Αυτή η περιοχή θα μπορούσε να αξιοποιηθεί για τις συσκευές που απαιτούν λειτουργία με χαμηλή τάση τροφοδοσίας. Αντί να λειτουργούν στην περιοχή κόρου, τα τρανζίστορ MOS που χρησιμοποιούνται σε αυτό το σχεδιασμό, λειτουργούν σε ασθενή αναστροφή. Τα τρανζίστορ MOS στα προτεινόμενα κυκλώματα είναι ελεγχόμενα από το υπόστρωμα (bulk-driven). Στο συμβατικό τρόπο οδήγησης το υπόστρωμα παραμένει αχρησιμοποίητο και συνδέεται με την χαμηλότερη τάση τροφοδοσίας ή τη γείωση, ενώ η πύλη συνήθως, επιλέγεται για την εισαγωγή σήματος εισόδου και οδηγεί το κύκλωμα. Το υπόστρωμα μπορεί να χρησιμοποιηθεί ως είσοδος για το σήμα, μπορεί να μειώσει την τάση κατωφλίου (threshold voltage) των τρανζίστορ, και τελικά, χαμηλώνει την τάση λειτουργίας του τρανζίστορ. Σε αυτήν την διδακτορική διατριβή χρησιμοποιείται ως διαγωγός (transconductor) ένα τροποποιημένο κύκλωμα Nauta, ο οποίος λειτουργεί σε πολύ χαμηλές τάσεις. Οι ελεγχόμενοι διαγωγοί χρησιμοποιούνται για το σχεδιασμό των προτεινόμενων συντονιζόμενων φίλτρων. Τα κατασκευασμένα φίλτρα μπορούν να συντονιστούν στην περιοχή των λίγων MHz. Τα προτεινόμενα φίλτρα λειτουργούν χρησιμοποιώντας τάση τροφοδοσίας 0.5V και η συχνότητα αποκοπής τους μπορεί εύκολα να προσαρμοστεί. Όλα τα κυκλώματα σχεδιάζονται και εξομοιώνονται χρησιμοποιώντας μία τεχνολογία CMOS triple well 0.13μm. Ο υπό μελέτη τελεστικός ενισχυτής διαγωγιμότητας (Operational Transconductor Amplifier - OTA) έχει τροποποιηθεί περαιτέρω, για να επιτευχθεί καλύτερη απόδοση και να εφαρμοστεί σε ένα μιγαδικό φίλτρο. Η μετατροπή σήματος από τις μεσαίες συχνότητες (IF) στις χαμηλές συχνότητες παρουσιάζεται ένα σημαντικό πρόβλημα όπου μαζί με το επιθυμητό σήμα εμφανίζεται και το σήμα εικόνας στην ίδια συχνότητα. Τα μιγαδικά (complex) φίλτρα μπορούν να αφαιρέσουν εύκολα το σήμα εικόνας, εφαρμόζοντας μια διαδικασία μετατόπισης συχνότητας. Ένα μιγαδικό Leapfrog φίλτρο έχει σχεδιαστεί χρησιμοποιώντας διαφορικούς ενισχυτές διαγωγιμότητας. Το τελικό μιγαδικό φίλτρο δωδέκατης τάξης έχει σχεδιαστεί για να καλύψει τις απαιτήσεις του προτύπου Bluetooth και Zigbee. Το φίλτρο λειτουργεί με τάση τροφοδοσίας 0.5V και έχει πολύ καλά αποτελέσματα στην απόρριψη εικόνας, την ευαισθησία και το θόρυβο. Επίσης, η κεντρική συχνότητα και το εύρος συχνοτήτων είναι ανεξάρτητα ρυθμιζόμενα. Η απόδοση του φίλτρου έχει επαληθευτεί μέσω προσομοίωσης χρησιμοποιώντας μοντέλα τρανζίστορ μιας τεχνολογίας CMOS triple well 0.13μm. Φίλτρα που σχεδιάζονται με την προτεινόμενη μέθοδο μπορούν να εφαρμοστούν σε συσκευές Bluetooth που χρησιμοποιούνται και σε βιοϊατρικές εφαρμογές.

The present thesis is focused on all pass filters. The principle of all pass filters, their properties, the design of nth degree of these circuits will be analysed in succession and then some of functional blocks, by which these structures can be made, will be described. After that, the allpass filters will be designed and simulated in program OrCAD PSpice. First of all, the analysis will be performed with ideal components, then with real components. After that, the sensitivity and tolerance analysis will be made and the influence of parasite effects on circuit parameters will be examined. Once the experiments are finished, the design of Printed Circuit Board's (PCB) will be realized. Circuit showing the best parameters will be chosen for the design.