In a wireless communication system, the RF signal integrity is often deteriorated by power amplifier (PA) nonlinearity and local oscillator (LO) pulling. This dissertation attempts to study power amplifier and local oscillator with the deliberate input distortion or interference for understanding, and hence improving, the resultant RF signal integrity issues. Furthermore, the scope of this study is extended to explore novel wireless applications. Based on the above thoughts, this dissertation includes three topics. The first topic is devoted to a baseband digital predistortion technique for enhancing the power amplifier linearity in a wireless RF transmitter. A digital predistorter has been designed to compensate the amplitude and phase distortion due to the nature of PAs, and the predistortion can enhance the linearity of linear PAs as well as switching-mode PAs. The second topic proceeds with a rigorous analysis of a local oscillator subject to injection signal. A phase-locked loop (PLL) under injection is analyzed in frequency domain to account for the inherent band-pass filtering on an injection signal. Such analysis can further predict the effect of co-frequency or co-channel interference on the PLL phase noise. A discrete-time analysis is also provided to predict output spectra of the LO pulled by a sinusoidal and modulated injection signal. The final topic presents a novel RF sensing circuit for a cognitive radio to sense spectral environment using injection locking and frequency demodulation techniques. The proposed RF sensing circuit can fast and reliably detect frequency and power for analog and digital modulation signals. In addition, the sensing principle and circuit architecture are delivered on theoretical basis developed in this dissertation. A discrete time approach is also investigated to compute the sensed output signal.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Cressler, John; Committee Member: Gerhardt, Rosario; Committee Member: Ingram, Mary Ann; Committee Member: Papapolymerou, John; Committee Member: Shen, Shyh-Chiang. Part of the SMARTech Electronic Thesis and Dissertation Collection.

In downlink multi-user multiple-input multiple-output (MU-MIMO) systems, different users, even multiple data streams serving one user, might require different quality-of-services (QoS). The transceiver should allocate resources to different users aiming at satisfying their QoS requirements. In order to design the optimal transceiver, channel state information is necessary. In practice, channel state information has to to be estimated, and estimation error is unavoidable. Therefore, robust transceiver design, which takes the channel estimation uncertainty into consideration, is important. For the previous robust transceiver designs, bounded estimation errors or Gaussian estimation errors were assumed. However, if there exists unknown distributed interference, the distribution of the channel estimation error cannot be modeled accurately a priori. Therefore, in this thesis, we investigate the robust transceiver design problem in downlink MU-MIMO system under probabilistic QoS constraints with arbitrary distributed channel estimation error. To tackle the probabilistic QoS constraints under arbitrary distributed channel estimation error, the transceiver design problem is expressed in terms of worst-case probabilistic constraints. Two methods are then proposed to solve the worst-case problem. Firstly, the Chebyshev inequality based method is proposed. After the worst-case probabilistic constraint is approximated by the Chebyshev inequality, an iteration between two convex subproblems is proposed to solve the approximated problem. The convergence of the iterative method is proved, the implementation issues and the computational complexity are discussed. Secondly, in order to solve the worst-case probabilistic constraint more accurately, a novel duality method is proposed. After a series of reformulations based on duality and S-Lemma, the worst-case statistically constrained problem is transformed into a deterministic finite constrained problem, with strong duality guaranteed. The resulting problem is then solved by a convergence-guaranteed iteration between two subproblems. Although one of the subproblems is still nonconvex, it can be solved by a tight semidefinite relaxation (SDR). Simulation results show that, compared to the non-robust method, the QoS requirement is satisfied by both proposed algorithms. Furthermore, among the two proposed methods, the duality method shows a superior performance in transmit power, while the Chebyshev method demonstrates a lower computational complexity. / published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy

ITC/USA 2013 Conference Proceedings / The Forty-Ninth Annual International Telemetering Conference and Technical Exhibition / October 21-24, 2013 / Bally's Hotel & Convention Center, Las Vegas, NV / Cobham Electronic Systems, Inc. has developed a digital potentiometer circuit to allow for digital compensation of frequency and temperature variations in the VCO/PLL frequency control loop of a telemetry transmitter. The ability to reprogram the RF center frequency of a telemetry transmitter is a useful feature and is required on many telemetry programs. When setting the frequency modulation deviation (FM Modulation Index) of a telemetry transmitter, the exact setting will change with RF center frequency due to the variation of the transfer function of the VCO (Kvco). Typically, a resistor divider is used to set the frequency modulation deviation level by setting the output data signal amplitude. However, since Kvco varies with respect to RF center frequency, a method of adjusting frequency modulation deviation for each frequency setting is required. The shunt resistor in the resistor divider is replaced with a digital potentiometer to provide the necessary adjustment, using the on-board microprocessor to store a look-up table of settings versus frequency. A key feature of the digital potentiometer circuit is a method to increase the frequency bandwidth of the potentiometer. Digital potentiometers typically have frequency bandwidths measured in kiloHertz to MegaHertz, which limits their use in setting the frequency modulation deviation of high data rate telemetry transmitters. The circuit consists of a 256 position digital potentiometer and several resistors that are used to adjust the slope of the resistance vs. digital code curve and to translate the curve up and down along the Y-Axis. Adding external resistors to the digital potentiometer helps to increase the frequency bandwidth of the digital potentiometer. The selection of the maximum resistance range of the digital potentiometer is also important, as the potentiometer bandwidth is greater when a small portion of the total resistance is used. This paper will explore various methods of increasing the effective bandwidth of a digital potentiometer, with the goal of making them suitable for use in dynamically setting the frequency modulation deviation via digital control.

Cobham Electronic Systems, Inc. has developed a field-programmable telemetry transmitter module for higher-power (0.1W to 25W) airborne telemetry applications. A key feature of the transmitter is high DC to RF conversion efficiency over the entire variable output power range of 25dB through the use of GaN amplifiers. This high efficiency is realized by using a variable voltage DC-DC converter and dynamic bias control of the GaN amplifier elements. This feature is useful in that output power can be tailored to mission requirements and timelines, thereby extending battery life and increasing operation time. The transmitter receives configuration commands and can be programmed through an external data port. The transmitter can be configured for RF power and frequency over the telemetry S-Band frequency range, and has multiple data rates. The unit consists of RF, digital and power supply circuits. The RF transmitter is a PCM-FM type with a phase-locked loop, driver amplifiers, a power amplifier and a digital processor for RF control. The unit contains a digital processor, FPGA's, and flash memory. The power supplies contains all the regulator circuits to supply power to the rest of the unit, variable output drain voltage to the GaN devices, EMI filtering, under/overvoltage protection, a temperature sensor and a digital processor for power control. The electronics are housed in a compact aluminum housing.

The aim of this paper is to study the different parts of a wireless system in order to better understand the signal properties and what key factors changes the signal during its transmission. Two transmitters were created, an FM transmitter that transmits analog data and an Arudino board programed to convert data to bits before its transmission. The acquired signals were then compared to the original signal noting how differently the data had changed. To understand the antennas contribution to the system a simulation was done using High Frequency Structural Simulator. A description of the analysis on the different acquired signals was done to determine the best applications they might have.

abstract: The demand for the higher data rate in the wireless telecommunication is increasing rapidly. Providing higher data rate in cellular telecommunication systems is limited because of the limited physical resources such as telecommunication frequency channels. Besides, interference with the other users and self-interference signal in the receiver are the other challenges in increasing the bandwidth of the wireless telecommunication system. Full duplex wireless communication transmits and receives at the same time and the same frequency which was assumed impossible in the conventional wireless communication systems. Full duplex wireless communication, compared to the conventional wireless communication, doubles the channel efficiency and bandwidth. In addition, full duplex wireless communication system simplifies the reusing of the radio resources in small cells to eliminate the backhaul problem and simplifies the management of the spectrum. Finally, the full duplex telecommunication system reduces the costs of future wireless communication systems. The main challenge in the full duplex wireless is the self-interference signal at the receiver which is very large compared to the receiver noise floor and it degrades the receiver performance significantly. In this dissertation, different techniques for the antenna interface and self-interference cancellation are proposed for the wireless full duplex transceiver. These techniques are designed and implemented on CMOS technology. The measurement results show that the full duplex wireless is possible for the short range and cellular wireless communication systems. / Dissertation/Thesis / Doctoral Dissertation Engineering 2017

No description available.

Norwegian Centre for Space-related Education (NAROM) performs education within subject areas related to space, such as space physics, atmosphere and space technology. This thesis describes the development of a transmitter to be used in NAROM ́s studentrocket. The requirements were that the transmitter should send with FM at 2279,5 MHz with an output of at least 750 milliwatt and with a speed of 512 kbit/s when NRZ coding is used.The transmitter that was designed and tested in this project used an IC that modulated the signal to FM and sent it out on a low frequency. Then the frequency was multiplied by a IC to the correct value, 2279,5 MHz. Experiments showed that the transmitter worked satisfying, but a problem occurred: The frequency multiplier sent out unwanted overtones and the output power was to low. A final theoretical design was made to solve these problems. The final design uses the same modulation components as the tested transmitter, but filters are added and the amplifiers are changed to be able to handle the filters and give out a higher power. The transmitter can be use for other application that need a transmitter with bit-rate of up to 600 kbit/s and frequency range of 2250-2300 MHz without change of filters. If the filters is change the frequency range will be 2250-2550 MHz. / <p>Validerat; 20131025 (global_studentproject_submitter)</p>

La très faible consommation dans les appareilles modernesest le facteur-clé pour les capteurs alimentée par une source d’énergierécupérée. La réduction du budget de puissance peut être atteinte grâceà différents techniques lié à trois niveaux d’abstraction : transistor, circuitet système. L’objet de cette thèse est l’analyse et la conception descircuits à très faible consommation pour des réseaux des capteurs sansfils. A’ régulateur de tension et an émetteur RF ont été examiné. Lepremier est le circuit principal pour la gestion de puissance ; il agitcomme interface entre le transducteur et les autres circuits du capteur.L’metteur est le circuit que exiges le plus de puissance pour fonctionner,donc une réduction de sa puissance il permet une augmentation de lavie opérationnelle du capteur. / In the modern devices Ultra-low power consumption is thesurvival key for the energy-harvested sensor node. The reduction of thepower budget can be achieved by mixing different low–power techniquesat three levels of abstraction: transistor level, circuit level and systemlevel. This thesis deals with the analysis and the design of Ultra-LowPower (ULP) circuits suitable for Energy-Harvesting Wireless SensorNetworks (EHWSN). In particular, voltage regulator and RF transmissioncircuits are examined. The former is the main block in powermanagement unit; it interfaces the transducer circuit with the rest of thesensor node. The latter is the most energy hungry block and thusdecreasing its power consumption can drastically increases the sensoron-time.