Loss-of-control resulting from airplane upset is a leading cause of worldwide commercial aircraft accidents. One of the upset prevention and recovery strategies currently being considered is to provide pilot upset recovery training using ground-based flight simulators. However, to simulate the large amplitude and highly dynamic motions seen in upset conditions, both the flight model and the simulator motion need improvement. In this thesis, an enhanced flight model is developed to better represent the aircraft dynamics in upset conditions. In particular, extension is made to the aerodynamic database of an existing Boeing 747-100 (B-747) model to cover large angle of attack, sideslip and angular rates. The enhanced B-747 model is then used to conduct a set of upset recovery experiments in a flight simulator without motion. The experimental results can be used to identify and potentially correct major motion cueing errors caused by the conventional motion drive algorithm in upset conditions.

Loss-of-control resulting from airplane upset is a leading cause of worldwide commercial aircraft accidents. One of the upset prevention and recovery strategies currently being considered is to provide pilot upset recovery training using ground-based flight simulators. However, to simulate the large amplitude and highly dynamic motions seen in upset conditions, both the flight model and the simulator motion need improvement. In this thesis, an enhanced flight model is developed to better represent the aircraft dynamics in upset conditions. In particular, extension is made to the aerodynamic database of an existing Boeing 747-100 (B-747) model to cover large angle of attack, sideslip and angular rates. The enhanced B-747 model is then used to conduct a set of upset recovery experiments in a flight simulator without motion. The experimental results can be used to identify and potentially correct major motion cueing errors caused by the conventional motion drive algorithm in upset conditions.

Thesis (M.S.)--Ohio University, March, 1985. / Title from PDF t.p.

Magnesium alloys are being increasing considered for many automotive applications due their low density and high strength to weight ratio. However, joining of these materials by welding and especially to dissimilar materials such as aluminum or steel or mechanically by riveting at room temperature have faced many challenges. Research presented in thesis explores a new hot joining process referred to as Upset Protrusion Joining (or UPJ) as a means of mechanically joining cast magnesium alloy to other similar or dissimilar sheet materials. UPJ is being developed as a rapid and reliable joining method to be implemented in the automotive industry for weight and manufacturing cost reduction. It involves a cylindrical protrusion emanating perpendicular to the flat surface of a cast plate-like magnesium component that is fitted through a hole in another plate or sheet material. The two components are then clamped together, electrically heated and compressed perpendicular to the axis of the protrusion. During this process, the protrusion expands circumferentially to fill the hole as well as the region above the hole thus entrapping the sheet metal between the mushroomed head and the casting. The effect of different UPJ process parameters such as applied current, current duration, compression loading rate and compression distance were studied through experimentation that involved a newly developed computer-controlled experimental UPJ setup. The studies involved two cast magnesium alloys of interest to automotive industry, AM60 and AZ91, with protrusions of 11 mm diameter and 14 mm height on a 2 mm thick plate. Studies of the material properties and UPJ process parameters were performed to find optimal process parameters to achieve satisfactory quality of the joint in terms of post-UPJ joint strength with appearance. Also, microstructural studies, temperature measurements in the protrusion region, and electrical resistivity measurements were performed for the two alloys to fundamentally understand their roles in promoting temperature dependent material flow, strain localization, and fracture in the UPJ process. Lastly, materials specific process window for UPJ process was identified based on the experimental work for creation of robust UPJ joints with acceptable joint strengths in tensile shear mode of failure. This new hot joining method was shown as an industrially viable joining method for cast magnesium component. UPJ is a rapid joining method and provides good joint-strength depending upon joint specifications. This method can be implemented in automotive and other industrial manufacturing environment for joining cast component to a similar or dissimilar wrought sheet component. / Thesis / Master of Applied Science (MASc)

Currently, it is uncertain how well a typical ground-based simulator's hexapod motion system can simulate the aggressive motion during airplane upset. To address this issue, this thesis attempts to improve simulator motion for upset recovery simulation by defining new motion fidelity criteria, implementing body frame filtering, and improving an existing adaptive motion drive algorithm. The successfully improved adaptive algorithm was used to conduct a paired comparison experiment to study the effects of trade-offs between translational and rotational motion cues on pilot subjective fidelity and upset recovery performance. Analysis of the experimental data found that pilots generally rejected motion with false lateral cues and they preferred the presence of rotational cues for moderate roll angles. Also, performance analysis suggested that roll cues helped improve lateral control. Overall, pilots preferred to have simulator motion during upset simulation and significant improvements in performance were observed when simulator motion was present.

Currently, it is uncertain how well a typical ground-based simulator's hexapod motion system can simulate the aggressive motion during airplane upset. To address this issue, this thesis attempts to improve simulator motion for upset recovery simulation by defining new motion fidelity criteria, implementing body frame filtering, and improving an existing adaptive motion drive algorithm. The successfully improved adaptive algorithm was used to conduct a paired comparison experiment to study the effects of trade-offs between translational and rotational motion cues on pilot subjective fidelity and upset recovery performance. Analysis of the experimental data found that pilots generally rejected motion with false lateral cues and they preferred the presence of rotational cues for moderate roll angles. Also, performance analysis suggested that roll cues helped improve lateral control. Overall, pilots preferred to have simulator motion during upset simulation and significant improvements in performance were observed when simulator motion was present.

As the feature size of integrated circuits goes down to the nanometer scale, transient and permanent reliability issues are becoming a significant concern for circuit designers. Traditionally, the reliability issues were mostly handled at the device level as a device engineering problem. However, the increasing severity of reliability challenges and higher error rates due to transient upsets favor higher-level design for reliability (DFR). In this work, we develop several methods for DFR at the circuit level. A major source of transient errors is the single event upset (SEU). SEUs are caused by high-energy particles present in the cosmic rays or emitted by radioactive contaminants in the chip packaging materials. When these particles hit a N+/P+ depletion region of an MOS transistor, they may generate a temporary logic fault. Depending on where the MOS transistor is located and what state the circuit is at, an SEU may result in a circuit-level error. We analyze SEUs both in combinational logic and memories (SRAM). For combinational logic circuit, we propose FASER, a Fast Analysis tool of Soft ERror susceptibility for cell-based designs. The efficiency of FASER is achieved through its static and vector-less nature. In order to evaluate the impact of SEU on SRAM, a theory for estimating dynamic noise margins is developed analytically. The results allow predicting the transient error susceptibility of an SRAM cell using a closedform expression. Among the many permanent failure mechanisms that include time-dependent oxide breakdown (TDDB), electro-migration (EM), hot carrier effect (HCE), and negative bias temperature instability (NBTI), NBTI has recently become important. Therefore, the main focus of our work is NBTI. NBTI occurs when the gate of PMOS is negatively biased. The voltage stress across the gate generates interface traps, which degrade the threshold voltage of PMOS. The degraded PMOS may eventually fail to meet timing requirement and cause functional errors. NBTI becomes severe at elevated temperatures. In this dissertation, we propose a NBTI degradation model that takes into account the temperature variation on the chip and gives the accurate estimation of the degraded threshold voltage. In order to account for the degradation of devices, traditional design methods add guard-bands to ensure that the circuit will function properly during its lifetime. However, the worst-case based guard-bands lead to significant penalty in performance. In this dissertation, we propose an effective macromodel-based reliability tracking and management framework, based on a hybrid network of on-chip sensors, consisting of temperature sensors and ring oscillators. The model is concerned specifically with NBTIinduced transistor aging. The key feature of our work, in contrast to the traditional tracking techniques that rely solely on direct measurement of the increase of threshold voltage or circuit delay, is an explicit macromodel which maps operating temperature to circuit degradation (the increase of circuit delay). The macromodel allows for costeffective tracking of reliability using temperature sensors and is also essential for enabling the control loop of the reliability management system. The developed methods improve the over-conservatism of the device-level, worstcase reliability estimation techniques. As the severity of reliability challenges continue to grow with technology scaling, it will become more important for circuit designers/CAD tools to be equipped with the developed methods. / text

In 2005, Alon, et al. proved that tournaments arising from majority voting scenarios have minimum dominating sets that are bounded by a constant that depends only on the notion of what is meant by a majority. Moreover, they proved that when a majority means that Candidate A beats Candidate B when Candidate A is ranked above Candidate B by at least two out of three voters, the tournament used to model this voting scenario has a minimum dominating set of size at most three. This result gives 2-majority tournaments some significance among all tournaments and motivates us to investigate when a given tournament can be considered a 2-majority tournament. In this thesis, we prove, among other things, that the presence of an upset path in a tournament allows us to conclude the tournament is realizable as a 2-majority tournament.

Laser Fault Injection (LFI) testing has been demonstrated to be a useful tool in the prediction of single event upset rates in microcircuits. In addition LFI has contributed to the basic understanding of the mechanisms that cause single event upsets. However, very little research has been performed on the viability of LFI as a tool for verifying fault tolerant designs incorporated in ASICs, FPGAs, microprocessors and embedded systems. Current fault tolerant design verification techniques such as simulation and test have several significant limitations that prevent the complete verification of a fault tolerant design. However, LFI possesses spatial, temporal and financial advantages related to its use, which are very beneficial. This thesis presents results of the fault tolerance verification tests that were performed using laser fault injection on a four-bit fault tolerant filter that was implemented in a commercial FPGA.

With the increment of mobile, biomedical and space applications, digital systems with low-power consumption are required. As a main part in digital systems, low-power memories are especially desired. Reducing the power supply voltages to sub-threshold region is one of the effective approaches for ultra low-power applications. However, the reduced Static Noise Margin (SNM) of Static Random Access Memory (SRAM) imposes great challenges to the subthreshold SRAM design. The conventional 6-transistor SRAM cell does not function properly at sub-threshold supply voltage range because it has no enough noise margin for reliable operation. In order to achieve ultra low-power at sub-threshold operation, previous research work has demonstrated that the read and write decoupled scheme is a good solution to the reduced SNM problem. A Dual Interlocked Storage Cell (DICE) based SRAM cell was proposed to eliminate the drawback of conventional DICE cell during read operation. This cell can mitigate the singleevent effects, improve the stability and also maintain the low-power characteristic of subthreshold SRAM, In order to make the proposed SRAM cell work under different power supply voltages from 0.3 V to 0.6 V, an improved replica sense scheme was applied to produce a reference control signal, with which the optimal read time could be achieved. In this thesis, a 2K~8 bits SRAM test chip was designed, simulated and fabricated in 90nm CMOS technology provided by ST Microelectronics. Simulation results suggest that the operating frequency at VDD = 0.3 V is up to 4.7 MHz with power dissipation 6.0 ÊW, while it is 45.5 MHz at VDD = 0.6 V dissipating 140 ÊW. However, the area occupied by a single cell is larger than that by conventional SRAM due to additional transistors used. The main contribution of this thesis project is that we proposed a new design that could simultaneously solve the ultra low-power and radiation-tolerance problem in large capacity memory design.