VLIW processors are parallel computing devices that are used in embedded devices as well as in servers. My thesis contains description of this architecture. It is aimed at making and subsequently implementing design of custom general-purpose VLIW processor with wide range of configurable parameters. Operational implementation of such processor in VHDL which can be tested on FITkit platform is an integral part.

The aim of this thesis is to draft and implement high-speed encryptor of network trafic with throughput 10Gb/s in one way. It has been implementated for FPGA Xilinx Virtex5vlx155t placed on card COMBOv2-LXT. The encryption is based on AES algorithm using 128 bit key length. The security protokol is ESP in version for protokol IPv4. Design is fully synthesizable with tool Xilinx ISE 11.3, however it is not tested on real hardware. Tests in simulation works fine.

This work deals with modernization of information LED panels. It mainly focuses on utilizing input HDMI interface into FPGA, which controls modular LED displays, but also on ensuring professional functions such as communication with control unit, thermal security and detection of faulty LED.

The goal of this thesis is to design a hardware realization of circuit which will implement the AES algorithm. A motivation was to make an acceleration against the classic software encryption. The acceleration is achieved by special designed parts of the circuit, which correspond to particular operations of the AES algorithm. First, there was necessary to design the circuit. In the next step there was a need to describe the designed circuit by the VHDL language. Then the circuit was simulated and synthesized. Due to comparing the circuit with software processing a software implementation was created. Both implementations were created for the FITKit platform. The hardware implementation is made by the FPGA technology and the software implementation is realized in a microcontroller. The result of the thesis is almost one thousandfold acceleration against the classic software encryption.

This paper deals with the design and implementation of the Processing Unit for Analysis and Modification of Network Traffic. The proposed unit is intended to analyse an incoming network traffic and perform packet header editations to provide the proper packet delivery. The designed architecture has the following characteristics. It is based on the stream processor concept which allows to process independent stream elements (i.e. packets) in parallel. Multiply stream clients can be used to process the same stream data concurrently. The stream clients can be driven either autonomously or by program. The packets are processed according to the incoming metadata and transmited to the output. The Processing Unit has been implemented in VHDL language. The target technology is Field Programmable Gate Array (FPGA).

Current FPGA technology has advanced to the point that useful embedded System-on-Programmable-Chips (SoPC)s can now be designed. The Real Time Processor (RTP) project leverages the advances in FPGA technology with a system architecture that is customizable to specific real-time applications. The design and implementation of the framework for architecting such a system from ANSI-C code is presented. The Small Device C Compiler (SDCC) was retargeted to the RTP architecture and extended to produce a generator directive file. The RTPGen hardware generator was created to consume the directive file and produce a highly customized top-level structural VHDL file that can be synthesized and programmed onto an FPGA such as the Xilinx Spartan-3. Thus, an application specific multiprocessor real-time embedded system is realized from ANSI-C code.

This thesis aims to develop hardware for laboratory in courses such asSwitching Theory at Halmstad University which can help students tounderstand practical applications of the hardware they are studying atuniversity. To achieve this, a printed circuit board (PCB) that simulates trafficintersections has been designed, constructed, and tested.The project consists of four main phases. The first step is to create anequipment list to identify the components needed to meet our goals. Then, theschematic design phase is started using KiCad program for PCB design. Aprinted circuit board is manufactured, and all the components lists in theequipment inventory is carefully soldered. This step completes the secondstage, involving PCB fabrication and component placement. The next step isto program one intersection using an embedded system according to a statemachine and ensure the PCB works properly. For this purpose, a statemachine is developed to describe test conditions and program sequences.

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