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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
511

BIST methodology for low-cost parametric timing measurement of high-speed source synchronous interfaces

Kim, Hyun Jin, doctor of electrical and computer engineering 14 February 2013 (has links)
With the scaling of technology nodes, the speed performance of microprocessors has rapidly improved but the scaling of off-chip input/output (I/O) bandwidth is limited by physical pin resources and interconnect technologies. In order to reduce the performance gaps, new interface techniques have emerged and the marketplace has moved towards higher levels of integration with system on a chip (SoC) implementations. The advent of new techniques, however, has led to new challenges on the semiconductor and automated test equipment (ATE) industries. The relatively slow growing ATE technology comparing to I/O speeds especially intensifies manufacturing test issues. Testing high speed I/O timing parameters requires expensive high performance test equipment with high accuracy and resolution. The requirements increase integrated circuit (IC) manufacturing costs and thus test issues have become critical. This thesis focuses on on-chip test methods to improve test accuracy and reduce test costs for high speed double data rate (DDR) memory I/Os using source synchronous clocking. For testing the I/O timing parameters, a phase interpolator based on-chip timing sampler using a cycle-by-cycle control method was developed. This circuit generates data and clock patterns and controls the time delay between data and clock to detect the timing mismatch which indicates timing degradations. The on-chip timing sampler was implemented as a built-in self test (BIST) circuit for low-cost parametric timing measurements. The BIST scheme was fabricated with a 0.18-um CMOS process technology. Using the static and dynamic modes, measurement results are obtained for the I/O timing parameters such as the setup and hold times, input voltage-level variations tolerances, duty distortion tolerances and data skews. Moreover, a delay mismatch measurement method was developed to improve measurement accuracy using a simple control circuit. This delay mismatch detector measures timing mismatches between data and clock paths and then the timing mismatches are converted to timing specifications. This scheme is also implemented along with analog to digital converter (ADC) to collect digital test results supporting low-cost system-level tests. Thus, the low-frequency test results show that our on-chip measurement techniques provide an attractive low-cost solution and is effectively applied for testing high speed source synchronous systems. / text
512

Networked control and efficient transmission in sensor networks

Wu, Wei, doctor of electrical and computer engineering 28 August 2008 (has links)
Enabling "intelligent environments" that are effortlessly automated is a key promise of sensor networks of the future. These networks have a wide range of domains in which they can be effectively deployed, including health-care, emergency response, manufacturing and surveillance. Unlike the majority of existing (and perhaps better-understood) network configurations, wireless-implemented sensor networks suffer from extremely stringent constraints in terms of scalability and end-goal of deployment. Thus, it is imperative that we determine solutions that are tailored to the constraints and goals of these systems, by bringing together ideas in the domains of control, computing and communications to a common analytical platform. In this dissertation, we build a theoretical framework that uses system theory, stochastic control, queuing theory and information theory to determine the following: 1. A characterization of the stability and optimal control policies with sensor querying (i.e. which set of sensors must be queried and when) using system theory and stochastic control; 2. A delay-optimal energy efficient transmission scheme for these networks (i.e. with what power level must they communicate) using heavy traffic limits and stochastic control; and 3. A cooperative transmission strategy for maximizing capacity of these networks (i.e. how they should encode their data to send the most through) using network information theory.
513

Manifold signal processing for MIMO communications

Inoue, Takao, doctor of electrical and computer engineering 13 June 2011 (has links)
The coding and feedback inaccuracies of the channel state information (CSI) in limited feedback multiple-input multiple-output (MIMO) wireless systems can severely impact the achievable data rate and reliability. The CSI is mathematically represented as a Grassmann manifold or manifold of unitary matrices. These are non-Euclidean spaces with special constraints that makes efficient and high fidelity coding especially challenging. In addition, the CSI inaccuracies may occur due to digital representation, time variation, and delayed feedback of the CSI. To overcome these inaccuracies, the manifold structure of the CSI can be exploited. The objective of this dissertation is to develop a new signal processing techniques on the manifolds to harvest the benefits of MIMO wireless systems. First, this dissertation presents the Kerdock codebook design to represent the CSI on the Grassmann manifold. The CSI inaccuracy due to digital representation is addressed by the finite alphabet structure of the Kerdock codebook. In addition, systematic codebook construction is identified which reduces the resource requirement in MIMO wireless systems. Distance properties on the Grassmann manifold are derived showing the applicability of the Kerdock codebook to beam-forming and spatial multiplexing systems. Next, manifold-constrained algorithms to predict and encode the CSI with high fidelity are presented. Two prominent manifolds are considered; the Grassmann manifold and the manifold of unitary matrices. The Grassmann manifold is a class of manifold used to represent the CSI in MIMO wireless systems using specific transmission strategies. The manifold of unitary matrices appears as a collection of all spatial information available in the MIMO wireless systems independent of specific transmission strategies. On these manifolds, signal processing building blocks such as differencing and prediction are derived. Using the proposed signal processing tools on the manifold, this dissertation addresses the CSI coding accuracy, tracking of the CSI under time variation, and compensation techniques for delayed CSI feedback. Applications of the proposed algorithms in single-user and multiuser systems show that most of the spatial benefits of MIMO wireless systems can be harvested. / text
514

Modelling, information capacity, and estimation of time-varying channels in mobile communication systems

Sadeghi, Parastoo, School of Electrical Engineering And Telecommunications, UNSW January 2006 (has links)
In the first part of this thesis, the information capacity of time-varying fading channels is analysed using finite-state Markov channel (FSMC) models. Both fading channel amplitude and fading channel phase are modelled as finite-state Markov processes. The effect of the number of fading channel gain partitions on the capacity is studied (from 2 to 128 partitions). It is observed that the FSMC capacity is saturated when the number of fading channel gain partitions is larger than 4 to 8 times the number of channel input levels. The rapid FSMC capacity saturation with a small number of fading channel gain partitions can be used for the design of computationally simple receivers, with a negligible loss in the capacity. Furthermore, the effect of fading channel memory order on the capacity is studied (from first- to fourth-order). It is observed that low-order FSMC models can provide higher capacity estimates for fading channels than high-order FSMC models, especially when channel states are poorly observable in the presence of channel noise. To explain the effect of memory order on the FSMC capacity, the capacities of high-order and low-order FSMC models are analytically compared. It is shown that the capacity difference is caused by two factors: 1) the channel entropy difference, and 2) the channel observability difference between the high-order and low-order FSMC models. Due to the existence of the second factor, the capacity of high-order FSMC models can be lower than the capacity of low-order FSMC models. Two sufficient conditions are proven to predict when the low-order FSMC capacity is higher or lower than the high-order FSMC capacity. In the second part of this thesis, a new implicit (blind) channel estimation method in time- varying fading channels is proposed. The information source emits bits ???0??? and ???1??? with unequal probabilities. The unbalanced source distribution is used as a priori known signal structure at the receiver for channel estimation. Compared to pilot-symbol-assisted channel estimation, the proposed channel estimation technique can achieve a superior receiver bit error rate performance, especially at low signal to noise ratio conditions.
515

Laser Crystallisation of Silicon for Photovoltaic Applications using Copper Vapour Lasers

Boreland, Matt, School of Electrical Engineering, UNSW January 1999 (has links)
Thin film silicon on low temperature glass substrates is currently seen as the best path toreduce the $/W cost of photovoltaic (PV) modules. However, producing thin film polysilicon, on glass, is an ongoing research challenge. Laser crystallisation of a-Si is one of the possible methods. Typically excimer (XMR) lasers are used for laser crystallisation. This thesis introduces the copper vapour laser (CVL) as a viable alternative for thin film photovoltaic applications. The CVL, like the XMR, is a high powered, pulsed laser. However, the CVL has higher pulse rates (4-20kHz), better beam quality and a visible wavelength output (578 & 511nm). Preliminary experiments, using 600K-heated silicon-on-quartz samples, confirmed that CVL crystallisation can produce area weighted average grain size of 0.1-0.15??m, which is comparable to results reported for XMR??? s. Importantly, the CVL results used thicker films (1??m), which is more applicable to thin photovoltaic devices that need 1-10??m of silicon to be viable. The CVL??? s longer wavelength and therefore longer penetration depth (1/alpha) are proffered as the main reason for this result. Extensive laser-thermal modelling highlighted further opportunities specific to CVL crystallisation. Through-the-glass doublesided irradiation was shown in simulations to reduce thermal gradients, which would enhance crystal growth. The simulations also produced deeper melts at lower surface temperatures, reducing the thermal stress on the sample. Subsequent experiments, using silicon-on-glass, confirmed the benefit of through-the-glass doublesided irradiation by maintaining grain sizes without the usual need for substrate heating. Furthermore, Raman analysis showed that doublesided crystallisation achieved full depth crystallisation, unlike single side irradiation which produced partial crystallisation. A new mode of crystallisation, stepwise crystallisation, was also postulated whereby a series of CVL pulses could be used to incrementally increase the crystallisation depth into the silicon. Simulations confirmed the theoretical basis of the concept, with HeNe Raman spectroscopy and analysis of surface grain sizes providing indirect experimental support. The CVL??? s ability to crystallise thicker films more directly applicable to photovoltaic devices secures its viability as an alternative laser for photovoltaic applications. The through-the-glass doublesided irradiation and the stepwise crystallisation provide additional potential for increased process flexibility over XMR???s.
516

Adaptive techniques for scalable video compression

Mehrseresht, Nagita, Electrical Engineering & communication, UNSW January 2005 (has links)
In this work we investigate adaptive techniques which can be used to improve the performance of highly scalable video compression schemes under resolution scaling. We propose novel content adaptive methods for motion compensated 3D discrete wavelet transformation (MC 3D-DWT) of video. The proposed methods overcome problems of ghosting and non-aligned aliasing artifacts, which can arise in regions of motion model failure, when the video is reconstructed at reduced temporal or spatial resolutions. We also study schemes which facilitate simultaneous scaling of compressed video bitstreams based on both constant bit-rate and constant distortion criteria, using simple and generic scaling operations. In regions where the motion model fails, the motion compensated temporal discrete wavelet transform (MC TDWT) causes ghosting artifacts under frame-rate scaling, due to temporal lowpass filtering along invalid motion trajectories. To avoid ghosting artifacts, we adaptively select between different lowpass filters, based on a local estimate of the motion modelling accuracy. Experimental results indicate that the proposed adaptive transform substantially removes ghosting artifacts while also preserving the high compression efficiency of the original MC TDWT. We also study the impact of various MC 3D-DWT structures on spatial scalability. Investigating the interaction between spatial aliasing, scalability and energy compaction shows that the t+2D structure essentially has higher compression efficiency. However, where the motion model fails, structures of this form cause non-aligned aliasing artifacts under spatial scaling. We propose novel adaptive schemes to continuously adapt the structure of MC 3D-DWT based on information available within the compressed bitstream. Experimental results indicate that the proposed adaptive structure preserves the high compression efficiency of the t+2D structure while also avoiding the appearance of non-aligned aliasing artifacts under spatial scaling. To provide simultaneous rate and distortion scaling, we study ???layered substream structure. Scaling based on distortion generates variable bit-rate traffic which satisfies the desired average bit-rate and is consistent with the requirements of leaky-bucket traffic models. We propose a novel method which also satisfies constraints on instantaneous bit-rate. This method overcomes the weakness of previous methods with small leaky-bucket buffer sizes. Simulation results indicate promising performance with both MC 3D-DWT interframe and JPEG2000 intraframe compression.
517

Boron tribromide sourced boron diffusions for silicon solar cells

Slade, Alexander Mason, Electrical Engineering, UNSW January 2005 (has links)
This thesis undertakes the development, characterization and optimization of boron diffusion for silicon solar cells. Heavy diffusions (sheet resistance < 40 Ohm/square) to form a back surface field, and light diffusions (sheet resistance > 100 Ohm/square) to form oxide-passivated emitters were developed. Test structures and solar cells were fabricated to assess uniformity, lifetime and recombination effects due to the light and heavy boron diffusions. It was found that the growth of a thin ~200 ??, thermal oxide, during stabilization ??? immediately prior to the boron diffusion - was required to maintain high lifetime and reduce surface recombination (reducing the emitter saturation current density) for all boron diffusions. The heavy boron diffusion process was incorporated into the single side buried contact solar cell processing sequence. The solar cells fabricated had both boron diffused and Al/Si alloyed P+ regions for comparison. This research conclusively showed that boron diffused solar cells had significantly higher open circuit voltage compared to Al/Si alloyed devices. Fabrication of n-type solar cells, and their subsequent characterization by overlayed secondary electron image and the electron beam induced current map showed that the Al/Si alloy varied in depth from 5 to 25 micrometers deep. Methodology and characterization for light, oxide-passivated boron diffusions are also presented. This study yielded boron diffused emitters (sheet resistance > 100 Ohm/square) with low emitter saturation current. It was observed that this was possible only when the thermal oxidation after the boron diffusion was minimal, less than 1,000 ??. This was due to the segregation effect of boron with oxide, decreasing the surface concentration that in turn decreased the electric field repulsion of electrons from the surface. Device modelling of n-type solar cells is presented where the parameters of the modelling include the results of the light, oxide-passivated boron diffusions. This modelling shows n-type-base material with light oxide-passivated boron diffusion has higher potential conversion efficiency than forming a solar cell from phosphorous diffused p-type material.
518

Silica-on-silicon lightwave circuits based on multimode interference for optical communications

Jin, Zhe, Electrical Engineering & Telecommuncations, UNSW January 2006 (has links)
The thesis focuses the design and fabrication of silica-on-silicon multimode interference (MMI) devices for optical communications. Firstly, the relationship between different kinds of multimode interference was established for the first time. This gives a clearer understanding of the multimode interference and helps to design better performance optical MMI devices With the consideration of weak lateral light confinement, different kinds of novel approaches to designing high performance MMI devices are developed. The first new approach is for optimization of silica-on-silicon MMI couplers. It is shown that the length of the multimode section can be varied in a well-defined range to find optimal device performance. The range is linked to the propagation constant spacing of fundamental and higher order modes of the multimode waveguide. The second approach is to introduce a new criterion for designing a MMI coupler with central input. According to overlapping interference analysis, one image space should be left for the adjacent output waveguides because of the lateral distribution of alternatively vanishing and non-vanishing images. This consideration is neglected in previous work and is shown to be important for achieving good uniformity MMI power splitters. Thirdly, a new design of silica-on-silicon multimode interference (MMI) device is proposed. Deeply etched air trenches define the boundaries of the multimode section to achieve strong lateral confinement, resulting in lower loss and imbalance. The access waveguides, however, are buried channel and square core, giving low fibre insertion loss and low polarization dependence. The novel design balanced requirement of the strong lateral confinement of the field in the multimode waveguides and the matching between the fiber and the access waveguides. Then a new approach of designing silica-on-silicon optical switches based on cascaded MMI couplers is presented. The approach combines the transfer matrix method, optimisation of the MMI dimensions, and mode propagation analysis (MPA) for calculation of phase shifts. The feasibility of the large port count switches is also discussed. It is shown that the good performance devices can be realized with a large port count of 32. Finally MMI couplers based on silica-on-silicon optical waveguides were fabricated. The Ge-doped silica waveguides were fabricated by HC-PECVD and RIE. Fabrication processes such as thin film deposition and etching are discussed. Good performance devices have been realized.
519

Silica-on-silicon lightwave circuits based on multimode interference for optical communications

Jin, Zhe, Electrical Engineering & Telecommuncations, UNSW January 2006 (has links)
The thesis focuses the design and fabrication of silica-on-silicon multimode interference (MMI) devices for optical communications. Firstly, the relationship between different kinds of multimode interference was established for the first time. This gives a clearer understanding of the multimode interference and helps to design better performance optical MMI devices With the consideration of weak lateral light confinement, different kinds of novel approaches to designing high performance MMI devices are developed. The first new approach is for optimization of silica-on-silicon MMI couplers. It is shown that the length of the multimode section can be varied in a well-defined range to find optimal device performance. The range is linked to the propagation constant spacing of fundamental and higher order modes of the multimode waveguide. The second approach is to introduce a new criterion for designing a MMI coupler with central input. According to overlapping interference analysis, one image space should be left for the adjacent output waveguides because of the lateral distribution of alternatively vanishing and non-vanishing images. This consideration is neglected in previous work and is shown to be important for achieving good uniformity MMI power splitters. Thirdly, a new design of silica-on-silicon multimode interference (MMI) device is proposed. Deeply etched air trenches define the boundaries of the multimode section to achieve strong lateral confinement, resulting in lower loss and imbalance. The access waveguides, however, are buried channel and square core, giving low fibre insertion loss and low polarization dependence. The novel design balanced requirement of the strong lateral confinement of the field in the multimode waveguides and the matching between the fiber and the access waveguides. Then a new approach of designing silica-on-silicon optical switches based on cascaded MMI couplers is presented. The approach combines the transfer matrix method, optimisation of the MMI dimensions, and mode propagation analysis (MPA) for calculation of phase shifts. The feasibility of the large port count switches is also discussed. It is shown that the good performance devices can be realized with a large port count of 32. Finally MMI couplers based on silica-on-silicon optical waveguides were fabricated. The Ge-doped silica waveguides were fabricated by HC-PECVD and RIE. Fabrication processes such as thin film deposition and etching are discussed. Good performance devices have been realized.
520

Hardware implementation of V-BLAST MIMO

Sobhanmanesh, Fariborz, School of Electrical Engineering And Telecommunications, UNSW January 2006 (has links)
The exploitation of the theoretically enormous capacity achieved by the multiple transmit and receive antennas systems (MIMO) in a rich scattering communication channel has been the subject of vast body of research on the field of MIMO. In particular, the Vertically-layered Bell Laboratories Layered Space-Time (V-BLAST) is a well known MIMO architecture which has demonstrated the enormous capacity of 20-40 bit/s/Hz in an indoor propagation environment with realistic SNR and error rates. However, due to the intensive computation involved, it would be difficult to implement this architecture for high data rate communication systems. Some works have been done to improve the receiver complexity and performance by coding techniques, by different detection architectures. In this thesis, we have focused on QR-based decoders for V-BLAST MIMO. For a suitable V-BLAST detection implementation, we need to carefully consider the problem from algorithmic, arithmetic and architectural aspects. At the algorithmic level, the numerical stability and robustness should be considered. At the arithmetic level, signal quantization is important, and, at the architectural level, parallelism and pipelining require attention. We have performed the above mentioned optimization on the 1-pass QR factorization with back substitution SIC (Symbol Interference Cancellation) decoder in chapter 3. At first optimizations are made on the proposed algorithm and architecture using MATLAB simulations. Then a new architecture for the QR-factorizer as the core processor of the V-BLAST decoder is developed in chapter 4. This architecture uses only two low complexity CORDIC (Coordinate rotation digital computer) processors. The parameterized feature of the controller and address generator blocks of this architecture has provided a scalable architecture for the implementation of QR factorization for square matrix of any dimension. The reduced hardware complexity of the processors and its simple parameterized controller are two outstanding features of the architecture, resulting in a more suitable alternative architecture for QR factorization than traditional triangular systolic arrays. In the next phase of the research, new hardware architectures of the back substitution SIC decoder was developed for a 4 X 4 MIMO system with 16-QAM constellation scheme in chapter 5. The division operation for back substitution needs a complex hardware, and results in the numerical instability. In the proposed hardware the elimination of division and modification of multiplier has reduced the hardware complexity and led to numerical stability. In addition the pre decoding block was designed and optimized in terms of number of the pipeline registers and CORDIC rotator processors. The developed hardware is capable of processing 20 vectors data burst and results in a throughput of 149 Mb/s. The FPGA (Field Programmable Gate Array) and ASIC (Application specific Integrated Circuit) implementations of the proposed optimized architecture are presented in Chapter 5. We found that the equivalent gates and the core area in our design is less than 30% of other designs and the maximum clock frequency and the throughput is higher (175 %) than other works. Finally the improvements of the BER performance using the branching method and parallel architectures are presented in chapter 6. In this supplementary part to back substitution OSIC decoder, the final symbol vector is selected from 2 or 8 potential candidates based on the minimum Euclidean norm, which improves the BER between 3 to 7 db and gives a very close match to the original V-BLAST performance.

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