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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
51

Minimering av effektförbrukning i inbyggt system med FPGA / Minimizing power consumption in embedded system using FPGA

Ekwall, Anders January 2014 (has links)
Målet med detta examensarbete är att undersoka om det är möjligt att reducera energiförbrukningen i ett inbyggt system m.h.a. en Field Programmable Gate Array (FPGA) med låg effektförbrukning. Genom att flytta en del funktioner från systemets Micro Controller Unit (MCU) till en FPGA, hoppas uppdragsgivaren att systemets MCU kan ges mojligheten att gå över i ett mer energisnålt sömnlage under tillräckligt långa perioder. Rapporten beskriver utvecklingsarbetet från förstudie till implementeriung och test av framtagen design i en FPGA, AGLN250 fran Microsemi. Examensarbetet har visat att det ar fullt mojligt att reducera ett inbyggt systems effektförbrukning m.h.a. en FPGA. Dock måste man, p.g.a. en FPGA:s arkitektur, vara extra aktsam pa hur designen implementeras för att effektförbrukningen inte skall bli högre än förvantat. / The purpose of this thesis is to examine the possibility of reducing an embedded system's power consumption through the use of a low-power Field Programmable Gate Array (FPGA). The customer's hope was that by relocating some of the functionality from the system's Micro Controller Unit (MCU) to an FPGA, the system's MCU could remain in its most efficient power saving mode long enough to reduce the average power consumption to an acceptable level. This paper documents the development work, from initial background material studies up to the implementation and test of suggested designs in an actual FPGA, an AGLN250 from Microsemi. The thesis work has demonstrated that it is possible to reduce the power consumption of the customer's system by relocating some of the MCU functionality to an FPGA. However, due to an FPGA's architecture, care must be taken to ensure that the design is implemented in such a way that the signal activity is reduced as far as possible. Otherwise the power consumption might end up higher than expected.
52

Intelligente Himbeere - Der Raspberry Pi

Heik, Andreas, Sontag, Ralph 08 May 2013 (has links)
Aus der Vision, Computertechnik für den schmalen Geldbeutel technisch interessierten Jugendlichen verfügbar zu machen entstand ein kreditkartengroßer Einplatinencomputer, der Raspberry Pi. Wir möchten den Raspi im Vortrag etwas näher vorstellen und in einer kleinen Demonstration Anregungen für eigene Projekte geben. Gespannt sind wir auch auf Projekte, welche die Zuhörer bereits mit dem Raspberry Pi umgesetzt haben.
53

<b>RIVER RESTORATION INTELLIGENCE AND VERIFICATION (RRIV): DEVELOPMENT OF A LOW-COST, VERSATILE EMBEDDED SYSTEM FOR BROAD-SCALE MONITORING OF WATER QUALITY AND GREENHOUSE GAS EMISSIONS</b>

Ken Yao Chong (16805982) 09 August 2023 (has links)
<p>Sensor technology is evolving rapidly, offering new opportunities for environmental data collection. Yet, despite the large number of sensors now available, there is a lack of logging platforms that can be used to operate these sensors in situ. To address this shortfall, River Restoration Intelligence and Verification (RRIV) has developed an environmental data logger that meets the needs of the environmental sensing community. This platform has several advantages that reduce the time, effort, and technical know-how required to deploy environmental sensors. An extensive low-power mode is available, and hardware such as a real-time clock with an independent power source is incorporated. A driver system has been developed that allows users to incorporate sensors into the platform with minimal effort. RRIV loggers also include a command line interface that allows user to add or remove sensors, calibrate sensors, or configure deployments without the need for C/C++ programming, something that is not possible with out-of-the-box microcontrollers such as Arduino and ST Nucleo products. The technology incorporated into RRIV and how it is applied and deployed in the field is described. This includes a description of power consumption. Protocols and descriptions of case construction are also included. RRIV loggers configured to monitor carbon dioxide and methane are used to demonstrate how this platform is used in the field.</p>
54

INTELLIGENT VEHICLE NAVIGATION SYSTEM CONNECTED WITH INTERNET

Bingxin, Yi, Qishan, Zhang, Shengxi, Ding 10 1900 (has links)
International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The intelligent vehicle navigation system is a multifunctional and complex integrated system that uses autonomous vehicle navigation, geography information, database system, computer technology, multimedia technology and wireless communication. In this paper, an autonomous navigation system based on embedded hardware and embedded operation system that is Linux is proposed. The system has advantages of low cost, small mass, multifunction and high stability, especially connecting with Internet.
55

ITS VEHICLE SUBSYSTEM BASED ON GPRS

Zhang, Zhengxuan, Zhang, Qishan 10 1900 (has links)
International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / The IMS(In-vehicle Monitoring Subsystem) of VMS(Vehicle Monitoring System) is the multifunctional and complex integrate embedded system, which sends the data of various in-vehicle devices to MC(Monitoring Center) and accepts commands and schedules from there. Using GPRS platform in this system make it possible for real-time and effective data transmission. This paper proposes some new insights on IMS applied to public traffic, including its software and hardware composition, and its realization method.
56

Une méthode globale pour la vérification d’exigences temps réel : application à l’avionique modulaire intégrée / A comprehensive method for the verification of real-time requirements : application to integrated modular avionics

Lauer, Michaël 12 June 2012 (has links)
Dans le domaine de l’aéronautique, les systèmes embarqués ont fait leur apparition durant les années 60, lorsque les équipements analogiques ont commencé à être remplacés par leurs équivalents numériques. Dès lors, l’engouement suscité par les progrès de l’informatique fut tel que de plus en plus de fonctionnalités ont été numérisées. L’accroissement permanent de la complexité des systèmes a conduit à la définition d’une architecture appelée Avionique Modulaire Intégrée (IMA pour Integrated Modular Avionics). Cette architecture se distingue des architectures antérieures, car elle est fondée sur des standards (ARINC 653 et ARINC 664 partie 7) permettant le partage des ressources de calcul et de communication entre les différentes fonctions avioniques. Ce type d’architecture est appliqué aussi bien dans le domaine civil avec le Boeing B777 et l’Airbus A380, que dans le domaine militaire avec le Rafale ou encore l’A400M. Pour des raisons de sûreté, le comportement temporel d’un système s’appuyant sur une architecture IMA doit être prévisible. Ce besoin se traduit par un ensemble d’exigences temps réel que doit satisfaire le système. Le problème exploré dans cette thèse concerne la vérification d’exigences temps réel dans les systèmes IMA. Ces exigences s’articulent autour de chaînes fonctionnelles, qui sont des séquences de fonctions. Une exigence spécifie alors une borne acceptable (minimale ou maximale) pour une propriété temporelle d’une ou plusieurs chaînes fonctionnelles. Nous avons identifié trois catégories d’exigences temps réel, que nous considérons pertinentes vis-à-vis des systèmes étudiés. Il s’agit des exigences de latence, de fraîcheur et de cohérence. Nous proposons une modélisation des systèmes IMA, et des exigences qu’ils doivent satisfaire, dans le formalisme du tagged signal model. Nous montrons alors comment, à partir de ce modèle, nous pouvons générer pour chaque exigence un programme linéaire mixte, c’est-à-dire contenant à la fois des variables entières et réelles, dont la solution optimale permet de vérifier la satisfaction de l’exigence / Embedded systems appeared in aeronautics during the 60’s, when the process of replacing analog devices by their digital counterpart started. From that time, the broad thrust of computer science advances make it possible to digitize more and more avionics functionalities. The continual increase of the complexity of these systems led to the definition of a new architecture called Integrated Modular Avionics (IMA). This architecture stands apart from previous architecture because it is based on standards (ARINC 653 and ARINC 664 part 7) which allow the sharing of computation and communication resources among avionics functions. This architecture is implemented in civil aircrafts, with Boeing B777 and Airbus A380, and in military aircrafts, with Rafale or A400M. For safety reason, the temporal behaviour of such a system must be predictable, which is expressed with a set real-time requirements. A real-time requirement specifies an upper or lower bound of a temporal property of one or several functional chains. A functional chain is a sequence of functions. In this thesis, we explore the verification of real-time requirements in IMA systems. We have identified three real-time requirements relevant to our problem : latency, freshness and consistency. We propose a model of IMA systems, and the requirements they must meet, based on the tagged signal model. Then we derive from this model, for each requirement, a mixed integer linear program whose optimal solution allows us to verify the requirement
57

Embedded Instrument Panel for Construction Equipment / Glass Cockpit

Linder, Rickard, Lagerholm, Lars January 2012 (has links)
Construction equipment such as wheel loaders and dumpers are constantly getting updated with new technology when it comes to performance and fuel consumption. But the interior in the cockpit has not been exposed to any dramatic changes for decades. A modernized cockpit gives the driver a more modern feel of driving a highly technological machine, while at the same time enables for personalization. This thesis work presents a new way of improving the look and feel for displaying relevant information and also relaying information to both the driver of the machine and spectators outside. It includes a way of rerouting CAN-bus signals from a construction machine and displaying it on a tablet. The core idea with the solution is to make it as modular as possible to further improve and be able to use it in any machine available at Volvo's disposal. With this in mind, any machine could use the same software, the same hardware and still be able to fully utilize all the features that have been implemented from the thesis work. The idea and implementational results are designed as partly embedded and partly towards user interface.
58

DEVELOPMENT OF A ROBUST CASCADE CONTROLLER FOR A RIDERLESS BICYCLE

Persson, Niklas, Andersson, Tom January 2019 (has links)
A controlled riderless bicycle is desired for the purpose of testing autonomous vehicles ability to detect and recognise cyclists. The bicycle, which is a highly unstable system with complex dynamics have been subject to research for over a century, and in the last decades, controllers have been developed for autonomous bicycles. The controllers are often only evaluated in simulation, but some complex controllers have been developed on real-life bicycles as well. The goal of this work is to validate sensors and subsystems of an instrumented bicycle and to develop a robust controller which can balance a bicycle by using actuation on the steering axis alone. Using an iterative design process, the sensor measuring the lean angle and the steering system are improved and validated. By sensing the lean angle, the handlebar is manipulated to make the bicycle stable. For this purpose, a P, PD, two different PID, an LQR and a fuzzy controller are developed, evaluated and compared. The results show that the bicycle can ride without human interaction on a bicycle roller in different velocities. Additionally, numerous experiments are conducted in an outdoor environment in several different terrains, where the proposed control structure manages to balance and steer the bicycle.
59

Sistema de geração de portadora na banda X para satélites de observação da terra. / X-band carrier generation system for Earth Observation Satellites.

Beraldo, Luciano do Amaral 17 March 2017 (has links)
Este trabalho apresenta o projeto de uma portadora que opera na frequência de 8.300 MHz para ser utilizado em moduladores vetoriais diretos com aplicação em sistemas embarcados de satélites. Foram realizados estudos sistêmicos de arquiteturas que operam nesta faixa de frequência com as características necessárias para atender as especificações da European Cooperation for Space Standardization, ECSS - Space Engineering Radio Frequency and Modulation da agência espacial europeia -ESA, que regulamenta as frequências e características para sistemas de transmissão para enlace de descida. A partir dos conhecimentos adquiridos nos estudos, é apresentada uma metodologia de projeto visando o atendimento das especificações definidas pela ECSS e a escolha de uma topologia de projeto. Foram realizadas simulações a nível sistêmico, utilizando o software Advanced Design System-ADS da fabricante Keysight Technologies, para definir as especificações de projeto dos circuitos que compõem o sistema de geração da portadora na banda X. O circuito da malha de sincronismo de fase - PLL opera na frequência de 2.075 MHz, onde seu sinal é amplificado e filtrado pela cadeia de amplificação na banda S cuja função é aumentar a isolação para minimizar os efeitos de pulling do oscilador controlado por tensão - VCO, devido à alta velocidade nas transições de tempo de subida e de descida dos sinais digitais I e Q. O filtro também é responsável por aumentar a rejeição de espúrios e harmônicos gerados pelos efeitos não lineares dos amplificadores. O sinal é enviado ao circuito multiplicador de frequências que gera o sinal na banda X e é filtrado por um filtro passa-faixas de linhas acopladas, rejeitando os sinais espúrios provenientes da saída do multiplicador de frequência. Na saída, o sinal passa por uma cadeia de amplificação na banda X para adequar o nível de potência à entrada dos moduladores vetoriais. Os circuitos projetados foram desenvolvidos utilizando tecnologia de microfita de linha. Os protótipos foram caracterizados, apresentando boa concordância com os resultados simulados, comprovando experimentalmente a metodologia de projeto utilizada neste trabalho assim como o atendimento das especificações sugeridas pela ECSS. / This work presents the project of an carrier that works in the frequency of 8,300 MHz to be used in direct vector modulator for embedded system application in satellites. It were realized system level studies of PLL topologies that work in this frequency range with the necessary features to provide the requirements from European Cooperation for Space Standardization, ECSS - Space Engineering Radio Frequency and Modulation of the European Space Agency - ESA, which is responsible for the frequencies and features regulation for downlink transmission system. With the knowledge acquired from the studies, it is presented a project method intending to the meet the requirements defined by the ECSS and the definition of a topology to the project. It were performed system level simulation, using the Advanced Design System - ADS tool, from Keysight Technologies, in order to define the design specifications in the project of the circuits of the X band carrier generator developed. The PLL circuit works in the frequency of 2,075 MHz, in which its signal is amplified and filtered for amplifier chain in S band, increasing the isolation to reduce the pulling effects in the voltage controlled oscillator, due to the high-speed transitions in the rise time and fall time of the digital signal I and Q. The filter is also responsible for increasing the rejection of spurious and harmonics generated by non-linear amplifiers effects. The signal is conducted to the frequency multiplier circuit that generates the X band signal and it is filtered by a coupled line bandpass filter, rejecting the spurious from the frequency multiplier output. At the output stage, the signal passes through a X band amplification chain in order to adequate the power level of the vector modulators input level. The specified circuits were designed and developed using microstrip line technology. The prototypes were characterized, presenting adequate results according to the data obtained by the simulations, experimentally reinforcing the project method used in this work as well as the meeting of the requirements suggested by the ECSS.
60

Side Channel Leakage Analysis - Detection, Exploitation and Quantification

Ye, Xin 27 January 2015 (has links)
Nearly twenty years ago the discovery of side channel attacks has warned the world that security is more than just a mathematical problem. Serious considerations need to be placed on the implementation and its physical media. Nowadays the ever-growing ubiquitous computing calls for in-pace development of security solutions. Although the physical security has attracted increasing public attention, side channel security remains as a problem that is far from being completely solved. An important problem is how much expertise is required by a side channel adversary. The essential interest is to explore whether detailed knowledge about implementation and leakage model are indispensable for a successful side channel attack. If such knowledge is not a prerequisite, attacks can be mounted by even inexperienced adversaries. Hence the threat from physical observables may be underestimated. Another urgent problem is how to secure a cryptographic system in the exposure of unavoidable leakage. Although many countermeasures have been developed, their effectiveness pends empirical verification and the side channel security needs to be evaluated systematically. The research in this dissertation focuses on two topics, leakage-model independent side channel analysis and security evaluation, which are described from three perspectives: leakage detection, exploitation and quantification. To free side channel analysis from the complicated procedure of leakage modeling, an observation to observation comparison approach is proposed. Several attacks presented in this work follow this approach. They exhibit efficient leakage detection and exploitation under various leakage models and implementations. More importantly, this achievement no longer relies on or even requires precise leakage modeling. For the security evaluation, a weak maximum likelihood approach is proposed. It provides a quantification of the loss of full key security due to the presence of side channel leakage. A constructive algorithm is developed following this approach. The algorithm can be used by security lab to measure the leakage resilience. It can also be used by a side channel adversary to determine whether limited side channel information suffices the full key recovery at affordable expense.

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