Demand for low cost Serializer and De-serializer (SerDes) integrated circuits has increased due to the widespread use of Synchronous Optical Network (SONET)/Gigabit Ethernet network and chip-to-chip interfaces such as PCI-Express (PCIe), Serial ATA(SATA) and Fibre channel standard applications. Among all these applications, clock data recovery (CDR) is one of the key design components. With the increasing demand for higher bandwidth and high integration, Complementary metal-oxidesemiconductor (CMOS) implementation is now a design trend for the predominant products. In this research work, a fully integrated 10Gb/s (OC-192) CDR architecture in standard 0.18 μ m CMOS is developed. The proposed architecture integrates the typically large off-chip filter capacitor by using two feed-forward paths configuration to generate the required zero and poles and satisfies SONET jitter requirements with a total power dissipation (including the buffers) of 290mW. The chip exceeds SONET OC-192 jitter tolerance mask, and high frequency jitter tolerance is over 0.31 UIpp by applying PRBS data with a pattern length of 231-1.The implementation is the first fully integrated 10Gb/s CDR IC which meets/exceeds the SONET standard in the literature. The second proposed CDR architecture includes an adaptive bang-bang control algorithm. For 6MHz sinusoidal jitter modulation, the new architecture reduces the tracking error to 11.4ps peak-to-peak, versus that of 19.7ps of the conventional bangbang CDR. The main contribution of the proposed architecture is that it optimizes the loop dynamics by adjusting the bang-bang bandwidth adaptively to minimize the steady state jitter of the CDR, which leads to an improved jitter tolerance performance. According to simulation, the jitter performance is improved by more than 0.04UI,which alleviates the stringent 0.1UI peak to peak jitter requirements in the PCIe/Fibre channel/Sonet Standard.

International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada / In many test ranges, it is often required to acquire a number of telemetry streams and to process the data simultaneously. Frequently, the streams have different delay characteristics, requiring temporal alignment before the processing step. It is desired to have the capability to align these streams so that the events in each stream are coincident in time. Terawave Communications has developed technology to perform temporal alignment for a number of streams automatically. Additionally, the algorithm performs the delay compensation independent of the source data rate of each stream. Terawave will present the algorithm and share the results of their testing in a test installation.

International Telemetering Conference Proceedings / October 26-29, 1998 / Town & Country Resort Hotel and Convention Center, San Diego, California / The telemetry and aerospace communities require communications equipment providing various modulation and demodulation formats. One format, with application in Space Ground Link Subsystems (SGLS), utilizes a Ternary (tri-tone) Frequency Shift-Keyed (FSK) signal Amplitude Modulated (AM) by a triangle waveform. Historically, SGLS equipment has operated with a fixed tri-tone frequency set (e.g., 65 kHz, 76 kHz and 95 kHz). The need for additional transmission channels and increased bandwidth efficiency creates the requirement for equipment with the flexibility to generate and receive varied and higher frequency tone sets. Combining analog and digital techniques, GDP Space Systems has developed the FDT001. It is an FSK/AM detector which recovers a bit rate clock at one of four selectable bit rates and reproduces ternary FSK modulation data over a widely tunable range of tone frequencies. The tuning range is expanded by using two methods of digital frequency discrimination. The following paper describes the design of the FDT001.

<p>POTS (Plain Old Telephony Service) systems have traditionally been connected via synchronous connections. When installing new nodes in the telephone network, they may sometimes be connected via packet networks such as Ethernet. Ethernet is an asynchronous network which means that nodes connected to the network don’t have access to the same clock frequency if it is not provided in some other way. If two nodes have different clock frequency, the receiver’s buffer will eventually overflow or starve. While not being a severe problem for telephony, devices used for data transmission, e.g. modems and fax will not be able to function properly. To avoid this it is necessary to synchronize the nodes.</p><p>This thesis investigates methods to synchronize nodes connected over Ethernet by simulating them in Matlab. The simulations show that under certain circumstances it is possible to produce a clock signal conforming to relevant standards.</p>

POTS (Plain Old Telephony Service) systems have traditionally been connected via synchronous connections. When installing new nodes in the telephone network, they may sometimes be connected via packet networks such as Ethernet. Ethernet is an asynchronous network which means that nodes connected to the network don’t have access to the same clock frequency if it is not provided in some other way. If two nodes have different clock frequency, the receiver’s buffer will eventually overflow or starve. While not being a severe problem for telephony, devices used for data transmission, e.g. modems and fax will not be able to function properly. To avoid this it is necessary to synchronize the nodes. This thesis investigates methods to synchronize nodes connected over Ethernet by simulating them in Matlab. The simulations show that under certain circumstances it is possible to produce a clock signal conforming to relevant standards.

In this dissertation I investigated a multi-channel and multi-bit rate all-optical clock recovery device. This device, a birefringent Fabry-Perot resonator, had previously been demonstrated to simultaneously recover the clock signal from 10 wavelength channels operating at 10 Gb/s and one channel at 40 Gb/s. Similar to clock signals recovered from a conventional Fabry-Perot resonator, the clock signal from the birefringent resonator suffers from a bit pattern effect. I investigated this bit pattern effect for birefringent resonators numerically and experimentally and found that the bit pattern effect is less prominent than for clock signals from a conventional Fabry-Perot resonator.I also demonstrated photonic balancing which is an all-optical alternative to electrical balanced detection for phase shift keyed signals. An RZ-DPSK data signal was demodulated using a delay interferometer. The two logically opposite outputs from the delay interferometer then counter-propagated in a saturated SOA. This process created a differential signal which used all the signal power present in two consecutive symbols. I showed that this scheme could provide an optical alternative to electrical balanced detection by reducing the required OSNR by 3 dB.I also show how this method can provide amplitude regeneration to a signal after modulation format conversion. In this case an RZ-DPSK signal was converted to an amplitude modulation signal by the delay interferometer. The resulting amplitude modulated signal is degraded by both the amplitude noise and the phase noise of the original signal. The two logically opposite outputs from the delay interferometer again counter-propagated in a saturated SOA. Through limiting amplification and noise modulation this scheme provided amplitude regeneration and improved the Q-factor of the demodulated signal by 3.5 dB.Finally I investigated how SPM provided by the SOA can provide a method to reduce the in-band noise of a communication signal. The marks, which represented data, experienced a spectral shift due to SPM while the spaces, which consisted of noise, did not. A bandpass filter placed after the SOA then selected the signal and filtered out what was originally in-band noise. The receiver sensitivity was improved by 3 dB.

Single-frequency and mode-locked silver film ion-exchanged glass waveguide lasers as well as all-optical clock recovery based on birefringent fiber resonators have been experimentally and theoretically studied. The theory, modeling and fabrication process of silver film ion-exchange techniques, have been discussed and presented.The UV-written gratings on both IOG-1 active and passive glass have been studied. For the first time, with a high quality narrowband grating UV-printed on the passive section of a hybrid glass, a DBR waveguide single-frequency laser is demonstrated with the linewidth less than 1 MHz and the output power of 9 mW.Novel saturable absorbers based on a fiber taper embedded in carbon nanotubes (CNTs)/polymer composite were demonstrated. The saturable absorbers were utilized to build mode-locked fiber lasers, which were studied experimentally. A mode-locked ring laser utilizing an Er-Yb-codoped glass waveguide as the gain medium was also demonstrated. In addition, short cavity mode-locked waveguide lasers with CNTs film on the top were theoretically investigated, which shows a short cavity mode-locked waveguide laser is very promising.A new concept to perform multi-channel multi-rate all-optical clock recovery based on birefringent fiber-optic waveguide resonators was discussed. The concept has been advanced to polarization-insensitive operation. The experimental results, obtained as a proof-of-concept, agree well with numerical simulations.

[pt] O presente texto aborda aspectos do problema de sincronização em sistemas de telecomunicações, com enfoque nas funções de demodulação síncrona, regeneração, multiplexação/demultiplexação (TDM) e comutação (digital). São tratados os métodos de obtenção de referência de portadora e de referência de relógio, os recursos de malha de amarração de fase (PLL) e de memória elástica. O objetivo final consiste na descrição dos métodos de sincronização de rede, nas modalidades plesiócrona (e plesiócrona com justificação), mestre-escravo e sincronização mútua. As subredes de sincronização são analisadas em termos de topologia, segurança, determinação de freqüência e fases de operação e de compensação de defasagens na transmissão. A apresentação é feita em termos de um texto didático para a descrição dos problemas e de suas soluções. / [en] This text deals with aspects of synchronization in telecommunication systems, with emphasis on the operational functions of synchronous demodulation, signal regeneration, multiplexing/demultiplexing (TDM) and digital switching. The methods of carrier recovery, clock recovery, phase locked loop and elastic store are presented. The final goal consists on the description of network synchronization methods, in the plesiochronous (and plesiochronous with justification), master-slave and mutual synchronization modalities. The synchronization subnetworks are analised in terms of topology, safety, operation frequency and phases, and transmission phase delay compensation. The presentation is made in a didactical way, describing the problems and their possible solutions.

All-optical synchronization and its application in advanced optical communications have been investigated in this dissertation. Dynamics of all-optical timing synchronization (clock recovery) using multi-section gain-coupled distributed-feedback (MS-GC DFB) lasers are discussed. A record speed of 180-GHz timing synchronization has been demonstrated using this device. An all-optical carrier synchronization (phase and polarization recovery) scheme from PSK (phase shift keying) data is proposed and demonstrated for the first time. As an application of all-optical synchronization, the characterization of advanced modulation formats using a linear optical sampling technique was studied. The full characterization of 10-Gb/s RZ-BPSK (return-to-zero binary PSK) data has been demonstrated. Fast lockup and walk-off of the all-optical timing synchronization process on the order of nanoseconds were measured in both simulation and experiment. Phase stability of the recovered clock from a pseudo-random bit sequence signal can be achieved by limiting the detuning between the frequency of free-running self-pulsation and the input bit rate. The simulation results show that all-optical clock recovery using TS-DFB lasers can maintain a better than 5 % clock phase stability for large variations in power, bit rate and optical carrier frequency of the input data and therefore is suitable for applications in ultrafast optical packet switching. All-optical timing synchronization of 180-Gb/s data streams has been demonstrated using a MS-GC DFB laser. The recovered clock has a jitter of less than 410 fs over a dynamic range of 7 dB. All-optical carrier synchronization from phase modulated data utilizes a phase sensitive oscillator (PSO), which used a phase sensitive amplifier (PSA) as a gain block. Furthermore, all-optical carrier synchronization from 10-Gb/s BPSK data was demonstrated in experiment. The PSA is configured as a nonlinear optical loop mirror (NOLM). A discrete linear system analysis was carried out to understand the stability of the PSO. Complex envelope measurement using coherent linear optical sampling with mode-locked sources is investigated. It is shown that reliable measurement of the phase requires that one of the optical modes of the sampling pulses be locked to the optical carrier of the data signal to be measured. Carrier-envelope offset (CEO) is found to have a negligible effect on the measurement. Measurement errors of the intensity profile and phase depend on the pulsewidth and chirp of the sampling pulses as well as the detuning between the carrier frequencies of the data signal and the center frequency of the sampling source. Characterization of the 10-Gb/s RZ-BPSK signal was demonstrated using the coherent detection technique. Measurements of the optical intensity profile, chirp and constellation diagram were demonstrated. A CW local oscillator was used and electrical sampling was performed using a sampling scope. A novel feedback scheme was used to stabilize homodyne detection.

Considere um sistema de comunicação em que um equipamento transmissor envia pacotes de dados, de tamanho fixo e a uma taxa uniforme, a um equipamento receptor. Considere também que esses equipamentos estejam conectados por uma rede de comutação de pacotes, que introduz um atraso aleatório a cada pacote que trafega na rede. Nesta tese, é proposto um modelo de recuperação adaptativa de relógio capaz de sincronizar as frequências e as fases desses dispositivos, dentro de certos limites especificados de precisão. Esse método para atingir sincronização de frequência e de fase é baseado em medições dos tempos de chegada dos pacotes ao receptor, que são usados para controlar a dinâmica de um phase-locked loop (PLL) digital. O desempenho desse modelo é avaliado através de simulações numéricas realizadas considerando valores de parâmetros realistas. Os resultados indicam que esse esquema tem potencial para ser usado em aplicações práticas. / Consider a communication system in which a transmitter equipment sends fixed-size packets of data at a uniform rate to a receiver equipment. Consider also that these equipments are connected by a packet-switched network, which introduces a random delay to each packet. In this thesis, we propose an adaptive clock recovery scheme capable of synchronizing the frequencies and the phases of these devices, within specified limits of precision. This scheme for achieving frequency and phase synchronization is based on measurements of the packet arrival times at the receiver, which are used to control the dynamics of a digital phase-locked loop (PLL). The scheme performance is evaluated via numerical simulations performed by using realistic parameter values. The results suggest that this scheme has potential to be used in practical applications.