This report documents the work done by the author to design and implement a 3D graphics system on an FPGA (Field Programmable Gate Array). After a preamble with a background presentation to the project, a very brief introduction in computer graphics techniques and computer graphics theory is given. Then, the hardware available to the project, along with an analysis of general requirements is examined. The following chapter contains the proposed graphics system design for FPGA implementation. A broad approach to separate the design and the eventual implementation was used. Two 3D pipelines are suggested - one fully capable high-end version and one which use minimal resources. The documentation of the effort to implement the minimal graphics system previously discussed then follows. The documentation outlines the work done without going too deep into detail, and is followed by the largest of the tests conducted. Finally, chapter seven concludes the project with the most important project conclusions and some suggestions for future work.

This thesis work focuses on designing a survivable IP-core network with the minimal investment of spare capacity. A span-oriented spare capacity allocation (SCA) scheme is proposed to satisfy customers' availability requirements in the end-to-end (E2E) sense. The novelty of the proposed SCA scheme is that it meets the E2E availability requirements despite the lack of knowledge of E2E bandwidth by employing protection rings covering all links in the network. Different ring selection methods are presented and also compared from the aspect of network redundancy and LP feasibility which provide more flexibility to the design. The proposed SCA algorithm further minimizes total cost of spare capacity by incorporating partial protection within the proposed architecture. The simulation results show that it can significantly reduce the spare capacity consumption depending on the availability. The proposed SCA scheme also performs better in terms of redundancy than that of two other dominant methods available these days.

Hash tables (HTs) are used to implement various lookup schemes and they need to be efficient in terms of speed, space utilization, and power consumptions. For IP lookup, the hashing schemes are attractive due to their deterministic O(1) lookup performance and low power consumptions, in contrast to the TCAM and Trie based approaches. As the size of IP lookup table grows exponentially, scalable lookup performance is highly desirable. For next generation high-speed routers, this is a vital requirement when IP lookup remains in the critical data path and demands a predictable throughput. However, recently proposed hash schemes, like a Bloomier filter HT and a Fast HT (FHT) suffer from a number of flaws, including setup failures, update overheads, duplicate keys, and pointer overheads. In this dissertation, four novel hashing schemes and their architectures are proposed to address the above concerns by using pipelined Bloom filters and a Fingerprint filter which are designed for a memory-efficient approximate match. For IP lookups, two new hash schemes such as a Hierarchically Indexed Hash Table (HIHT) and Fingerprint-based Hash Table (FPHT) are introduced to achieve a a perfect match is assured without pointer overhead. Further, two hash mechanisms are also proposed to provide memory and power efficient lookup for packet processing applications. Among four proposed schemes, the HIHT and the FPHT schemes are evaluated for their performance and compared with TCAM and Trie based IP lookup schemes. Various sizes of IP lookup tables are considered to demonstrate scalability in terms of speed, memory use, and power consumptions. While an FPHT uses less memory than an HIHT, an FPHT-based IP lookup scheme reduces power consumption by a factor of 51 and requires 1.8 times memory compared to TCAM-based and trie-based IP lookup schemes, respectively. In dissertation, a multi-tiered packet classifier has been proposed that saves at most 3.2 times power compared to the existing parallel packet classifier. Intrinsic hashing schemes lack of high throughput, unlike partitioned Ternary Content Addressable Memory (TCAM)-based scheme that are capable of parallel lookups despite large power consumption. A hybrid CAM (HCAM) architecture has been introduced. Simulation results indicate HCAM to achieve the same throughput as contemporary schemes while it uses 2.8 times less memory and 3.6 times less power compared to the contemporary schemes.

Turbo Code, due to its excellent error correction capability, has been widely used in many modern wireless digital communication systems as well as data storage systems in recent years. However, because the decoding of the Turbo Code involves finding all the state probability and transition sequence, its hardware implementation is not straightforward as it requires a lot of memory and memory operation. In this thesis, a design of Turbo Code decoder IP (Intellectual Property) is proposed which can be parameterized with different word-lengths and code rates. The design of the core SISO (Soft-In Soft-Out) unit used in Turbo Code decoder is based on the algorithm of SOVA (Soft-Output Viterbi Algorithm). Based on the hybrid trace-back scheme, the SISO proposed in this thesis can achieve fast path searching and path memory reduction which can be up to 70% compared with the traditional trace-back approach. In addition, every iterative of Turbo Code decoding performs two SISO operations on the block of data with normal and interleaving order. In our proposed architecture, these two SISO operations can be implemented on a single SISO unit with only slightly control overhead. In order to improve the bit error rate performance, the threshold and normalization techniques are applied to our design. In addition, the termination criteria circuit is also included in our design such that the iteration cycle of the decoding can be reduced. The proposed Turbo Code decoder has been thoroughly tested and verified, and can be qualified as a robust IP.

In recent years, the requirement for embedded controllers has been steadily on the increase due to the development of computers, communication ,WWW and consumers¡¦ products. Consequently, integration and application of the embedded system and the World-Wide Web become more and more important. The Web-based embedded system developed in this paper tends build a service of micro web server. By this service, users can not only receive the information from the system via the browser, but also design particular processes for themselves. Besides, the system developer can use the most popular tools to edit the page for the Web-based embedded system. This Web service technology offers an operational interface, which is user-friendly, and cost effective with the capability of cross-platform and TCP/IP transmission. The presented achievement is applied to temperature control system for performance evaluation of remote control.

With recent growth in mobile components and advances in wireless communication technology, mobile computing is an increasingly important area of research. Enabling mobility in IP networks becomes more and more significant. Mobile IP is the only current means for offering seamless roaming to mobile computers in the Internet. It has recently progressed along the ladder to standardization within the Internet Engineering Task Force (IETF). However, Mobile IP suffers from so-called triangular-routing problem and packet loss due to handoff. In this paper, we propose a new architecture to solve these two problems noted above. We assume that network routers such as Home Agent¡BForeign Agent¡BGeneral Router can equip our Pre-Accessing Engine (Mobile IP Engine) to access IP packets before IP routing Engine. With our Mobile IP table established in Mobile IP Engine, we can set up a transmission path for each correspondent node (CN) to transmit data to mobile node (MN). Therefore, we not only solve triangular-routing problem by direct transmission path, but also decrease handoff latency from path updating function. Furthermore, we use retransmission and flush schemes to avoid packet loss and out-of-order problems. Finally, we use simulation to prove our architecture is useful.

In wireless/mobile networks, users freely change their service point while they are communicating with other users. In order to support the mobility of mobile nodes, Mobile IPv6 (MIPv6) is proposed in IETF, in which an MN must inform its home agent the binding of its home address and the current care-of address (CoA). The home agent forwards packets to CoA when it receives packets for the MN. There is a significant problem in MIPv6 due to its inability to support micro-mobility cause by long delay and high packet loss during handover. Hierarchical mobile IPv6 (HMIPv6) is proposed to separate mobility into micro-mobility (within one domain) and macro-mobility (between domains). HMIPv6 introduced a new protocol element called Mobility Anchor Point (MAP) to manage the mobility. HMIPv6 can reduce the delay and the amount of signaling during handover. However HMIPv6 only improves micro mobility problem where the significant delay still occurs in macro mobility management. Duplicate address detection and the transmission time during the handoff operation could cause high delays. This paper considers handover operations. By simulations, we show that the proposed scheme can realize low handoff delay and packet loss during handover.

There are two critical issues involved as a mobile node moving across two different network sub-domains. One of them is to minimize the possible packet loss and the other is to shorten the handover time. Fast handover is a remedy to these problems. It minimizes the packet loss by making use of buffers, and speed up the handover procedure by L2 triggering. There are two components contributing to the handover delay, namely L2 handover delay and L3 handover delay. The L3 handover delay consists of movement detection delay, duplicate address detection delay, as well as registration delay. With fast handover, the movement detection delay can be lowered by using L2 trigger, and the registration delay can be decreased by buffering and tunneling. However, the problem of out-of-order packets is still in its existence. A novel handover scheme incorporating the anycast technology is developed and presented in this thesis. With refined buffer control scheme and the switching between unicast and anycast addressing, the handover performance can be greatly improved by the proposed approach.

Many different wireless technologies have increased the demand of accessing Internet resources through wireless networks. One of the most popular applications is watching multimedia streaming over wireless. However, when a user is roaming in a heterogeneous network, he needs to acquire adequate bandwidth from different wireless access points. In this Thesis, we propose a Mobile-IP based vertical handoff scheme in a heterogeneous WiMAX and WLAN. When a mobile node is in the overlapped area of WiMAX and WLAN, it may have to execute the vertical handoff based on the received average signal strength, the transmitting queue length of network interface, and the available network bandwidth. Our goal is to reduce the influences of RTP-based video streaming when the network is congested and when a mobile node executes the vertical handoff in the heterogeneous network. We implement the Dynamic Mobile-IP based vertical handoff on Linux platform by modifying handoff decisions between WiMAX and WLAN. The above-mentioned performance parameters are implemented as modules on Linux platform. At last, we prove that our scheme can effectively improve packet loss ratio and system processing ratio. As a result, the frame mosaic phenomenon and frame slow-playing phenomenon in RTP-based video streaming can be significantly improved.

The use of Internet has revolutionized the way information is exchanged, changed business paradigms and put mission critical and sensitive systems online. Any dis- ruption of this connectivity and the plethora of services provided results in significant damages to everyone involved. Denial of Service (DoS) attacks are becoming increas- ingly common and are the cause of lost time and revenue. Flooding type DoS attacks use spoofed IP addresses to disguise the attackers. This makes identification of the attackers extremely difficult. This work proposes a new scheme that allows the victim of a DoS attack to identify the correct origin of the malicious traffic. The suggested mechanism requires routers to mark packets using adjusted probabilistic marking. This results in a lower number of packet-markings required to identify the traffic source. Unlike many related works, we use the existing IPv4 header structure to incorporate these markings. We simulate and test our algorithms using real Internet trace data to show that our technique is fast, and works successfully for a large number of distributed attackers.